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authorRussell King <rmk+kernel@arm.linux.org.uk>2011-09-16 21:45:16 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2011-09-16 21:45:16 +0100
commit4722cd7741c6404f967f7a7b8b666540b6c1663e (patch)
tree877b7d8efe1e4e4ce48416186b4f45da3a5fccac /arch/arm/Kconfig
parent1db3706b05b11abcf2673ffbed5ad43b4c90ed11 (diff)
parent4fb0d2ea397ab207fdecbd88ad0e37b36ce68a62 (diff)
downloadblackbird-op-linux-4722cd7741c6404f967f7a7b8b666540b6c1663e.tar.gz
blackbird-op-linux-4722cd7741c6404f967f7a7b8b666540b6c1663e.zip
Merge branch 'for-rmk' of git://linux-arm.org/linux-2.6-wd into devel-stable
Conflicts: arch/arm/mach-imx/mach-cpuimx27.c
Diffstat (limited to 'arch/arm/Kconfig')
-rw-r--r--arch/arm/Kconfig12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 73c320ea172c..5a3a78633177 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1271,6 +1271,18 @@ config ARM_ERRATA_754327
This workaround defines cpu_relax() as smp_mb(), preventing correctly
written polling loops from denying visibility of updates to memory.
+config ARM_ERRATA_364296
+ bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
+ depends on CPU_V6 && !SMP
+ help
+ This options enables the workaround for the 364296 ARM1136
+ r0p2 erratum (possible cache data corruption with
+ hit-under-miss enabled). It sets the undocumented bit 31 in
+ the auxiliary control register and the FI bit in the control
+ register, thus disabling hit-under-miss without putting the
+ processor into full low interrupt latency mode. ARM11MPCore
+ is not affected.
+
endmenu
source "arch/arm/common/Kconfig"
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