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authorBruce Allan <bruce.w.allan@intel.com>2009-08-07 07:41:56 +0000
committerDavid S. Miller <davem@davemloft.net>2009-08-09 21:45:38 -0700
commit148675a7b2061b5a5eb194530b7c4d8de1f2887e (patch)
tree0b89a22585215699357afad86f4850bf9c2f28fd /Documentation/sh
parent373a88d78be540c1331ea5adcb76610dddcb008b (diff)
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e1000e: fix potential NVM corruption on ICH9 with 8K bank size
The bank offset was being incorrectly calculated on ICH9 parts with a bank size of 8K (instead of the more common 4K bank) which would cause any NVM writes to be done on the wrong address after switching from bank 1 to bank 0. Additionally, assume we are meant to use bank 0 if a valid bank is not detected, and remove the unnecessary acquisition of the SW/FW/HW semaphore when writing to the shadow ram version of the NVM image. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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