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| author | Juerg Haefliger <juergh@gmail.com> | 2007-06-20 15:41:33 -0700 |
|---|---|---|
| committer | Mark M. Hoffman <mhoffman@lightlink.com> | 2007-07-19 14:22:15 -0400 |
| commit | 2dbbdb35746fdc1a3c3bc5b07f197a90e53b059e (patch) | |
| tree | babf7a8bb0ee6b36c5da17ab8961587df391418c /Documentation/hwmon/smsc47b397 | |
| parent | b74f3fdd98c7186930b8ee841dc542dfdba95473 (diff) | |
| download | blackbird-op-linux-2dbbdb35746fdc1a3c3bc5b07f197a90e53b059e.tar.gz blackbird-op-linux-2dbbdb35746fdc1a3c3bc5b07f197a90e53b059e.zip | |
hwmon: add SCH5317 to smsc47b397 driver
This patch adds the SMSC SCH5317 chip (device ID 0x85) as a supported
device to the smsc47b397 driver.
Signed-off-by: Juerg Haefliger <juergh at gmail.com>
Signed-off-by: Mark M. Hoffman <mhoffman@lightlink.com>
Diffstat (limited to 'Documentation/hwmon/smsc47b397')
| -rw-r--r-- | Documentation/hwmon/smsc47b397 | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/Documentation/hwmon/smsc47b397 b/Documentation/hwmon/smsc47b397 index 20682f15ae41..3a43b6948924 100644 --- a/Documentation/hwmon/smsc47b397 +++ b/Documentation/hwmon/smsc47b397 @@ -4,6 +4,7 @@ Kernel driver smsc47b397 Supported chips: * SMSC LPC47B397-NC * SMSC SCH5307-NS + * SMSC SCH5317 Prefix: 'smsc47b397' Addresses scanned: none, address read from Super I/O config space Datasheet: In this file @@ -18,8 +19,8 @@ The following specification describes the SMSC LPC47B397-NC[1] sensor chip provided by Craig Kelly (In-Store Broadcast Network) and edited/corrected by Mark M. Hoffman <mhoffman@lightlink.com>. -[1] And SMSC SCH5307-NS, which has a different device ID but is otherwise -compatible. +[1] And SMSC SCH5307-NS and SCH5317, which have different device IDs but are +otherwise compatible. * * * * * @@ -131,7 +132,7 @@ OUT DX,AL The registers of interest for identifying the SIO on the dc7100 are Device ID (0x20) and Device Rev (0x21). -The Device ID will read 0x6F (for SCH5307-NS, 0x81) +The Device ID will read 0x6F (0x81 for SCH5307-NS, and 0x85 for SCH5317) The Device Rev currently reads 0x01 Obtaining the HWM Base Address. |
