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author | Michal Marek <mmarek@suse.cz> | 2013-02-25 21:50:05 +0100 |
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committer | Michal Marek <mmarek@suse.cz> | 2013-02-25 21:51:57 +0100 |
commit | e3900e74f26fc924c8e9e2a922bd40369b0bb517 (patch) | |
tree | 6e868575d346032ba9408f350c6e5369e0e52b0d /Documentation/devicetree/bindings/dma/mv-xor.txt | |
parent | 62dc989921df2a98d1a73aacd085abe941cb9828 (diff) | |
parent | 02f3e53a131c8aa3fe3c954058f1add5beeae621 (diff) | |
download | blackbird-op-linux-e3900e74f26fc924c8e9e2a922bd40369b0bb517.tar.gz blackbird-op-linux-e3900e74f26fc924c8e9e2a922bd40369b0bb517.zip |
Merge branch 'kbuild/rc-fixes' into kbuild/kconfig
There is one kconfig fix in the rc-fixes branch that I forgot to submit
for 3.8, so let's add it to the kconfig branch for 3.9-rc1.
Diffstat (limited to 'Documentation/devicetree/bindings/dma/mv-xor.txt')
-rw-r--r-- | Documentation/devicetree/bindings/dma/mv-xor.txt | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/dma/mv-xor.txt b/Documentation/devicetree/bindings/dma/mv-xor.txt new file mode 100644 index 000000000000..7c6cb7fcecd2 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/mv-xor.txt @@ -0,0 +1,40 @@ +* Marvell XOR engines + +Required properties: +- compatible: Should be "marvell,orion-xor" +- reg: Should contain registers location and length (two sets) + the first set is the low registers, the second set the high + registers for the XOR engine. +- clocks: pointer to the reference clock + +The DT node must also contains sub-nodes for each XOR channel that the +XOR engine has. Those sub-nodes have the following required +properties: +- interrupts: interrupt of the XOR channel + +And the following optional properties: +- dmacap,memcpy to indicate that the XOR channel is capable of memcpy operations +- dmacap,memset to indicate that the XOR channel is capable of memset operations +- dmacap,xor to indicate that the XOR channel is capable of xor operations + +Example: + +xor@d0060900 { + compatible = "marvell,orion-xor"; + reg = <0xd0060900 0x100 + 0xd0060b00 0x100>; + clocks = <&coreclk 0>; + status = "okay"; + + xor00 { + interrupts = <51>; + dmacap,memcpy; + dmacap,xor; + }; + xor01 { + interrupts = <52>; + dmacap,memcpy; + dmacap,xor; + dmacap,memset; + }; +}; |