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authorBeniamino Galvani <b.galvani@gmail.com>2014-11-18 15:30:35 +0100
committerCarlo Caione <carlo@caione.org>2014-11-18 16:36:14 +0100
commit550ab390d7c60b85cd896cf03a34f8eae8a65d69 (patch)
treef880749d8051fb56356de52ba330a4194a5c546d /COPYING
parentaeff05a39a5a9b9a41fe96ef4f4246cef5fb2f4a (diff)
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ARM: meson: DTS: enable L2 cache
This enables the L2 cache controller available in Amlogic SoCs. Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Carlo Caione <carlo@caione.org>
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