summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorChristian Daudt <csd@broadcom.com>2013-08-19 23:00:45 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2013-08-20 00:26:36 +0100
commit505caa66fe8551c2c8421395c2e56a5bb02520ff (patch)
treeef65cab970bd7ca043442bfdea37d442ba988e67
parentc477b8db45aa4c4976be22c807bf43d31fecf17d (diff)
downloadblackbird-op-linux-505caa66fe8551c2c8421395c2e56a5bb02520ff.tar.gz
blackbird-op-linux-505caa66fe8551c2c8421395c2e56a5bb02520ff.zip
ARM: 7821/1: DT: binding fixup to align with vendor-prefixes.txt
[ this is a follow-up to this discussion: http://archive.arm.linux.org.uk/lurker/message/20130730.230827.a1ceb12a.en.html ] This patchset renames all uses of "bcm," name bindings to "brcm," as they were done prior to knowing that brcm had already been standardized as Broadcom vendor prefix (in Documentation/devicetree/bindings/vendor-prefixes.txt). This will not cause any churn on devices because none of these bindings have made it into production yet. Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Christian Daudt <csd@broadcom.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r--Documentation/devicetree/bindings/arm/l2cc.txt4
-rw-r--r--arch/arm/mm/cache-l2x0.c4
2 files changed, 6 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/arm/l2cc.txt b/Documentation/devicetree/bindings/arm/l2cc.txt
index 69ddf9fad2dc..c0c7626fd0ff 100644
--- a/Documentation/devicetree/bindings/arm/l2cc.txt
+++ b/Documentation/devicetree/bindings/arm/l2cc.txt
@@ -16,9 +16,11 @@ Required properties:
performs the same operation).
"marvell,"aurora-outer-cache: Marvell Controller designed to be
compatible with the ARM one with outer cache mode.
- "bcm,bcm11351-a2-pl310-cache": For Broadcom bcm11351 chipset where an
+ "brcm,bcm11351-a2-pl310-cache": For Broadcom bcm11351 chipset where an
offset needs to be added to the address before passing down to the L2
cache controller
+ "bcm,bcm11351-a2-pl310-cache": DEPRECATED by
+ "brcm,bcm11351-a2-pl310-cache"
- cache-unified : Specifies the cache is a unified cache.
- cache-level : Should be set to 2 for a level 2 cache.
- reg : Physical base address and size of cache controller's memory mapped
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index ad4e8825f91e..f6a4bb2d2551 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -929,7 +929,9 @@ static const struct of_device_id l2x0_ids[] __initconst = {
.data = (void *)&aurora_no_outer_data},
{ .compatible = "marvell,aurora-outer-cache",
.data = (void *)&aurora_with_outer_data},
- { .compatible = "bcm,bcm11351-a2-pl310-cache",
+ { .compatible = "brcm,bcm11351-a2-pl310-cache",
+ .data = (void *)&bcm_l2x0_data},
+ { .compatible = "bcm,bcm11351-a2-pl310-cache", /* deprecated name */
.data = (void *)&bcm_l2x0_data},
{}
};
OpenPOWER on IntegriCloud