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authorMichael Hennerich <michael.hennerich@analog.com>2010-01-19 14:45:38 +0000
committerMike Frysinger <vapier@gentoo.org>2010-03-09 00:30:49 -0500
commitf3dec78333d6369161eb833dbd8c8f006f359fdf (patch)
tree1e77ad2e38e517f9a74a8f7fa67e1d5fe9e0eb5e
parent5e8d3210b5bffbe64afca9152241284a46611c7e (diff)
downloadblackbird-op-linux-f3dec78333d6369161eb833dbd8c8f006f359fdf.tar.gz
blackbird-op-linux-f3dec78333d6369161eb833dbd8c8f006f359fdf.zip
Blackfin: increase NR_IRQS beyond NR on-chip IRQs
This makes room for off-chip IRQ controllers. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
-rw-r--r--arch/blackfin/include/asm/irq.h3
-rw-r--r--arch/blackfin/mach-bf518/include/mach/irq.h3
-rw-r--r--arch/blackfin/mach-bf527/include/mach/irq.h3
-rw-r--r--arch/blackfin/mach-bf533/include/mach/irq.h3
-rw-r--r--arch/blackfin/mach-bf537/include/mach/irq.h3
-rw-r--r--arch/blackfin/mach-bf538/include/mach/irq.h3
-rw-r--r--arch/blackfin/mach-bf548/include/mach/irq.h3
-rw-r--r--arch/blackfin/mach-bf561/include/mach/irq.h3
-rw-r--r--arch/blackfin/mach-common/ints-priority.c2
9 files changed, 18 insertions, 8 deletions
diff --git a/arch/blackfin/include/asm/irq.h b/arch/blackfin/include/asm/irq.h
index e7c0623f9091..89de539ed010 100644
--- a/arch/blackfin/include/asm/irq.h
+++ b/arch/blackfin/include/asm/irq.h
@@ -12,6 +12,9 @@
#include <linux/irqflags.h>
+/* IRQs that may be used by external irq_chip controllers */
+#define NR_SPARE_IRQS 32
+
#include <mach/anomaly.h>
/* SYS_IRQS and NR_IRQS are defined in <mach-bf5xx/irq.h> */
diff --git a/arch/blackfin/mach-bf518/include/mach/irq.h b/arch/blackfin/mach-bf518/include/mach/irq.h
index 14e52ec7afa5..52edc8483911 100644
--- a/arch/blackfin/mach-bf518/include/mach/irq.h
+++ b/arch/blackfin/mach-bf518/include/mach/irq.h
@@ -151,7 +151,8 @@
#define GPIO_IRQ_BASE IRQ_PF0
-#define NR_IRQS (IRQ_PH15 + 1)
+#define NR_MACH_IRQS (IRQ_PH15 + 1)
+#define NR_IRQS (NR_MACH_IRQS + NR_SPARE_IRQS)
#define IVG7 7
#define IVG8 8
diff --git a/arch/blackfin/mach-bf527/include/mach/irq.h b/arch/blackfin/mach-bf527/include/mach/irq.h
index aa6579a64a2f..17604b4a81cc 100644
--- a/arch/blackfin/mach-bf527/include/mach/irq.h
+++ b/arch/blackfin/mach-bf527/include/mach/irq.h
@@ -151,7 +151,8 @@
#define GPIO_IRQ_BASE IRQ_PF0
-#define NR_IRQS (IRQ_PH15+1)
+#define NR_MACH_IRQS (IRQ_PH15 + 1)
+#define NR_IRQS (NR_MACH_IRQS + NR_SPARE_IRQS)
#define IVG7 7
#define IVG8 8
diff --git a/arch/blackfin/mach-bf533/include/mach/irq.h b/arch/blackfin/mach-bf533/include/mach/irq.h
index c31498be0bbb..1f7e9765d954 100644
--- a/arch/blackfin/mach-bf533/include/mach/irq.h
+++ b/arch/blackfin/mach-bf533/include/mach/irq.h
@@ -104,7 +104,8 @@ Core Emulation **
#define GPIO_IRQ_BASE IRQ_PF0
-#define NR_IRQS (IRQ_PF15+1)
+#define NR_MACH_IRQS (IRQ_PF15 + 1)
+#define NR_IRQS (NR_MACH_IRQS + NR_SPARE_IRQS)
#define IVG7 7
#define IVG8 8
diff --git a/arch/blackfin/mach-bf537/include/mach/irq.h b/arch/blackfin/mach-bf537/include/mach/irq.h
index 0defa9457e7f..9b2cbcac98e0 100644
--- a/arch/blackfin/mach-bf537/include/mach/irq.h
+++ b/arch/blackfin/mach-bf537/include/mach/irq.h
@@ -134,7 +134,8 @@
#define GPIO_IRQ_BASE IRQ_PF0
-#define NR_IRQS (IRQ_PH15+1)
+#define NR_MACH_IRQS (IRQ_PH15 + 1)
+#define NR_IRQS (NR_MACH_IRQS + NR_SPARE_IRQS)
#define IVG7 7
#define IVG8 8
diff --git a/arch/blackfin/mach-bf538/include/mach/irq.h b/arch/blackfin/mach-bf538/include/mach/irq.h
index a4b7fcbc556b..7a479d224dc7 100644
--- a/arch/blackfin/mach-bf538/include/mach/irq.h
+++ b/arch/blackfin/mach-bf538/include/mach/irq.h
@@ -110,7 +110,8 @@
#define GPIO_IRQ_BASE IRQ_PF0
-#define NR_IRQS (IRQ_PF15+1)
+#define NR_MACH_IRQS (IRQ_PF15 + 1)
+#define NR_IRQS (NR_MACH_IRQS + NR_SPARE_IRQS)
#define IVG7 7
#define IVG8 8
diff --git a/arch/blackfin/mach-bf548/include/mach/irq.h b/arch/blackfin/mach-bf548/include/mach/irq.h
index 106db05684ae..1f99b51a3d56 100644
--- a/arch/blackfin/mach-bf548/include/mach/irq.h
+++ b/arch/blackfin/mach-bf548/include/mach/irq.h
@@ -317,7 +317,8 @@ Events (highest priority) EMU 0
#define GPIO_IRQ_BASE IRQ_PA0
-#define NR_IRQS (IRQ_PJ15+1)
+#define NR_MACH_IRQS (IRQ_PJ15 + 1)
+#define NR_IRQS (NR_MACH_IRQS + NR_SPARE_IRQS)
/* For compatibility reasons with existing code */
diff --git a/arch/blackfin/mach-bf561/include/mach/irq.h b/arch/blackfin/mach-bf561/include/mach/irq.h
index 7b208db267bf..c95566ade51b 100644
--- a/arch/blackfin/mach-bf561/include/mach/irq.h
+++ b/arch/blackfin/mach-bf561/include/mach/irq.h
@@ -265,7 +265,8 @@
#define GPIO_IRQ_BASE IRQ_PF0
-#define NR_IRQS (IRQ_PF47 + 1)
+#define NR_MACH_IRQS (IRQ_PF47 + 1)
+#define NR_IRQS (NR_MACH_IRQS + NR_SPARE_IRQS)
#define IVG7 7
#define IVG8 8
diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c
index 3589fe8b86ba..ebf886091187 100644
--- a/arch/blackfin/mach-common/ints-priority.c
+++ b/arch/blackfin/mach-common/ints-priority.c
@@ -1114,7 +1114,7 @@ int __init init_arch_irq(void)
#endif
/* if configured as edge, then will be changed to do_edge_IRQ */
- for (irq = GPIO_IRQ_BASE; irq < NR_IRQS; irq++)
+ for (irq = GPIO_IRQ_BASE; irq < NR_MACH_IRQS; irq++)
set_irq_chip_and_handler(irq, &bfin_gpio_irqchip,
handle_level_irq);
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