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authorEric Anholt <eric@anholt.net>2010-11-06 14:53:33 -0700
committerChris Wilson <chris@chris-wilson.co.uk>2010-11-08 09:20:12 +0000
commit67e92af01cb6f7e9a5fd5c930c43cd6f6ef45929 (patch)
tree4f38b09eeb95365087a92d27744afd37c3ca40e8
parentde6e2eaf2c420bb8b0d4485913ef312a5539b489 (diff)
downloadblackbird-op-linux-67e92af01cb6f7e9a5fd5c930c43cd6f6ef45929.tar.gz
blackbird-op-linux-67e92af01cb6f7e9a5fd5c930c43cd6f6ef45929.zip
drm/i915: Apply display workaround required according to the B-Spec.
Not known to fix any current bugs. Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h2
-rw-r--r--drivers/gpu/drm/i915/intel_display.c4
2 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 09e2a5502652..61fe2619bb63 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -2609,6 +2609,8 @@
#define GTIER 0x4401c
#define ILK_DISPLAY_CHICKEN2 0x42004
+/* Required on all Ironlake and Sandybridge according to the B-Spec. */
+#define ILK_ELPIN_409_SELECT (1 << 25)
#define ILK_DPARB_GATE (1<<22)
#define ILK_VSDPFD_FULL (1<<21)
#define ILK_DSPCLK_GATE 0x42020
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 5ab403556846..c41dae5ade32 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5819,6 +5819,10 @@ void intel_init_clock_gating(struct drm_device *dev)
ILK_CLK_FBC);
}
+ I915_WRITE(ILK_DISPLAY_CHICKEN2,
+ I915_READ(ILK_DISPLAY_CHICKEN2) |
+ ILK_ELPIN_409_SELECT);
+
if (IS_GEN5(dev)) {
I915_WRITE(_3D_CHICKEN2,
_3D_CHICKEN2_WM_READ_PIPELINED << 16 |
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