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author | Paul Walmsley <paul@pwsan.com> | 2012-10-29 20:57:44 -0600 |
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committer | Paul Walmsley <paul@pwsan.com> | 2012-11-08 15:09:26 -0700 |
commit | b13159afb46f8a528fcf30bac26c07dbb40a784a (patch) | |
tree | c838c9b8f3fb59c27b89569fe8d18863984b4349 | |
parent | d9a16f9ab9332b7cf1c95086a4efb98a0d13a57a (diff) | |
download | blackbird-op-linux-b13159afb46f8a528fcf30bac26c07dbb40a784a.tar.gz blackbird-op-linux-b13159afb46f8a528fcf30bac26c07dbb40a784a.zip |
ARM: OMAP2+: PRCM: consolidate PRCM-related timeout macros
Consolidate all of the copies of MAX_MODULE_HARDRESET_WAIT and
MAX_MODULE_SOFTRESET_WAIT into one place, arch/arm/mach-omap2/prm.h.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Tested-by: Vaibhav Hiremath <hvaibhav@ti.com>
-rw-r--r-- | arch/arm/mach-omap2/display.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/hdq1w.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-omap2/i2c.c | 6 | ||||
-rw-r--r-- | arch/arm/mach-omap2/msdi.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-omap2/prcm-common.h | 6 | ||||
-rw-r--r-- | arch/arm/mach-omap2/prm.h | 17 | ||||
-rw-r--r-- | arch/arm/mach-omap2/prm2xxx_3xxx.h | 7 | ||||
-rw-r--r-- | arch/arm/mach-omap2/wd_timer.c | 5 |
9 files changed, 25 insertions, 30 deletions
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c index 89c57129357a..38ba58c97628 100644 --- a/arch/arm/mach-omap2/display.c +++ b/arch/arm/mach-omap2/display.c @@ -35,6 +35,7 @@ #include "mux.h" #include "control.h" #include "display.h" +#include "prm.h" #define DISPC_CONTROL 0x0040 #define DISPC_CONTROL2 0x0238 @@ -512,7 +513,6 @@ static void dispc_disable_outputs(void) } } -#define MAX_MODULE_SOFTRESET_WAIT 10000 int omap_dss_reset(struct omap_hwmod *oh) { struct omap_hwmod_opt_clk *oc; diff --git a/arch/arm/mach-omap2/hdq1w.c b/arch/arm/mach-omap2/hdq1w.c index 3da8900598c8..ab7bf181a105 100644 --- a/arch/arm/mach-omap2/hdq1w.c +++ b/arch/arm/mach-omap2/hdq1w.c @@ -31,11 +31,9 @@ #include "omap_device.h" #include "hdq1w.h" +#include "prm.h" #include "common.h" -/* Maximum microseconds to wait for OMAP module to softreset */ -#define MAX_MODULE_SOFTRESET_WAIT 10000 - /** * omap_hdq1w_reset - reset the OMAP HDQ1W module * @oh: struct omap_hwmod * diff --git a/arch/arm/mach-omap2/i2c.c b/arch/arm/mach-omap2/i2c.c index ad55b943108f..be092e8e5d85 100644 --- a/arch/arm/mach-omap2/i2c.c +++ b/arch/arm/mach-omap2/i2c.c @@ -20,10 +20,11 @@ */ #include "soc.h" -#include "common.h" #include "omap_hwmod.h" #include "omap_device.h" +#include "prm.h" +#include "common.h" #include "mux.h" #include "i2c.h" @@ -32,9 +33,6 @@ #define OMAP2_I2C_CON_OFFSET 0x24 #define OMAP4_I2C_CON_OFFSET 0xA4 -/* Maximum microseconds to wait for OMAP module to softreset */ -#define MAX_MODULE_SOFTRESET_WAIT 10000 - #define MAX_OMAP_I2C_HWMOD_NAME_LEN 16 static void __init omap2_i2c_mux_pins(int bus_id) diff --git a/arch/arm/mach-omap2/msdi.c b/arch/arm/mach-omap2/msdi.c index 627e97e30743..aafdd4ca9f4f 100644 --- a/arch/arm/mach-omap2/msdi.c +++ b/arch/arm/mach-omap2/msdi.c @@ -25,6 +25,7 @@ #include <linux/err.h> #include <linux/platform_data/gpio-omap.h> +#include "prm.h" #include "common.h" #include "control.h" #include "omap_hwmod.h" @@ -43,9 +44,6 @@ #define MSDI_CON_CLKD_MASK (0x3f << 0) #define MSDI_CON_CLKD_SHIFT 0 -/* Maximum microseconds to wait for OMAP module to softreset */ -#define MAX_MODULE_SOFTRESET_WAIT 10000 - /* MSDI_TARGET_RESET_CLKD: clock divisor to use throughout the reset */ #define MSDI_TARGET_RESET_CLKD 0x3ff diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 37eeb45612f8..54b68121734c 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -151,6 +151,7 @@ #include "cm3xxx.h" #include "cminst44xx.h" #include "cm33xx.h" +#include "prm.h" #include "prm3xxx.h" #include "prm44xx.h" #include "prm33xx.h" @@ -158,9 +159,6 @@ #include "mux.h" #include "pm.h" -/* Maximum microseconds to wait for OMAP module to softreset */ -#define MAX_MODULE_SOFTRESET_WAIT 10000 - /* Name of the OMAP hwmod for the MPU */ #define MPU_INITIATOR_NAME "mpu" diff --git a/arch/arm/mach-omap2/prcm-common.h b/arch/arm/mach-omap2/prcm-common.h index b25a32a5e548..c7d355fafd24 100644 --- a/arch/arm/mach-omap2/prcm-common.h +++ b/arch/arm/mach-omap2/prcm-common.h @@ -406,11 +406,6 @@ #define OMAP3430_EN_CORE_MASK (1 << 0) -/* - * MAX_MODULE_HARDRESET_WAIT: Maximum microseconds to wait for an OMAP - * submodule to exit hardreset - */ -#define MAX_MODULE_HARDRESET_WAIT 10000 /* * Maximum time(us) it takes to output the signal WUCLKOUT of the last @@ -419,7 +414,6 @@ * microseconds on OMAP4, so this timeout may be too high. */ #define MAX_IOPAD_LATCH_TIME 100 - # ifndef __ASSEMBLER__ /** diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h index fb7dee29ce76..a1a266ce90da 100644 --- a/arch/arm/mach-omap2/prm.h +++ b/arch/arm/mach-omap2/prm.h @@ -20,6 +20,23 @@ extern void __iomem *prm_base; extern void omap2_set_globals_prm(void __iomem *prm); # endif + +/* + * MAX_MODULE_SOFTRESET_WAIT: Maximum microseconds to wait for OMAP + * module to softreset + */ +#define MAX_MODULE_SOFTRESET_WAIT 10000 + +/* + * MAX_MODULE_HARDRESET_WAIT: Maximum microseconds to wait for an OMAP + * submodule to exit hardreset + */ +#define MAX_MODULE_HARDRESET_WAIT 10000 + +/* + * Register bitfields + */ + /* * 24XX: PM_PWSTST_CORE, PM_PWSTST_GFX, PM_PWSTST_MPU, PM_PWSTST_DSP * diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach-omap2/prm2xxx_3xxx.h index 3330b1bf789d..78532d6fecd7 100644 --- a/arch/arm/mach-omap2/prm2xxx_3xxx.h +++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h @@ -241,11 +241,4 @@ extern int omap2_clkdm_clear_all_wkdeps(struct clockdomain *clkdm); #define OMAP_LOGICRETSTATE_MASK (1 << 2) -/* - * MAX_MODULE_HARDRESET_WAIT: Maximum microseconds to wait for an OMAP - * submodule to exit hardreset - */ -#define MAX_MODULE_HARDRESET_WAIT 10000 - - #endif diff --git a/arch/arm/mach-omap2/wd_timer.c b/arch/arm/mach-omap2/wd_timer.c index 5a8629ff0ab0..7c2b4ed38f02 100644 --- a/arch/arm/mach-omap2/wd_timer.c +++ b/arch/arm/mach-omap2/wd_timer.c @@ -1,6 +1,8 @@ /* * OMAP2+ MPU WD_TIMER-specific code * + * Copyright (C) 2012 Texas Instruments, Inc. + * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or @@ -30,9 +32,6 @@ #define OMAP_WDT_WPS 0x34 #define OMAP_WDT_SPR 0x48 -/* Maximum microseconds to wait for OMAP module to softreset */ -#define MAX_MODULE_SOFTRESET_WAIT 10000 - int omap2_wd_timer_disable(struct omap_hwmod *oh) { void __iomem *base; |