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| author | Zachary Amsden <zach@vmware.com> | 2005-09-03 15:56:38 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@evo.osdl.org> | 2005-09-05 00:06:11 -0700 |
| commit | 2f2984eb4afb2a4298e3186cb49cc7e88dd6d929 (patch) | |
| tree | 213dfa4726dd010b226fbfffac9da0fbe140b3fe | |
| parent | 4d37e7e3fd851428dede4d05d3e69d03795a744a (diff) | |
| download | blackbird-op-linux-2f2984eb4afb2a4298e3186cb49cc7e88dd6d929.tar.gz blackbird-op-linux-2f2984eb4afb2a4298e3186cb49cc7e88dd6d929.zip | |
[PATCH] i386: generate better code around descriptor update and access functions
GCC can generate better code around descriptor update and access functions
when there is not an explicit "eax" register constraint.
Testing: You won't boot if this is messed up, since the TSS descriptor will be
corrupted. Verified the assembler and booted.
Signed-off-by: Zachary Amsden <zach@vmware.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
| -rw-r--r-- | include/asm-i386/desc.h | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/include/asm-i386/desc.h b/include/asm-i386/desc.h index 9a0b85a52e71..ccb11c032839 100644 --- a/include/asm-i386/desc.h +++ b/include/asm-i386/desc.h @@ -27,8 +27,8 @@ struct Xgt_desc_struct { extern struct Xgt_desc_struct idt_descr, cpu_gdt_descr[NR_CPUS]; -#define load_TR_desc() __asm__ __volatile__("ltr %%ax"::"a" (GDT_ENTRY_TSS*8)) -#define load_LDT_desc() __asm__ __volatile__("lldt %%ax"::"a" (GDT_ENTRY_LDT*8)) +#define load_TR_desc() __asm__ __volatile__("ltr %w0"::"q" (GDT_ENTRY_TSS*8)) +#define load_LDT_desc() __asm__ __volatile__("lldt %w0"::"q" (GDT_ENTRY_LDT*8)) #define load_gdt(dtr) __asm__ __volatile("lgdt %0"::"m" (*dtr)) #define load_idt(dtr) __asm__ __volatile("lidt %0"::"m" (*dtr)) @@ -49,14 +49,14 @@ extern void set_intr_gate(unsigned int irq, void * addr); #define _set_tssldt_desc(n,addr,limit,type) \ __asm__ __volatile__ ("movw %w3,0(%2)\n\t" \ - "movw %%ax,2(%2)\n\t" \ - "rorl $16,%%eax\n\t" \ - "movb %%al,4(%2)\n\t" \ + "movw %w1,2(%2)\n\t" \ + "rorl $16,%1\n\t" \ + "movb %b1,4(%2)\n\t" \ "movb %4,5(%2)\n\t" \ "movb $0,6(%2)\n\t" \ - "movb %%ah,7(%2)\n\t" \ - "rorl $16,%%eax" \ - : "=m"(*(n)) : "a" (addr), "r"(n), "ir"(limit), "i"(type)) + "movb %h1,7(%2)\n\t" \ + "rorl $16,%1" \ + : "=m"(*(n)) : "q" (addr), "r"(n), "ir"(limit), "i"(type)) static inline void __set_tss_desc(unsigned int cpu, unsigned int entry, void *addr) { |
