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<title>blackbird-op-linux/include/soc/nps, branch master</title>
<subtitle>Blackbird™ Linux sources for OpenPOWER</subtitle>
<id>https://git.raptorcs.com/git/blackbird-op-linux/atom?h=master</id>
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<updated>2016-11-30T19:54:25+00:00</updated>
<entry>
<title>soc: Support for NPS HW scheduling</title>
<updated>2016-11-30T19:54:25+00:00</updated>
<author>
<name>Noam Camus</name>
<email>noamca@mellanox.com</email>
</author>
<published>2016-11-16T06:31:11+00:00</published>
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<id>urn:sha1:09dcd1958be42ea473fef24a2c02d975f520ea71</id>
<content type='text'>
This new header file is for NPS400 SoC (part of ARC architecture).
The header file includes macros for save/restore of HW scheduling.
The control of HW scheduling is achieved by writing core registers.
This code was moved from arc/plat-eznps so it can be used
from drivers/clocksource/, available only for CONFIG_EZNPS_MTM_EXT.

Signed-off-by: Noam Camus &lt;noamca@mellanox.com&gt;
Acked-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
</content>
</entry>
<entry>
<title>soc: Support for EZchip SoC</title>
<updated>2016-05-09T04:02:31+00:00</updated>
<author>
<name>Noam Camus</name>
<email>noamc@ezchip.com</email>
</author>
<published>2015-12-06T07:00:56+00:00</published>
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<id>urn:sha1:ebc326be87e5989a878872cd3e42cc0061458ab7</id>
<content type='text'>
This header file is for NPS400 SoC.
It includes macros for accessing memory mapped registers.
These are functional registers that core can use to configure SoC.

Signed-off-by: Noam Camus &lt;noamc@ezchip.com&gt;
Acked-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Acked-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
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