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<title>blackbird-op-linux/drivers/tty/serial/msm_serial.h, branch master</title>
<subtitle>Blackbird™ Linux sources for OpenPOWER</subtitle>
<id>https://git.raptorcs.com/git/blackbird-op-linux/atom?h=master</id>
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<updated>2016-06-25T17:23:54+00:00</updated>
<entry>
<title>tty: serial: msm: Move header file into driver</title>
<updated>2016-06-25T17:23:54+00:00</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@codeaurora.org</email>
</author>
<published>2016-05-12T01:02:26+00:00</published>
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<id>urn:sha1:321737416c72dc3d3dd8753c3684c6eb86d0ea6c</id>
<content type='text'>
This header file is only used by the driver, so let's merge the
two together to reduce files and make it easier to see the whole
driver without flipping through two files. This also makes it
easier to use the structures defined in msm_serial.c in the
functions that are defined in msm_serial.h by placing them in the
proper locations.

Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Acked-by: Andy Gross &lt;andy.gross@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>tty: serial: msm: Add RX DMA support</title>
<updated>2015-10-04T18:15:17+00:00</updated>
<author>
<name>Ivan T. Ivanov</name>
<email>ivan.ivanov@linaro.org</email>
</author>
<published>2015-09-30T12:27:02+00:00</published>
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<id>urn:sha1:99693945013a5178e1944f9409a1527d80b33abc</id>
<content type='text'>
Add receive DMA support for UARTDM type of controllers.

Tested on APQ8064, which have UARTDM v1.3 and ADM DMA engine
and APQ8016, which have UARTDM v1.4 and BAM DMA engine.

Signed-off-by: Ivan T. Ivanov &lt;ivan.ivanov@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>tty: serial: msm: Add TX DMA support</title>
<updated>2015-10-04T18:15:17+00:00</updated>
<author>
<name>Ivan T. Ivanov</name>
<email>ivan.ivanov@linaro.org</email>
</author>
<published>2015-09-30T12:27:01+00:00</published>
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<id>urn:sha1:3a878c430fd6eb4f8587f9ebd187f773bf85d1d6</id>
<content type='text'>
Add transmit DMA support for UARTDM type of controllers.

Tested on APQ8064, which have UARTDM v1.3 and ADM DMA engine
and APQ8016, which have UARTDM v1.4 and BAM DMA engine.

Signed-off-by: Ivan T. Ivanov &lt;ivan.ivanov@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>tty: serial: msm: replaces (1 &lt;&lt; x) with BIT(x) macro</title>
<updated>2015-10-04T18:15:17+00:00</updated>
<author>
<name>Pramod Gurav</name>
<email>gpramod@codeaurora.org</email>
</author>
<published>2015-09-30T12:26:59+00:00</published>
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<id>urn:sha1:eec43b8afaf57af5dfbbdcd92c64e83a3ef8ca57</id>
<content type='text'>
Replaces (1 &lt;&lt; x) with BIT(x) macro

Signed-off-by: Pramod Gurav &lt;gpramod@codeaurora.org&gt;
Reviewed-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Signed-off-by: Ivan T. Ivanov &lt;ivan.ivanov@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>tty: serial: msm: Add mask value for UART_DM registers</title>
<updated>2015-10-04T18:15:17+00:00</updated>
<author>
<name>Pramod Gurav</name>
<email>gpramod@codeaurora.org</email>
</author>
<published>2015-09-30T12:26:58+00:00</published>
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<id>urn:sha1:12b9b9f186f336ad6fe7adcbad48bd5340af9abb</id>
<content type='text'>
The bit masks for RFR_LEVEL1 and STALE_TIMEOUT_MSB values in MR1 and
IPR registers respectively are different for UART and UART_DM hardware
cores. We have been using UART core mask values for these. Add the same
for UART_DM core.

There is no bit setting as UART_IPR_RXSTALE_LAST for UART_DM core so do
it only for UART core.

Signed-off-by: Pramod Gurav &lt;gpramod@codeaurora.org&gt;
Reviewed-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Signed-off-by: Ivan T. Ivanov &lt;ivan.ivanov@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>tty: serial: msm_serial: Remove dead code</title>
<updated>2015-03-26T21:31:09+00:00</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@codeaurora.org</email>
</author>
<published>2015-03-13T18:09:37+00:00</published>
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<id>urn:sha1:e23407d8b3e4b3011520e5140322fddd34172173</id>
<content type='text'>
This config no longer exists now that mach-msm has been removed.
Delete it and the associated code.

Cc: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
Cc: David Brown &lt;davidb@codeaurora.org&gt;
Cc: Bryan Huntsman &lt;bryanh@codeaurora.org&gt;
Cc: Daniel Walker &lt;dwalker@fifo99.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>tty: serial: msm: Support sysrq on uartDM devices</title>
<updated>2014-11-06T22:57:22+00:00</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@codeaurora.org</email>
</author>
<published>2014-10-29T18:14:38+00:00</published>
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<id>urn:sha1:0896d4d4fb162297d7199410bae386a96a2e473b</id>
<content type='text'>
To properly support sysrq on uartDM hardware we need to properly
handle break characters. With the DM hardware the fifo can pack 4
characters at a time, where a break is indicated by an all zero
byte. Unfortunately, we can't differentiate between an all zero
byte for a break and an all zero byte of data, so try and do as
best we can. First unmask the RX break start interrupt and record
the interrupt when it arrives. Then while processing the fifo,
detect the break by searching for an all zero character as long
as we recently received an RX break start interrupt. This should
make sysrq work fairly well.

Cc: Frank Rowand &lt;frank.rowand@sonymobile.com&gt;
Cc: Daniel Thompson &lt;daniel.thompson@linaro.org&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>tty: serial: msm: Support big-endian CPUs</title>
<updated>2014-07-10T23:10:42+00:00</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@codeaurora.org</email>
</author>
<published>2014-06-30T21:54:01+00:00</published>
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<id>urn:sha1:68252424a7c757ce0a534696e22e1770408bc01d</id>
<content type='text'>
To support big-endian CPUs use the string versions of the io
read/write macros on the TX/RX fifos and the non-raw variants of
the readl/writel macros throughout. This way we don't byteswap
the characters coming from the fifos but we properly deal with
the little-endian nature of the serial hardware while controlling
it.

Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>tty: serial: msm: Remove direct access to GSBI</title>
<updated>2014-05-29T16:06:20+00:00</updated>
<author>
<name>Andy Gross</name>
<email>agross@codeaurora.org</email>
</author>
<published>2014-04-24T16:31:22+00:00</published>
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<id>urn:sha1:31964ffebbb958c6cf289c7c12edd7530d6221b9</id>
<content type='text'>
This patch removes direct access of the GSBI registers.  GSBI configuration
should be done through the GSBI driver directly.

Signed-off-by: Andy Gross &lt;agross@codeaurora.org&gt;
Signed-off-by: Kumar Gala &lt;galak@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>msm_serial: Add support for poll_{get,put}_char()</title>
<updated>2014-02-12T19:34:23+00:00</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@codeaurora.org</email>
</author>
<published>2014-01-14T20:34:55+00:00</published>
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<id>urn:sha1:f7e54d7ad743a0cf0e400ac185036df6a592567c</id>
<content type='text'>
Implement the polling functionality for the MSM serial driver.
This allows us to use KGDB on this hardware.

Cc: David Brown &lt;davidb@codeaurora.org&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
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