blackbird-op-linux/drivers/spi, branch master

treewide: remove redundant IS_ERR() before error code check

2020-02-04T03:05:27+00:00

'PTR_ERR(p) == -E*' is a stronger condition than IS_ERR(p). Hence, IS_ERR(p) is unneeded. The semantic patch that generates this commit is as follows: // @@ expression ptr; constant error_code; @@ -IS_ERR(ptr) && (PTR_ERR(ptr) == - error_code) +PTR_ERR(ptr) == - error_code // Link: http://lkml.kernel.org/r/20200106045833.1725-1-masahiroy@kernel.org Signed-off-by: Masahiro Yamada Cc: Julia Lawall Acked-by: Stephen Boyd [drivers/clk/clk.c] Acked-by: Bartosz Golaszewski [GPIO] Acked-by: Wolfram Sang [drivers/i2c] Acked-by: Rafael J. Wysocki [acpi/scan.c] Acked-by: Rob Herring Cc: Eric Biggers Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds

Merge tag 'ioremap-5.6' of git://git.infradead.org/users/hch/ioremap

2020-01-27T21:03:00+00:00

Pull ioremap updates from Christoph Hellwig: "Remove the ioremap_nocache API (plus wrappers) that are always identical to ioremap" * tag 'ioremap-5.6' of git://git.infradead.org/users/hch/ioremap: remove ioremap_nocache and devm_ioremap_nocache MIPS: define ioremap_nocache to ioremap

Merge branch 'spi-5.6' into spi-next

2020-01-23T12:37:18+00:00

Merge branch 'spi-5.5' into spi-linus

2020-01-23T12:37:15+00:00

spi: pxa2xx: Avoid touching SSCR0_SSE on MMP2

2020-01-21T17:17:35+00:00

A read from a Winbond W25Q32FV SPI NOR memory chip on my MMP2 returns wrong data. It seems like SSE doesn't do the right thing on MMP2 at all. After enabling the SPI port back again, the FIFO reads return garbage. Things can be brought back to order by telling the PMU to reset the block. Here's a good transaction with said chip: # busybox devmem 0xd4035000 32 0x00001987 # SSCR0 # echo 0 >/sys/class/gpio/gpio46/value # (assert CS) # busybox devmem 0xd4035010 32 0x0000009f # SSDR (read ID command) # busybox devmem 0xd4035010 32 0x00000000 # SSDR # busybox devmem 0xd4035010 32 0x00000000 # SSDR # busybox devmem 0xd4035010 32 0x00000000 # SSDR # busybox devmem 0xd4035010 32 0x00000000 # SSDR # busybox devmem 0xd4035010 32 0x00000000 # SSDR # busybox devmem 0xd4035010 32 0x00000000 # SSDR # busybox devmem 0xd4035010 # SSDR 0x000000ff # busybox devmem 0xd4035010 # SSDR 0x000000ef # Correct response # busybox devmem 0xd4035010 # SSDR 0x00000040 # busybox devmem 0xd4035010 # SSDR 0x00000016 # busybox devmem 0xd4035010 # SSDR 0x00000000 # busybox devmem 0xd4035010 # SSDR 0x00000000 # busybox devmem 0xd4035010 # SSDR 0x00000000 # echo 1 >/sys/class/gpio/gpio46/value # (deassert CS) # Flipping off an on SSE, then running another transaction: # busybox devmem 0xd4035000 32 0x00001907 # SSCR0, SSE off # busybox devmem 0xd4035000 32 0x00001987 # SSCR0, SSE on # echo 0 >/sys/class/gpio/gpio46/value # (assert CS) # busybox devmem 0xd4035010 32 0x0000009f # SSDR (read ID command) # busybox devmem 0xd4035010 32 0x00000000 # SSDR # busybox devmem 0xd4035010 32 0x00000000 # SSDR # busybox devmem 0xd4035010 32 0x00000000 # SSDR # busybox devmem 0xd4035010 32 0x00000000 # SSDR # busybox devmem 0xd4035010 32 0x00000000 # SSDR # busybox devmem 0xd4035010 32 0x00000000 # SSDR # busybox devmem 0xd4035010 # SSDR 0x000000ff # busybox devmem 0xd4035010 # SSDR 0x000000ff # Garbage! # busybox devmem 0xd4035010 # SSDR 0x000000ff # Oh no # busybox devmem 0xd4035010 # SSDR 0x000000ff # busybox devmem 0xd4035010 # SSDR 0x000000ff # busybox devmem 0xd4035010 # SSDR 0x000000ff # busybox devmem 0xd4035010 # SSDR 0x000000ff # echo 1 >/sys/class/gpio/gpio46/value # (deassert CS) # Sometimes the response is not just ones, but something that looks like bits of a response from a previous transaction. I can't see a fix other than not touching the SSE altogether after the device is first brought up. Signed-off-by: Lubomir Rintel Link: https://lore.kernel.org/r/20200118094031.327373-1-lkundrak@v3.sk Signed-off-by: Mark Brown

spi: spi-fsl-qspi: Ensure width is respected in spi-mem operations

2020-01-21T17:08:27+00:00

Make use of a core helper to ensure the desired width is respected when calling spi-mem operators. Otherwise only the SPI controller will be matched with the flash chip, which might lead to wrong widths. Also consider the width specified by the user in the device tree. Fixes: 84d043185dbe ("spi: Add a driver for the Freescale/NXP QuadSPI controller") Signed-off-by: Michael Walle Link: https://lore.kernel.org/r/20200114154613.8195-1-michael@walle.cc Signed-off-by: Mark Brown

spi: npcm-pspi: modify reset support

2020-01-17T15:38:21+00:00

Modify NPCM perphiral SPI reset support from direct register access to reset controller support. Signed-off-by: Tomer Maimon Link: https://lore.kernel.org/r/20200115162301.235926-5-tmaimon77@gmail.com Signed-off-by: Mark Brown

spi: npcm-pspi: improve spi transfer performance

2020-01-17T15:38:02+00:00

Improving spi 8 bit per word mode transfer performance by using 16 bit per word transfer and receive when the data length is even and larger than one. Signed-off-by: Tomer Maimon Link: https://lore.kernel.org/r/20200115162301.235926-3-tmaimon77@gmail.com Signed-off-by: Mark Brown

spi: spi-ti-qspi: fix warning

2020-01-17T15:37:44+00:00

drivers/spi/spi-ti-qspi.c: In function ‘ti_qspi_start_transfer_one’: drivers/spi/spi-ti-qspi.c:392:8: warning: ‘rx_wlen’ may be used uninitialized in this function [-Wmaybe-uninitialized] 392 | if (rx_wlen >= 32) | ^ drivers/spi/spi-ti-qspi.c:318:12: note: ‘rx_wlen’ was declared here 318 | u8 rxlen, rx_wlen; | ^~~~~~~ The warning is a false positive; it is not thrown by all compiler versions, e.g. Red Hat Cross 9.2.1-1 but not Linaro GCC 7.5-2019.12. Signed-off-by: Jean Pihet Link: https://lore.kernel.org/r/20200115100700.3357-1-jean.pihet@newoldbits.com Signed-off-by: Mark Brown

spi: npcm-pspi: fix 16 bit send and receive support

2020-01-17T15:35:51+00:00

Fixing NPCM BMC Peripheral SPI controller 16 bit send and receive support by writing and reading the SPI data in the right order. Signed-off-by: Tomer Maimon Link: https://lore.kernel.org/r/20200115162301.235926-2-tmaimon77@gmail.com Signed-off-by: Mark Brown