blackbird-op-linux/drivers/hwtracing/coresight, branch master

coresight: etm4x: Fix unused function warning

2020-01-14T14:38:28+00:00

Some of the newly added code in the etm4x driver is inside of an #ifdef, and some other code is outside of it, leading to a harmless warning when CONFIG_CPU_PM is disabled: drivers/hwtracing/coresight/coresight-etm4x.c:68:13: error: 'etm4_os_lock' defined but not used [-Werror=unused-function] static void etm4_os_lock(struct etmv4_drvdata *drvdata) ^~~~~~~~~~~~ To avoid the warning and simplify the the #ifdef checks, use IS_ENABLED() instead, so the compiler can drop the unused functions without complaining. Fixes: f188b5e76aae ("coresight: etm4x: Save/restore state across CPU low power states") Signed-off-by: Arnd Bergmann [Fixed capital 'f' in title] Signed-off-by: Mathieu Poirier Link: https://lore.kernel.org/r/20191213223107.1484-2-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman

coresight: replicator: Fix missing spin_lock_init()

2019-11-19T18:18:15+00:00

The driver allocates the spinlock but not initialize it. Use spin_lock_init() on it to initialize it correctly. This is detected by Coccinelle semantic patch. Signed-off-by: Wei Yongjun Tested-by: Yabin Cui Signed-off-by: Mathieu Poirier Link: https://lore.kernel.org/r/20191118185207.30441-3-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman

coresight: funnel: Fix missing spin_lock_init()

2019-11-19T18:18:15+00:00

The driver allocates the spinlock but not initialize it. Use spin_lock_init() on it to initialize it correctly. This is detected by Coccinelle semantic patch. Signed-off-by: Wei Yongjun Tested-by: Yabin Cui Signed-off-by: Mathieu Poirier Link: https://lore.kernel.org/r/20191118185207.30441-2-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman

coresight: etm4x: Fix BMVAL misuse

2019-11-04T20:57:58+00:00

The second argument should be the lsb and the third argument should be the msb. Signed-off-by: Rikard Falkeborn Signed-off-by: Mathieu Poirier Link: https://lore.kernel.org/r/20191104181251.26732-15-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman

coresight: Serialize enabling/disabling a link device.

2019-11-04T20:57:57+00:00

When tracing etm data of multiple threads on multiple cpus through perf interface, some link devices are shared between paths of different cpus. It creates race conditions when different cpus wants to enable/disable the same link device at the same time. Example 1: Two cpus want to enable different ports of a coresight funnel, thus calling the funnel enable operation at the same time. But the funnel enable operation isn't reentrantable. Example 2: For an enabled coresight dynamic replicator with refcnt=1, one cpu wants to disable it, while another cpu wants to enable it. Ideally we still have an enabled replicator with refcnt=1 at the end. But in reality the result is uncertain. Since coresight devices claim themselves when enabled for self-hosted usage, the race conditions above usually make the link devices not usable after many cycles. To fix the race conditions, this patch uses spinlocks to serialize enabling/disabling link devices. Fixes: a06ae8609b3d ("coresight: add CoreSight core layer framework") Signed-off-by: Yabin Cui Signed-off-by: Mathieu Poirier Cc: stable # 5.3 Link: https://lore.kernel.org/r/20191104181251.26732-14-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman

coresight: Add explicit architecture dependency

2019-11-04T20:57:57+00:00

Coresight hardware is only likely to appear on Arm systems and currently the core code has Arm-specific barrier operations in it so can't be built anywhere else so add an explicit dependency saying so. This will make no practical difference currently due to the way subsystems are referenced, the subsystem is only pulled in on arm and arm64, so mainly serves as documentation in case someone wants to increase build coverage. Signed-off-by: Mark Brown Signed-off-by: Mathieu Poirier Link: https://lore.kernel.org/r/20191104181251.26732-13-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman

coresight: etm4x: Add missing single-shot control API to sysfs

2019-11-04T20:57:56+00:00

An API to control single-shot comparator operation was missing from sysfs. This adds the parameters to sysfs to allow programming of this feature. Signed-off-by: Mike Leach Signed-off-by: Mathieu Poirier Link: https://lore.kernel.org/r/20191104181251.26732-12-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman

coresight: etm4x: Add view comparator settings API to sysfs.

2019-11-04T20:57:56+00:00

Currently it is not possible to view the current settings of a given address comparator without knowing what type it is set to. For example, if a comparator is set as an addr_start comparator, attempting to read addr_stop for the same index will result in an error. addr_cmp_view is added to allow the user to see the current settings of the indexed address comparator without resorting to trial and error when the set type is not known. Signed-off-by: Mike Leach Reviewed-by: Leo Yan Signed-off-by: Mathieu Poirier Link: https://lore.kernel.org/r/20191104181251.26732-11-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman

coresight: etm4x: Improve usability of sysfs - CID and VMID masks.

2019-11-04T20:57:55+00:00

Context ID and VM ID masks required 2 value inputs, even when the second value is ignored as insufficient CID / VMID comparators are implemented. Permit a single value to be used if that is sufficient to cover all implemented comparators. Signed-off-by: Mike Leach Signed-off-by: Mathieu Poirier Link: https://lore.kernel.org/r/20191104181251.26732-10-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman

coresight: etm4x: Improve usability of sysfs - include/exclude addr.

2019-11-04T20:57:55+00:00

Setting include / exclude on a range had to be done by setting the bit in 'mode' before setting the range. However, setting this bit also had the effect of altering the current range as well. Changed to only set include / exclude setting of a range at the point of setting that range. Either use a 3rd input parameter as the include exclude value, or if not present use the current value of 'mode'. Do not change current range when 'mode' changes. Signed-off-by: Mike Leach Signed-off-by: Mathieu Poirier Link: https://lore.kernel.org/r/20191104181251.26732-9-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman