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<title>blackbird-op-linux/Documentation/devicetree/bindings/arm/mrvl, branch master</title>
<subtitle>Blackbird™ Linux sources for OpenPOWER</subtitle>
<id>https://git.raptorcs.com/git/blackbird-op-linux/atom?h=master</id>
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<updated>2019-10-17T14:18:28+00:00</updated>
<entry>
<title>dt-bindings: arm: mrvl: Document MMP3 compatible string</title>
<updated>2019-10-17T14:18:28+00:00</updated>
<author>
<name>Lubomir Rintel</name>
<email>lkundrak@v3.sk</email>
</author>
<published>2019-06-21T12:20:59+00:00</published>
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<id>urn:sha1:95aecb71b84e01704a36cae8016e12e486374784</id>
<content type='text'>
Marvel MMP3 is a successor to MMP2, containing similar peripherals with two
PJ4B cores.

Signed-off-by: Lubomir Rintel &lt;lkundrak@v3.sk&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: arm: Convert Marvell MMP board/soc bindings to json-schema</title>
<updated>2019-10-17T14:18:27+00:00</updated>
<author>
<name>Lubomir Rintel</name>
<email>lkundrak@v3.sk</email>
</author>
<published>2019-08-22T08:34:23+00:00</published>
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<id>urn:sha1:c3294ea3417056c85d0eaaab1b76ed8a98e29171</id>
<content type='text'>
Convert Marvell MMP SoC bindings to DT schema format using json-schema.

Signed-off-by: Lubomir Rintel &lt;lkundrak@v3.sk&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: arm: mrvl: amend Browstone compatible string</title>
<updated>2018-12-13T17:10:46+00:00</updated>
<author>
<name>Lubomir Rintel</name>
<email>lkundrak@v3.sk</email>
</author>
<published>2018-12-02T11:40:08+00:00</published>
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<id>urn:sha1:cd1cc0bef46fc8d8f9ebe82d2064d4f4bd5ecf16</id>
<content type='text'>
The Brownstone board is compatible with "mrvl,mmp2". The actual DTS
already contains the string -- add it to the binding doc as well.

Signed-off-by: Lubomir Rintel &lt;lkundrak@v3.sk&gt;
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: move various timer bindings to timer/ directory</title>
<updated>2018-04-27T21:56:47+00:00</updated>
<author>
<name>Rob Herring</name>
<email>robh@kernel.org</email>
</author>
<published>2018-04-25T19:24:59+00:00</published>
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<id>urn:sha1:2359ccddc1c3f4752f43cc19b3db189710b15791</id>
<content type='text'>
Bindings are supposed to be organized by device class/function. Move
bindings for various timers to timer/ binding directory.

Cc: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Acked-by: Thierry Reding &lt;thierry.reding@gmail.com&gt;
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: consolidate interrupt controller bindings</title>
<updated>2015-10-22T14:21:25+00:00</updated>
<author>
<name>Rob Herring</name>
<email>robh@kernel.org</email>
</author>
<published>2015-10-02T03:24:09+00:00</published>
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<id>urn:sha1:eb3fcf007fffe5830d815e713591f3e858f2a365</id>
<content type='text'>
Move various interrupt controller bindings into the
interrupt-controller/ directory.

Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
Cc: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
Cc: linux-mediatek@lists.infradead.org
</content>
</entry>
<entry>
<title>ARM: MM: Add DT binding for Feroceon L2 cache</title>
<updated>2014-02-22T20:43:49+00:00</updated>
<author>
<name>Andrew Lunn</name>
<email>andrew@lunn.ch</email>
</author>
<published>2014-02-22T19:14:52+00:00</published>
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<id>urn:sha1:4b8f7a11c9fb680895e5079788653a59d6bdde16</id>
<content type='text'>
Instantiate the L2 cache from DT. Indicate in DT where the cache
control register is so that it is possible to enable/disable write
through on the CPU.

Signed-off-by: Andrew Lunn &lt;andrew@lunn.ch&gt;
Tested-by: Jason Gunthorpe &lt;jgunthorpe@obsidianresearch.com&gt;
Signed-off-by: Jason Cooper &lt;jason@lakedaemon.net&gt;
</content>
</entry>
<entry>
<title>ARM: cache: add dt support for tauros2 cache</title>
<updated>2012-08-16T08:16:50+00:00</updated>
<author>
<name>Chao Xie</name>
<email>xiechao.mail@gmail.com</email>
</author>
<published>2012-07-31T06:13:14+00:00</published>
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<id>urn:sha1:c2b7e05c753156dfba3240c59c400d557c5c8746</id>
<content type='text'>
Signed-off-by: Chao Xie &lt;xiechao.mail@gmail.com&gt;
Signed-off-by: Haojian Zhuang &lt;haojian.zhuang@gmail.com&gt;
</content>
</entry>
<entry>
<title>ARM: Orion: DT support for IRQ and GPIO Controllers</title>
<updated>2012-07-27T14:48:14+00:00</updated>
<author>
<name>Andrew Lunn</name>
<email>andrew@lunn.ch</email>
</author>
<published>2012-06-27T11:40:04+00:00</published>
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<id>urn:sha1:278b45b06bf721b7cf5de67a0126786c60c720e6</id>
<content type='text'>
Both IRQ and GPIO controllers can now be represented in DT.  The IRQ
controllers are setup first, and then the GPIO controllers. Interrupts
for GPIO lines are placed directly after the main interrupts in the
interrupt space.

Signed-off-by: Andrew Lunn &lt;andrew@lunn.ch&gt;
Acked-by: Sebastian Hesselbarth &lt;sebastian.hesselbarth@googlemail.com&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Tested-by: Josh Coombs &lt;josh.coombs@gmail.com&gt;
Tested-by: Simon Baatz &lt;gmbnomis@gmail.com&gt;
</content>
</entry>
<entry>
<title>Documentation: update docs for mmp dt</title>
<updated>2012-05-05T08:40:08+00:00</updated>
<author>
<name>Haojian Zhuang</name>
<email>haojian.zhuang@gmail.com</email>
</author>
<published>2012-04-27T08:21:08+00:00</published>
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<id>urn:sha1:ace1297f7222ec5d6a33f41e792a21e999551924</id>
<content type='text'>
Append interrupt controller and timer document for mmp. Updates
documents for gpio and i2c.

Signed-off-by: Haojian Zhuang &lt;haojian.zhuang@gmail.com&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
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