blackbird-op-linux/Documentation/devicetree/bindings/arm/marvell, branch master

dt-bindings: marvell: Declare the CN913x SoC compatibles

2019-10-09T07:36:40+00:00

Describe the compatible properties for the new Marvell SoCs: * CN9130: 1x AP807-quad + 1x CP115 (1x embedded) * CN9131: 1x AP807-quad + 2x CP115 (1x embedded + 1x modular) * CN9132: 1x AP807-quad + 3x CP115 (1x embedded + 2x modular) CP115 are similar to CP110 in terms of features. There are three development boards based on these SoCs: * CN9130-DB: comes as a single mother board (with the CP115 bundled) * CN9131-DB: same as CN9130-DB with one additional modular CP115 * CN9132-DB: same as CN9130-DB with two additional modular CP115 Signed-off-by: Grzegorz Jaszczyk Signed-off-by: Miquel Raynal Reviewed-by: Rob Herring Signed-off-by: Gregory CLEMENT

dt-bindings: marvell: Convert the SoC compatibles description to YAML

2019-10-09T07:36:40+00:00

Convert the file detailing Marvell EBU compatibles to json-schema. Signed-off-by: Miquel Raynal Reviewed-by: Rob Herring Signed-off-by: Gregory CLEMENT

dt-bindings: ap80x: replace AP806 with AP80x

2019-10-09T07:36:40+00:00

Rename the text file and update "AP806" into "AP806/AP807" where relevant. Signed-off-by: Ben Peled Signed-off-by: Miquel Raynal Reviewed-by: Rob Herring Signed-off-by: Gregory CLEMENT

Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

2019-09-20T22:53:02+00:00

Pull ARM SoC late updates from Arnd Bergmann: "This is some material that we picked up into our tree late or that had complex inter-depondencies. The fact that there are these interdependencies tends to meant that these are often actually the most interesting new additions: - The new Aspeed AST2600 baseboard management controller is added, this is a Cortex-A7 based follow-up to the ARM11 based AST2500 and had some dependencies on other device drivers. - After many years, support for the MMP2 based OLPC XO-1.75 finally makes it into the kernel. - The Armada 3720 based Turris Mox open source router platform is a late addition and it follows some preparatory work across multiple branches. - The OMAP2+ platform had some large-scale cleanup involving driver changes and DT changes, here we finish it off, dropping a lot of the now-unused platform data. - The TI K3 platform that got added for 5.3 gains a lot more support for individual bits on the SoC, this part just came late for the merge window" [ This pull request itself wasn't actually sent late at all by Arnd, but I waited on the branches that it used to be pulled first, so it ends up being merged much later than the other ARM SoC pull requests this merge window - Linus ] * tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (57 commits) ARM: dts: dir685: Drop spi-cpol from the display ARM: dts: aspeed: Add AST2600 pinmux nodes ARM: dts: aspeed: Add AST2600 and EVB ARM: exynos: Enable support for ARM architected timers ARM: samsung: Fix system restart on S3C6410 ARM: dts: mmp2: add OLPC XO 1.75 machine ARM: dts: mmp2: rename the USB PHY node ARM: dts: mmp2: specify reg-shift for the UARTs ARM: dts: mmp2: add camera interfaces ARM: dts: mmp2: fix the SPI nodes ARM: dts: mmp2: trivial whitespace fix arm64: dts: marvell: add DTS for Turris Mox dt-bindings: marvell: document Turris Mox compatible arm64: dts: marvell: armada-37xx: add SPI CS1 pinctrl arm64: dts: ti: k3-j721e-main: Fix gic-its node unit-address arm64: dts: ti: k3-am65-main: Fix gic-its node unit-address arm64: dts: ti: k3-j721e-main: Add hwspinlock node arm64: dts: ti: k3-am65-main: Add hwspinlock node arm64: dts: k3-j721e: Add gpio-keys on common processor board dt-bindings: pinctrl: k3: Introduce pinmux definitions for J721E ...

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

2019-09-20T22:45:07+00:00

Pull clk updates from Stephen Boyd: "We have a small collection of core framework updates this time, mostly around clk registration by clk providers and debugfs "nice to haves" for rate constraints. I'll highlight that we're now setting the clk_init_data pointer inside struct clk_hw to NULL during clk_register(), which may break some drivers that thought they could use that pointer during normal operations. That change has been sitting in next for a while now but maybe something is still broken. We'l see. Other than that the core framework changes aren't invasive and they're fixing bugs, simplifying, and making things better. On the clk driver side we got the usual addition of new SoC support, new features for existing drivers, and bug fixes scattered throughout. The biggest diffstat is the Amlogic driver that gained CPU clk support in addition to migrating to the new way of specifying clk parents. After that the Qualcomm, i.MX, Mediatek, and Rockchip clk drivers got support for various new SoCs and clock controllers from those vendors. Core: - Drop NULL checks in clk debugfs - Add min/max rates to clk debugfs - Set clk_init_data pointer inside clk_hw to NULL after registration - Make clk_bulk_get_all() return an 'id' corresponding to clock-names - Evict parents from parent cache when they're unregistered New Drivers: - Add clock driver for i.MX8MN SoCs - Support aspeed AST2600 SoCs - Support for Mediatek MT6779 SoCs - Support qcom SM8150 GCC and RPMh clks - Support qcom QCS404 WCSS clks - Add CPU clock support for Armada 7K/8K (specifically AP806 and AP807) - Addition of clock driver for Rockchip rk3308 SoCs Updates: - Add regulator support to the cdce925 clk driver - Add support for Raspberry Pi 4 bcm2711 SoCs - Add SDIO gate support to aspeed driver - Add missing of_node_put() calls in various clk drivers - Migrate Amlogic driver to new clock parent description method - Add DVFS support to Amlogic Meson g12 - Add Amlogic Meson g12a reset support to the axg audio clock controller - Add sm1 support to the Amlogic Meson g12a clock controller - Switch i.MX8MM clock driver to platform driver - Add Hifi4 DSP related clocks for i.MX8QXP SoC - Fix Audio PLL setting and parent clock for USB - Misc i.MX8 clock driver improvements and corrections - Set floor ops for Qualcomm SD clks so that rounding works - Fix "always-on" Clock Domains on Renesas R-Car M1A, RZ/A1, RZ/A2, and RZ/N1 - Enable the Allwinner V3 SoC and fix the i2s clock for H6" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (137 commits) clk: Drop !clk checks in debugfs dumping clk: imx: imx8mn: fix pll mux bit clk: imx: imx8mm: fix pll mux bit clk: imx: clk-pll14xx: unbypass PLL by default clk: imx: pll14xx: avoid glitch when set rate clk: mvebu: ap80x: add AP807 clock support clk: mvebu: ap806: Prepare the introduction of AP807 clock support clk: mvebu: ap806: add AP-DCLK (hclk) to system controller driver clk: mvebu: ap806: be more explicit on what SaR is clk: mvebu: ap80x-cpu: add AP807 CPU clock support clk: mvebu: ap806-cpu: prepare mapping of AP807 CPU clock dt-bindings: ap806: Document AP807 clock compatible dt-bindings: ap80x: Document AP807 CPU clock compatible clk: sprd: add missing kfree clk: at91: allow 24 Mhz clock as input for PLL clk: Make clk_bulk_get_all() return a valid "id" clk: actions: Fix factor clk struct member access clk: qcom: rcg: Return failure for RCG update clk: remove extra ---help--- tags in Kconfig clk: add include guard to clk-conf.h ...

dt-bindings: ap806: Document AP807 clock compatible

2019-09-18T05:15:40+00:00

Add AP807 clock compatible to the bindings. Signed-off-by: Miquel Raynal Link: https://lkml.kernel.org/r/20190805100310.29048-3-miquel.raynal@bootlin.com Reviewed-by: Rob Herring Signed-off-by: Stephen Boyd

dt-bindings: ap80x: Document AP807 CPU clock compatible

2019-09-18T05:15:40+00:00

Add AP807 CPU clock compatible to the bindings. Signed-off-by: Miquel Raynal Link: https://lkml.kernel.org/r/20190805100310.29048-2-miquel.raynal@bootlin.com Reviewed-by: Rob Herring Signed-off-by: Stephen Boyd

dt-bindings: marvell: document Turris Mox compatible

2019-08-31T07:24:31+00:00

This adds the documentation for the Turris Mox compatible in armada-37xx device-tree binding documentation. Signed-off-by: Marek Behún Cc: Gregory CLEMENT Cc: Rob Herring Cc: Rafael J. Wysocki Signed-off-by: Gregory CLEMENT

dt-bindings: cp110: document the new CP115 pinctrl compatible

2019-08-27T07:46:05+00:00

A new compatible is going to be used for Armada CP115 pinctrl block, document it. Signed-off-by: Grzegorz Jaszczyk [: split the documentation out of the driver commit] Signed-off-by: Miquel Raynal Link: https://lore.kernel.org/r/20190805101607.29811-3-miquel.raynal@bootlin.com Reviewed-by: Rob Herring Signed-off-by: Linus Walleij

dt-bindings: ap806: add the cluster clock node in the syscon file

2019-08-08T16:08:09+00:00

Document the device tree binding for the cluster clock controllers found in the Armada 7K/8K SoCs. Signed-off-by: Gregory CLEMENT Link: https://lkml.kernel.org/r/20190710134346.30239-2-gregory.clement@bootlin.com Reviewed-by: Rob Herring Signed-off-by: Stephen Boyd