summaryrefslogtreecommitdiffstats
path: root/board/funkwerk/vovpn-gw/m88e6060.c
blob: 7aa9593426d5c8dc1e2f9d6b9638189937c8535b (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
/*
 * (C) Copyright 2004
 * Elmeg Communications Systems GmbH, Juergen Selent (j.selent@elmeg.de)
 *
 * Support for the Elmeg VoVPN Gateway Module
 * ------------------------------------------
 * Initialize Marvell M88E6060 Switch
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#include <common.h>
#include <ioports.h>
#include <mpc8260.h>
#include <asm/m8260_pci.h>
#include <net.h>
#include <miiphy.h>

#include "m88e6060.h"

#if defined(CONFIG_CMD_NET)
static int		prtTab[M88X_PRT_CNT] = { 8, 9, 10, 11, 12, 13 };
static int		phyTab[M88X_PHY_CNT] = { 0, 1, 2, 3, 4 };

static m88x_regCfg_t	prtCfg0[] = {
	{  4, 0x3e7c, 0x8000 },
	{  4, 0x3e7c, 0x8003 },
	{  6, 0x0fc0, 0x001e },
	{ -1, 0xffff, 0x0000 }
};

static m88x_regCfg_t	prtCfg1[] = {
	{  4, 0x3e7c, 0x8000 },
	{  4, 0x3e7c, 0x8003 },
	{  6, 0x0fc0, 0x001d },
	{ -1, 0xffff, 0x0000 }
};

static m88x_regCfg_t	prtCfg2[] = {
	{  4, 0x3e7c, 0x8000 },
	{  4, 0x3e7c, 0x8003 },
	{  6, 0x0fc0, 0x001b },
	{ -1, 0xffff, 0x0000 }
};

static m88x_regCfg_t	prtCfg3[] = {
	{  4, 0x3e7c, 0x8000 },
	{  4, 0x3e7c, 0x8003 },
	{  6, 0x0fc0, 0x0017 },
	{ -1, 0xffff, 0x0000 }
};

static m88x_regCfg_t	prtCfg4[] = {
	{  4, 0x3e7c, 0x8000 },
	{  4, 0x3e7c, 0x8003 },
	{  6, 0x0fc0, 0x000f },
	{ -1, 0xffff, 0x0000 }
};

static m88x_regCfg_t	*prtCfg[M88X_PRT_CNT] = {
	prtCfg0,prtCfg1,prtCfg2,prtCfg3,prtCfg4,NULL
};

static m88x_regCfg_t	phyCfgX[] = {
	{  4, 0xfa1f, 0x01e0 },
	{  0, 0x213f, 0x1200 },
	{ 24, 0x81ff, 0x1200 },
	{ -1, 0xffff, 0x0000 }
};

static m88x_regCfg_t	*phyCfg[M88X_PHY_CNT] = {
	phyCfgX,phyCfgX,phyCfgX,phyCfgX,NULL
};

#if 0
static void
m88e6060_dump( int devAddr )
{
	int		i, j;
	unsigned short	val[6];

	printf( "M88E6060 Register Dump\n" );
	printf( "====================================\n" );
	printf( "PortNo    0    1    2    3    4    5\n" );
	for (i=0; i<6; i++)
		miiphy_read( devAddr+prtTab[i],M88X_PRT_STAT,&val[i] );
	printf( "STAT   %04hx %04hx %04hx %04hx %04hx %04hx\n",
		val[0],val[1],val[2],val[3],val[4],val[5] );

	for (i=0; i<6; i++)
		miiphy_read( devAddr+prtTab[i],M88X_PRT_ID,&val[i] );
	printf( "ID     %04hx %04hx %04hx %04hx %04hx %04hx\n",
		val[0],val[1],val[2],val[3],val[4],val[5] );

	for (i=0; i<6; i++)
		miiphy_read( devAddr+prtTab[i],M88X_PRT_CNTL,&val[i] );
	printf( "CNTL   %04hx %04hx %04hx %04hx %04hx %04hx\n",
		val[0],val[1],val[2],val[3],val[4],val[5] );

	for (i=0; i<6; i++)
		miiphy_read( devAddr+prtTab[i],M88X_PRT_VLAN,&val[i] );
	printf( "VLAN   %04hx %04hx %04hx %04hx %04hx %04hx\n",
		val[0],val[1],val[2],val[3],val[4],val[5] );

	for (i=0; i<6; i++)
		miiphy_read( devAddr+prtTab[i],M88X_PRT_PAV,&val[i] );
	printf( "PAV    %04hx %04hx %04hx %04hx %04hx %04hx\n",
		val[0],val[1],val[2],val[3],val[4],val[5] );

	for (i=0; i<6; i++)
		miiphy_read( devAddr+prtTab[i],M88X_PRT_RX,&val[i] );
	printf( "RX     %04hx %04hx %04hx %04hx %04hx %04hx\n",
		val[0],val[1],val[2],val[3],val[4],val[5] );

	for (i=0; i<6; i++)
		miiphy_read( devAddr+prtTab[i],M88X_PRT_TX,&val[i] );
	printf( "TX     %04hx %04hx %04hx %04hx %04hx %04hx\n",
		val[0],val[1],val[2],val[3],val[4],val[5] );

	printf( "------------------------------------\n" );
	printf( "PhyNo     0    1    2    3    4\n" );
	for (i=0; i<9; i++) {
		for (j=0; j<5; j++) {
			miiphy_read( devAddr+phyTab[j],i,&val[j] );
		}
		printf( "0x%02x   %04hx %04hx %04hx %04hx %04hx\n",
			i,val[0],val[1],val[2],val[3],val[4] );
	}
	for (i=0x10; i<0x1d; i++) {
		for (j=0; j<5; j++) {
			miiphy_read( devAddr+phyTab[j],i,&val[j] );
		}
		printf( "0x%02x   %04hx %04hx %04hx %04hx %04hx\n",
			i,val[0],val[1],val[2],val[3],val[4] );
	}
}
#endif

int
m88e6060_initialize( int devAddr )
{
	static char	*_f = "m88e6060_initialize:";
	m88x_regCfg_t	*p;
	int		err;
	int		i;
	unsigned short	val;

	/*** reset all phys into powerdown ************************************/
	for (i=0, err=0; i<M88X_PHY_CNT; i++) {
		err += bb_miiphy_read(NULL, devAddr+phyTab[i],M88X_PHY_CNTL,&val );
		/* keep SpeedLSB, Duplex */
		val &= 0x2100;
		/* set SWReset, AnegEn, PwrDwn, RestartAneg */
		val |= 0x9a00;
		err += bb_miiphy_write(NULL, devAddr+phyTab[i],M88X_PHY_CNTL,val );
	}
	if (err) {
		printf( "%s [ERR] reset phys\n",_f );
		return( -1 );
	}

	/*** disable all ports ************************************************/
	for (i=0, err=0; i<M88X_PRT_CNT; i++) {
		err += bb_miiphy_read(NULL, devAddr+prtTab[i],M88X_PRT_CNTL,&val );
		val &= 0xfffc;
		err += bb_miiphy_write(NULL, devAddr+prtTab[i],M88X_PRT_CNTL,val );
	}
	if (err) {
		printf( "%s [ERR] disable ports\n",_f );
		return( -1 );
	}

	/*** initialize switch ************************************************/
	/* set switch mac addr */
#define ea eth_get_dev()->enetaddr
	val = (ea[4] <<  8) | ea[5];
	err = bb_miiphy_write(NULL, devAddr+15,M88X_GLB_MAC45,val );
	val = (ea[2] <<  8) | ea[3];
	err += bb_miiphy_write(NULL, devAddr+15,M88X_GLB_MAC23,val );
	val = (ea[0] <<  8) | ea[1];
#undef ea
	val &= 0xfeff;		/* clear DiffAddr */
	err += bb_miiphy_write(NULL, devAddr+15,M88X_GLB_MAC01,val );
	if (err) {
		printf( "%s [ERR] switch mac address register\n",_f );
		return( -1 );
	}

	/* !DiscardExcessive, MaxFrameSize, CtrMode */
	err = bb_miiphy_read(NULL, devAddr+15,M88X_GLB_CNTL,&val );
	val &= 0xd870;
	val |= 0x0500;
	err += bb_miiphy_write(NULL, devAddr+15,M88X_GLB_CNTL,val );
	if (err) {
		printf( "%s [ERR] switch global control register\n",_f );
		return( -1 );
	}

	/* LernDis off, ATUSize 1024, AgeTime 5min */
	err = bb_miiphy_read(NULL, devAddr+15,M88X_ATU_CNTL,&val );
	val &= 0x000f;
	val |= 0x2130;
	err += bb_miiphy_write(NULL, devAddr+15,M88X_ATU_CNTL,val );
	if (err) {
		printf( "%s [ERR] atu control register\n",_f );
		return( -1 );
	}

	/*** initialize ports *************************************************/
	for (i=0; i<M88X_PRT_CNT; i++) {
		if ((p = prtCfg[i]) == NULL) {
			continue;
		}
		while (p->reg != -1) {
			err = 0;
			err += bb_miiphy_read(NULL, devAddr+prtTab[i],p->reg,&val );
			val &= p->msk;
			val |= p->val;
			err += bb_miiphy_write(NULL, devAddr+prtTab[i],p->reg,val );
			if (err) {
				printf( "%s [ERR] config port %d register %d\n",_f,i,p->reg );
				/* XXX what todo */
			}
			p++;
		}
	}

	/*** initialize phys **************************************************/
	for (i=0; i<M88X_PHY_CNT; i++) {
		if ((p = phyCfg[i]) == NULL) {
			continue;
		}
		while (p->reg != -1) {
			err = 0;
			err += bb_miiphy_read(NULL, devAddr+phyTab[i],p->reg,&val );
			val &= p->msk;
			val |= p->val;
			err += bb_miiphy_write(NULL, devAddr+phyTab[i],p->reg,val );
			if (err) {
				printf( "%s [ERR] config phy %d register %d\n",_f,i,p->reg );
				/* XXX what todo */
			}
			p++;
		}
	}
	udelay(100000);
	return( 0 );
}
#endif
OpenPOWER on IntegriCloud