summaryrefslogtreecommitdiffstats
path: root/arch/arm/dts/exynos4412-odroid.dts
blob: 2a1f1dda4e23079a0e8108c9e29418b9eab7272b (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
/*
 * Odroid-U3/X2 board device tree source
 *
 * Copyright (c) 2014 Samsung Electronics Co., Ltd.
 *		http://www.samsung.com
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

/dts-v1/;
#include "exynos4412.dtsi"

/ {
	model = "Odroid based on Exynos4412";
	compatible = "samsung,odroid", "samsung,exynos4412";

	aliases {
		i2c0 = "/i2c@13860000";
		serial0 = "/serial@13800000";
		console = "/serial@13810000";
		mmc2 = "sdhci@12530000";
		mmc4 = "dwmmc@12550000";
	};

	i2c@13860000 {
		samsung,i2c-sda-delay = <100>;
		samsung,i2c-slave-addr = <0x10>;
		samsung,i2c-max-bus-freq = <100000>;
		status = "okay";

		max77686_pmic@09 {
			compatible = "maxim,max77686_pmic";
			interrupts = <7 0>;
			reg = <0x09 0 0>;
			#clock-cells = <1>;
		};
	};

	serial@13810000 {
		status = "okay";
	};

	sdhci@12510000 {
		status = "disabled";
	};

	sdhci@12520000 {
		status = "disabled";
	};

	sdhci@12530000 {
		samsung,bus-width = <4>;
		samsung,timing = <1 2 3>;
		cd-gpios = <&gpio 122 0>;
	};

	sdhci@12540000 {
		status = "disabled";
	};

	dwmmc@12550000 {
		samsung,bus-width = <8>;
		samsung,timing = <2 1 0>;
		samsung,removable = <0>;
		fifoth_val = <0x203f0040>;
		bus_hz = <400000000>;
		div = <0x3>;
		index = <4>;
	};
};
OpenPOWER on IntegriCloud