/*
 * Copyright (C) 2013 Boundary Devices
 * Copyright (C) 2013 SolidRun ltd.
 * Copyright (C) 2013 Jon Nettleton <jon.nettleton@gmail.com>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

/*
 * DDR3 settings
 * MX6Q    ddr is limited to 1066 Mhz	currently 1056 MHz(528 MHz clock),
 *	   memory bus width: 64 bits	x16/x32/x64
 * MX6DL   ddr is limited to 800 MHz(400 MHz clock)
 *	   memory bus width: 64 bits	x16/x32/x64
 * MX6SOLO ddr is limited to 800 MHz(400 MHz clock)
 *	   memory bus width: 32 bits	x16/x32
 */
/* DDR IO TYPE */
DATA 4, MX6_IOM_GRP_DDR_TYPE, 0x000c0000
DATA 4, MX6_IOM_GRP_DDRPKE, 0x00000000
/* Clock */
DATA 4, MX6_IOM_DRAM_SDCLK_0, 0x00000028
DATA 4, MX6_IOM_DRAM_SDCLK_1, 0x00000028
/* Address */
DATA 4, MX6_IOM_DRAM_CAS, 0x00000010
DATA 4, MX6_IOM_DRAM_RAS, 0x00000010
DATA 4, MX6_IOM_GRP_ADDDS, 0x00000010
/* Control */
DATA 4, MX6_IOM_DRAM_RESET, 0x00000010
DATA 4, MX6_IOM_DRAM_SDCKE0, 0x00003000
DATA 4, MX6_IOM_DRAM_SDCKE1, 0x00003000
DATA 4, MX6_IOM_DRAM_SDBA2, 0x00000000
DATA 4, MX6_IOM_DRAM_SDODT0, 0x00000010
DATA 4, MX6_IOM_DRAM_SDODT1, 0x00000010
DATA 4, MX6_IOM_GRP_CTLDS, 0x00000010

/*
 * Data Strobe: IOMUXC_SW_PAD_CTL_GRP_DDRMODE_CTL - DDR_INPUT=0, CMOS,
 * CMOS mode saves power, but have less timing margin in case of DDR
 * timing issue on your board you can try DDR_MODE:  [= 0x00020000]
 */
DATA 4, MX6_IOM_DDRMODE_CTL, 0x00020000

DATA 4, MX6_IOM_DRAM_SDQS0, 0x00000028
DATA 4, MX6_IOM_DRAM_SDQS1, 0x00000028
DATA 4, MX6_IOM_DRAM_SDQS2, 0x00000028
DATA 4, MX6_IOM_DRAM_SDQS3, 0x00000028
DATA 4, MX6_IOM_DRAM_SDQS4, 0x00000000
DATA 4, MX6_IOM_DRAM_SDQS5, 0x00000000
DATA 4, MX6_IOM_DRAM_SDQS6, 0x00000000
DATA 4, MX6_IOM_DRAM_SDQS7, 0x00000000

/*
 * DATA:IOMUXC_SW_PAD_CTL_GRP_DDRMODE - DDR_INPUT=0, CMOS,
 * CMOS mode saves power, but have less timing margin in case of DDR
 * timing issue on your board you can try DDR_MODE:  [= 0x00020000]
 */
DATA 4, MX6_IOM_GRP_DDRMODE, 0x00020000

DATA 4, MX6_IOM_GRP_B0DS, 0x00000028
DATA 4, MX6_IOM_GRP_B1DS, 0x00000028
DATA 4, MX6_IOM_GRP_B2DS, 0x00000028
DATA 4, MX6_IOM_GRP_B3DS, 0x00000028
DATA 4, MX6_IOM_GRP_B4DS, 0x00000000
DATA 4, MX6_IOM_GRP_B5DS, 0x00000000
DATA 4, MX6_IOM_GRP_B6DS, 0x00000000
DATA 4, MX6_IOM_GRP_B7DS, 0x00000000

DATA 4, MX6_IOM_DRAM_DQM0, 0x00000028
DATA 4, MX6_IOM_DRAM_DQM1, 0x00000028
DATA 4, MX6_IOM_DRAM_DQM2, 0x00000028
DATA 4, MX6_IOM_DRAM_DQM3, 0x00000028
DATA 4, MX6_IOM_DRAM_DQM4, 0x00000000
DATA 4, MX6_IOM_DRAM_DQM5, 0x00000000
DATA 4, MX6_IOM_DRAM_DQM6, 0x00000000
DATA 4, MX6_IOM_DRAM_DQM7, 0x00000000