From e76cd5d4cf311da7d40adc5d6e9b425509cf0205 Mon Sep 17 00:00:00 2001 From: Andy Fleming Date: Tue, 23 Oct 2012 19:03:46 -0500 Subject: 8xxx: Change all 8*xx_DDR addresses to 8xxx There were a number of shared files that were using CONFIG_SYS_MPC85xx_DDR_ADDR, or CONFIG_SYS_MPC86xx_DDR_ADDR, and several variants (DDR2, DDR3). A recent patchset added 85xx-specific ones to code which was used by 86xx systems. After reviewing places where these constants were used, and noting that the type definitions of the pointers assigned to point to those addresses were the same, the cleanest approach to fixing this problem was to unify the namespace for the 85xx, 83xx, and 86xx DDR address definitions. This patch does: s/CONFIG_SYS_MPC8.xx_DDR/CONFIG_SYS_MPC8xxx_DDR/g All 85xx, 86xx, and 83xx have been built with this change. Signed-off-by: Andy Fleming Tested-by: Andy Fleming Acked-by: Kim Phillips --- nand_spl/board/freescale/p1010rdb/nand_boot.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'nand_spl/board/freescale/p1010rdb/nand_boot.c') diff --git a/nand_spl/board/freescale/p1010rdb/nand_boot.c b/nand_spl/board/freescale/p1010rdb/nand_boot.c index 9c356901b1..3c7bc2bc65 100644 --- a/nand_spl/board/freescale/p1010rdb/nand_boot.c +++ b/nand_spl/board/freescale/p1010rdb/nand_boot.c @@ -35,7 +35,7 @@ unsigned long ddr_freq_mhz; void sdram_init(void) { - ccsr_ddr_t *ddr = (ccsr_ddr_t *)CONFIG_SYS_MPC85xx_DDR_ADDR; + ccsr_ddr_t *ddr = (ccsr_ddr_t *)CONFIG_SYS_MPC8xxx_DDR_ADDR; /* mask off E bit */ u32 svr = SVR_SOC_VER(mfspr(SPRN_SVR)); -- cgit v1.2.1