From 4e09cc1e2c5d22735d0fa3d2d1eaecd27e19948e Mon Sep 17 00:00:00 2001 From: Jagannadha Sutradharudu Teki Date: Sat, 11 Jan 2014 15:10:28 +0530 Subject: sf: Add extended read commands support Current sf uses FAST_READ command, this patch adds support to use the different/extended read command. This implementation will determine the fastest command by taking the supported commands from the flash and the controller, controller is always been a priority. Signed-off-by: Jagannadha Sutradharudu Teki --- include/spi.h | 8 ++++++++ include/spi_flash.h | 10 ++++++++++ 2 files changed, 18 insertions(+) (limited to 'include') diff --git a/include/spi.h b/include/spi.h index aba792244a..31195a3075 100644 --- a/include/spi.h +++ b/include/spi.h @@ -31,6 +31,12 @@ #define SPI_XFER_MMAP_END 0x10 /* Memory Mapped End */ #define SPI_XFER_ONCE (SPI_XFER_BEGIN | SPI_XFER_END) +/* SPI RX operation modes */ +#define SPI_OPM_RX_AS 1 << 0 +#define SPI_OPM_RX_DOUT 1 << 1 +#define SPI_OPM_RX_DIO 1 << 2 +#define SPI_OPM_RX_EXTN SPI_OPM_RX_AS | SPI_OPM_RX_DOUT | SPI_OPM_RX_DIO + /* Header byte that marks the start of the message */ #define SPI_PREAMBLE_END_BYTE 0xec @@ -43,6 +49,7 @@ * * @bus: ID of the bus that the slave is attached to. * @cs: ID of the chip select connected to the slave. + * @op_mode_rx: SPI RX operation mode. * @wordlen: Size of SPI word in number of bits * @max_write_size: If non-zero, the maximum number of bytes which can * be written at once, excluding command bytes. @@ -51,6 +58,7 @@ struct spi_slave { unsigned int bus; unsigned int cs; + u8 op_mode_rx; unsigned int wordlen; unsigned int max_write_size; void *memory_map; diff --git a/include/spi_flash.h b/include/spi_flash.h index afc3a5809e..692e143b60 100644 --- a/include/spi_flash.h +++ b/include/spi_flash.h @@ -19,6 +19,14 @@ #include #include +/* Enum list - Extended read commands */ +enum spi_read_cmds { + ARRAY_SLOW = 1 << 0, + DUAL_OUTPUT_FAST = 1 << 1, + DUAL_IO_FAST = 1 << 2, +}; +#define RD_EXTN ARRAY_SLOW | DUAL_OUTPUT_FAST | DUAL_IO_FAST + /** * struct spi_flash - SPI flash structure * @@ -33,6 +41,7 @@ * @bank_curr: Current flash bank * @poll_cmd: Poll cmd - for flash erase/program * @erase_cmd: Erase cmd 4K, 32K, 64K + * @read_cmd: Read cmd - Array Fast and Extn read * @memory_map: Address of read-only SPI flash access * @read: Flash read ops: Read len bytes at offset into buf * Supported cmds: Fast Array Read @@ -57,6 +66,7 @@ struct spi_flash { #endif u8 poll_cmd; u8 erase_cmd; + u8 read_cmd; void *memory_map; int (*read)(struct spi_flash *flash, u32 offset, size_t len, void *buf); -- cgit v1.2.1 From 3163aaa63fced54bbd6fd190ece0f89b473076ab Mon Sep 17 00:00:00 2001 From: Jagannadha Sutradharudu Teki Date: Sat, 11 Jan 2014 15:13:11 +0530 Subject: sf: Add quad read/write commands support This patch add quad commands support like - QUAD_PAGE_PROGRAM => for write program - QUAD_OUTPUT_FAST ->> for read program Signed-off-by: Jagannadha Sutradharudu Teki --- include/spi.h | 9 ++++++++- include/spi_flash.h | 11 +++++++++-- 2 files changed, 17 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/spi.h b/include/spi.h index 31195a3075..5dd490a66e 100644 --- a/include/spi.h +++ b/include/spi.h @@ -31,11 +31,16 @@ #define SPI_XFER_MMAP_END 0x10 /* Memory Mapped End */ #define SPI_XFER_ONCE (SPI_XFER_BEGIN | SPI_XFER_END) +/* SPI TX operation modes */ +#define SPI_OPM_TX_QPP 1 << 0 + /* SPI RX operation modes */ #define SPI_OPM_RX_AS 1 << 0 #define SPI_OPM_RX_DOUT 1 << 1 #define SPI_OPM_RX_DIO 1 << 2 -#define SPI_OPM_RX_EXTN SPI_OPM_RX_AS | SPI_OPM_RX_DOUT | SPI_OPM_RX_DIO +#define SPI_OPM_RX_QOF 1 << 3 +#define SPI_OPM_RX_EXTN SPI_OPM_RX_AS | SPI_OPM_RX_DOUT | \ + SPI_OPM_RX_DIO | SPI_OPM_RX_QOF /* Header byte that marks the start of the message */ #define SPI_PREAMBLE_END_BYTE 0xec @@ -50,6 +55,7 @@ * @bus: ID of the bus that the slave is attached to. * @cs: ID of the chip select connected to the slave. * @op_mode_rx: SPI RX operation mode. + * @op_mode_tx: SPI TX operation mode. * @wordlen: Size of SPI word in number of bits * @max_write_size: If non-zero, the maximum number of bytes which can * be written at once, excluding command bytes. @@ -59,6 +65,7 @@ struct spi_slave { unsigned int bus; unsigned int cs; u8 op_mode_rx; + u8 op_mode_tx; unsigned int wordlen; unsigned int max_write_size; void *memory_map; diff --git a/include/spi_flash.h b/include/spi_flash.h index 692e143b60..9fd9d3bd54 100644 --- a/include/spi_flash.h +++ b/include/spi_flash.h @@ -19,13 +19,18 @@ #include #include -/* Enum list - Extended read commands */ +/* No enum list for write commands only QPP */ +#define WR_QPP 1 << 4 + +/* Enum list - Full read commands */ enum spi_read_cmds { ARRAY_SLOW = 1 << 0, DUAL_OUTPUT_FAST = 1 << 1, DUAL_IO_FAST = 1 << 2, + QUAD_OUTPUT_FAST = 1 << 3, }; #define RD_EXTN ARRAY_SLOW | DUAL_OUTPUT_FAST | DUAL_IO_FAST +#define RD_FULL RD_EXTN | QUAD_OUTPUT_FAST /** * struct spi_flash - SPI flash structure @@ -41,7 +46,8 @@ enum spi_read_cmds { * @bank_curr: Current flash bank * @poll_cmd: Poll cmd - for flash erase/program * @erase_cmd: Erase cmd 4K, 32K, 64K - * @read_cmd: Read cmd - Array Fast and Extn read + * @read_cmd: Read cmd - Array Fast, Extn read and quad read. + * @write_cmd: Write cmd - page and quad program. * @memory_map: Address of read-only SPI flash access * @read: Flash read ops: Read len bytes at offset into buf * Supported cmds: Fast Array Read @@ -67,6 +73,7 @@ struct spi_flash { u8 poll_cmd; u8 erase_cmd; u8 read_cmd; + u8 write_cmd; void *memory_map; int (*read)(struct spi_flash *flash, u32 offset, size_t len, void *buf); -- cgit v1.2.1 From 33adfb5f9b06ac1a386dddc222cc50e24a9909e2 Mon Sep 17 00:00:00 2001 From: Jagannadha Sutradharudu Teki Date: Mon, 23 Dec 2013 23:34:42 +0530 Subject: sf: Separate the flash params table Moved the flash params table from sf_probe.c and placed on to sf_params.c, hence flash params file will alter based on new addons. Signed-off-by: Jagannadha Sutradharudu Teki --- include/spi_flash.h | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) (limited to 'include') diff --git a/include/spi_flash.h b/include/spi_flash.h index 9fd9d3bd54..8e0bb46e81 100644 --- a/include/spi_flash.h +++ b/include/spi_flash.h @@ -32,6 +32,29 @@ enum spi_read_cmds { #define RD_EXTN ARRAY_SLOW | DUAL_OUTPUT_FAST | DUAL_IO_FAST #define RD_FULL RD_EXTN | QUAD_OUTPUT_FAST +/** + * struct spi_flash_params - SPI/QSPI flash device params structure + * + * @name: Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO]) + * @jedec: Device jedec ID (0x[1byte_manuf_id][2byte_dev_id]) + * @ext_jedec: Device ext_jedec ID + * @sector_size: Sector size of this device + * @nr_sectors: No.of sectors on this device + * @e_rd_cmd: Enum list for read commands + * @flags: Importent param, for flash specific behaviour + */ +struct spi_flash_params { + const char *name; + u32 jedec; + u16 ext_jedec; + u32 sector_size; + u32 nr_sectors; + u8 e_rd_cmd; + u16 flags; +}; + +extern const struct spi_flash_params spi_flash_params_table[]; + /** * struct spi_flash - SPI flash structure * -- cgit v1.2.1 From c4ba0d82d329791c3f0456d88e93032b11e48535 Mon Sep 17 00:00:00 2001 From: Jagannadha Sutradharudu Teki Date: Tue, 24 Dec 2013 15:24:31 +0530 Subject: sf: Add QUAD_IO_FAST read support This patch adds support QUAD_IO_FAST read command. Signed-off-by: Jagannadha Sutradharudu Teki --- include/spi.h | 4 +++- include/spi_flash.h | 3 ++- 2 files changed, 5 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/spi.h b/include/spi.h index 5dd490a66e..c8a9d87b5f 100644 --- a/include/spi.h +++ b/include/spi.h @@ -39,8 +39,10 @@ #define SPI_OPM_RX_DOUT 1 << 1 #define SPI_OPM_RX_DIO 1 << 2 #define SPI_OPM_RX_QOF 1 << 3 +#define SPI_OPM_RX_QIOF 1 << 4 #define SPI_OPM_RX_EXTN SPI_OPM_RX_AS | SPI_OPM_RX_DOUT | \ - SPI_OPM_RX_DIO | SPI_OPM_RX_QOF + SPI_OPM_RX_DIO | SPI_OPM_RX_QOF | \ + SPI_OPM_RX_QIOF /* Header byte that marks the start of the message */ #define SPI_PREAMBLE_END_BYTE 0xec diff --git a/include/spi_flash.h b/include/spi_flash.h index 8e0bb46e81..99724a0d3e 100644 --- a/include/spi_flash.h +++ b/include/spi_flash.h @@ -28,9 +28,10 @@ enum spi_read_cmds { DUAL_OUTPUT_FAST = 1 << 1, DUAL_IO_FAST = 1 << 2, QUAD_OUTPUT_FAST = 1 << 3, + QUAD_IO_FAST = 1 << 4, }; #define RD_EXTN ARRAY_SLOW | DUAL_OUTPUT_FAST | DUAL_IO_FAST -#define RD_FULL RD_EXTN | QUAD_OUTPUT_FAST +#define RD_FULL RD_EXTN | QUAD_OUTPUT_FAST | QUAD_IO_FAST /** * struct spi_flash_params - SPI/QSPI flash device params structure -- cgit v1.2.1 From ff063ed4808e4ead3021eaf53ee4fdb80c9e91f8 Mon Sep 17 00:00:00 2001 From: Jagannadha Sutradharudu Teki Date: Sat, 11 Jan 2014 16:50:45 +0530 Subject: sf: Discover read dummy_byte Discovered the read dummy_byte based on the configured read command. Signed-off-by: Jagannadha Sutradharudu Teki --- include/spi_flash.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/spi_flash.h b/include/spi_flash.h index 99724a0d3e..437937cfc6 100644 --- a/include/spi_flash.h +++ b/include/spi_flash.h @@ -72,6 +72,7 @@ extern const struct spi_flash_params spi_flash_params_table[]; * @erase_cmd: Erase cmd 4K, 32K, 64K * @read_cmd: Read cmd - Array Fast, Extn read and quad read. * @write_cmd: Write cmd - page and quad program. + * @dummy_byte: Dummy cycles for read operation. * @memory_map: Address of read-only SPI flash access * @read: Flash read ops: Read len bytes at offset into buf * Supported cmds: Fast Array Read @@ -98,6 +99,7 @@ struct spi_flash { u8 erase_cmd; u8 read_cmd; u8 write_cmd; + u8 dummy_byte; void *memory_map; int (*read)(struct spi_flash *flash, u32 offset, size_t len, void *buf); -- cgit v1.2.1 From 2ba863fae628bb5fe2ec4b803f639c1edb55ea33 Mon Sep 17 00:00:00 2001 From: Jagannadha Sutradharudu Teki Date: Sun, 12 Jan 2014 21:38:21 +0530 Subject: sf: Code cleanups - comment typo's - func args have a proper names Signed-off-by: Jagannadha Sutradharudu Teki --- include/spi_flash.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/spi_flash.h b/include/spi_flash.h index 437937cfc6..213d6592be 100644 --- a/include/spi_flash.h +++ b/include/spi_flash.h @@ -19,7 +19,10 @@ #include #include -/* No enum list for write commands only QPP */ +/* sf param flags */ +#define SECT_4K 1 << 1 +#define SECT_32K 1 << 2 +#define E_FSR 1 << 3 #define WR_QPP 1 << 4 /* Enum list - Full read commands */ -- cgit v1.2.1 From f77f469117ab3184ac45683a50dc446265be28cc Mon Sep 17 00:00:00 2001 From: Jagannadha Sutradharudu Teki Date: Sun, 12 Jan 2014 21:40:11 +0530 Subject: sf: Add dual memories support - DUAL_STACKED This patch added support for accessing dual memories in stacked connection with single chipselect line from controller. For more info - see doc/SPI/README.dual-flash Signed-off-by: Jagannadha Sutradharudu Teki --- include/spi.h | 8 ++++++++ include/spi_flash.h | 8 ++++++++ 2 files changed, 16 insertions(+) (limited to 'include') diff --git a/include/spi.h b/include/spi.h index c8a9d87b5f..d214d82923 100644 --- a/include/spi.h +++ b/include/spi.h @@ -30,6 +30,7 @@ #define SPI_XFER_MMAP 0x08 /* Memory Mapped start */ #define SPI_XFER_MMAP_END 0x10 /* Memory Mapped End */ #define SPI_XFER_ONCE (SPI_XFER_BEGIN | SPI_XFER_END) +#define SPI_XFER_U_PAGE (1 << 5) /* SPI TX operation modes */ #define SPI_OPM_TX_QPP 1 << 0 @@ -44,6 +45,9 @@ SPI_OPM_RX_DIO | SPI_OPM_RX_QOF | \ SPI_OPM_RX_QIOF +/* SPI bus connection options */ +#define SPI_CONN_DUAL_SHARED 1 << 0 + /* Header byte that marks the start of the message */ #define SPI_PREAMBLE_END_BYTE 0xec @@ -62,6 +66,8 @@ * @max_write_size: If non-zero, the maximum number of bytes which can * be written at once, excluding command bytes. * @memory_map: Address of read-only SPI flash access. + * @option: Varies SPI bus options - separate bus. + * @flags: Indication of SPI flags. */ struct spi_slave { unsigned int bus; @@ -71,6 +77,8 @@ struct spi_slave { unsigned int wordlen; unsigned int max_write_size; void *memory_map; + u8 option; + u8 flags; }; /** diff --git a/include/spi_flash.h b/include/spi_flash.h index 213d6592be..36f1f033c0 100644 --- a/include/spi_flash.h +++ b/include/spi_flash.h @@ -36,6 +36,12 @@ enum spi_read_cmds { #define RD_EXTN ARRAY_SLOW | DUAL_OUTPUT_FAST | DUAL_IO_FAST #define RD_FULL RD_EXTN | QUAD_OUTPUT_FAST | QUAD_IO_FAST +/* Dual SPI flash memories */ +enum spi_dual_flash { + SF_SINGLE_FLASH = 0, + SF_DUAL_STACKED_FLASH = 1 << 0, +}; + /** * struct spi_flash_params - SPI/QSPI flash device params structure * @@ -64,6 +70,7 @@ extern const struct spi_flash_params spi_flash_params_table[]; * * @spi: SPI slave * @name: Name of SPI flash + * @dual_flash: Indicates dual flash memories - dual stacked * @size: Total flash size * @page_size: Write (page) size * @sector_size: Sector size @@ -88,6 +95,7 @@ extern const struct spi_flash_params spi_flash_params_table[]; struct spi_flash { struct spi_slave *spi; const char *name; + u8 dual_flash; u32 size; u32 page_size; -- cgit v1.2.1 From 056fbc73d54df64adcb93c513cba708acb2683bd Mon Sep 17 00:00:00 2001 From: Jagannadha Sutradharudu Teki Date: Tue, 7 Jan 2014 00:11:35 +0530 Subject: sf: Add dual memories support - DUAL_PARALLEL This patch added support for accessing dual memories in parallel connection with single chipselect line from controller. For more info - see doc/SPI/README.dual-flash Signed-off-by: Jagannadha Sutradharudu Teki --- include/spi.h | 3 ++- include/spi_flash.h | 5 ++++- 2 files changed, 6 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/spi.h b/include/spi.h index d214d82923..ffd66478b1 100644 --- a/include/spi.h +++ b/include/spi.h @@ -47,6 +47,7 @@ /* SPI bus connection options */ #define SPI_CONN_DUAL_SHARED 1 << 0 +#define SPI_CONN_DUAL_SEPARATED 1 << 1 /* Header byte that marks the start of the message */ #define SPI_PREAMBLE_END_BYTE 0xec @@ -66,7 +67,7 @@ * @max_write_size: If non-zero, the maximum number of bytes which can * be written at once, excluding command bytes. * @memory_map: Address of read-only SPI flash access. - * @option: Varies SPI bus options - separate bus. + * @option: Varies SPI bus options - separate, shared bus. * @flags: Indication of SPI flags. */ struct spi_slave { diff --git a/include/spi_flash.h b/include/spi_flash.h index 36f1f033c0..f79f0eacca 100644 --- a/include/spi_flash.h +++ b/include/spi_flash.h @@ -40,6 +40,7 @@ enum spi_read_cmds { enum spi_dual_flash { SF_SINGLE_FLASH = 0, SF_DUAL_STACKED_FLASH = 1 << 0, + SF_DUAL_PARALLEL_FLASH = 1 << 1, }; /** @@ -70,7 +71,8 @@ extern const struct spi_flash_params spi_flash_params_table[]; * * @spi: SPI slave * @name: Name of SPI flash - * @dual_flash: Indicates dual flash memories - dual stacked + * @dual_flash: Indicates dual flash memories - dual stacked, parallel + * @shift: Flash shift useful in dual parallel * @size: Total flash size * @page_size: Write (page) size * @sector_size: Sector size @@ -96,6 +98,7 @@ struct spi_flash { struct spi_slave *spi; const char *name; u8 dual_flash; + u8 shift; u32 size; u32 page_size; -- cgit v1.2.1 From 7d7c497d592de6b7f8a0478d1f28011f24c13598 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Wed, 27 Nov 2013 10:33:49 +0100 Subject: ARM: versatile: pass console setting to the kernel The Versatiles come up with the primary UART set to ttyAMA0 at 38400 baud, and unless we pass this to the kernel it will assume it is set to 9600 baud which will be quite awkward for the terminal, let's try to be helpful and inform the kernel what setting is used. Cc: Stefano Babic Cc: Marek Vasut Signed-off-by: Linus Walleij --- include/configs/versatile.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/versatile.h b/include/configs/versatile.h index 10738ac24b..29c32fee51 100644 --- a/include/configs/versatile.h +++ b/include/configs/versatile.h @@ -101,7 +101,8 @@ #define CONFIG_BOOTDELAY 2 #define CONFIG_BOOTARGS "root=/dev/nfs mem=128M ip=dhcp "\ - "netdev=25,0,0xf1010000,0xf1010010,eth0" + "netdev=25,0,0xf1010000,0xf1010010,eth0 "\ + "console=ttyAMA0,38400n1" /* * Static configuration when assigning fixed address -- cgit v1.2.1 From 7da765125165c172078489336117f95de2904322 Mon Sep 17 00:00:00 2001 From: Inderpal Singh Date: Wed, 8 Jan 2014 09:19:57 +0530 Subject: usb: exynos5: arndale: Add network support Arndale board has AX88760, which is USB 2.0 Hub & USB 2.0 Ethernet Combo controller, connected to HSIC Phy of USB host controller via USB3503 hub. This patch uses board specific board_usb_init function to perform reset sequence for USB3503 hub and enables the relevant config options for network to work. Signed-off-by: Inderpal Singh Signed-off-by: Chander Kashyap --- include/configs/arndale.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include') diff --git a/include/configs/arndale.h b/include/configs/arndale.h index 7e367f39b2..9584d82af7 100644 --- a/include/configs/arndale.h +++ b/include/configs/arndale.h @@ -117,6 +117,10 @@ #define CONFIG_USB_EHCI_EXYNOS #define CONFIG_USB_STORAGE +#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_ASIX + /* MMC SPL */ #define CONFIG_EXYNOS_SPL #define CONFIG_SPL -- cgit v1.2.1 From 3603e31db54ddba820b7a7b9c7659e272f8c65de Mon Sep 17 00:00:00 2001 From: Przemyslaw Marczak Date: Tue, 7 Jan 2014 15:08:37 +0100 Subject: usb: ums: wait for usb cable connection before enter ums mode Before this change ums mode can not be entered when device was using the same usb port for usb/uart communication. Switching USB cable from UART to USB always causes ums exit. Signed-off-by: Przemyslaw Marczak --- include/usb_mass_storage.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/usb_mass_storage.h b/include/usb_mass_storage.h index 9df3adcf2a..058dcf1174 100644 --- a/include/usb_mass_storage.h +++ b/include/usb_mass_storage.h @@ -20,6 +20,9 @@ #define UMS_NUM_SECTORS 0 #endif +/* Wait at maximum 60 seconds for cable connection */ +#define UMS_CABLE_READY_TIMEOUT 60 + struct ums { int (*read_sector)(struct ums *ums_dev, ulong start, lbaint_t blkcnt, void *buf); -- cgit v1.2.1 From cdd15bcebc6ddd5365f2a1133f56cd3209f30288 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C5=81ukasz=20Majewski?= Date: Tue, 14 Jan 2014 08:02:24 +0100 Subject: config: Update envs for trats and trats2 - new entries for new partitions This patch adds extra dfu_alt_info entries to support storing the whole BOOT , DATA and UMS partitions. This allows upgrade of uImage and device tree blob (dtb) files at once. Now it is also possible to store ext4 rootfs prepared with well established linux tools (like mkfs.ext4). Signed-off-by: Lukasz Majewski Acked-by: Minkyu Kang --- include/configs/trats.h | 5 ++++- include/configs/trats2.h | 5 ++++- 2 files changed, 8 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/trats.h b/include/configs/trats.h index 6cd15c25bd..0bdfe86477 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -143,7 +143,10 @@ "u-boot mmc 80 400;" \ "uImage ext4 0 2;" \ "exynos4210-trats.dtb ext4 0 2;" \ - ""PARTS_ROOT" part 0 5\0" + ""PARTS_BOOT" part 0 2;" \ + ""PARTS_ROOT" part 0 5;" \ + ""PARTS_DATA" part 0 6;" \ + ""PARTS_UMS" part 0 7\0" #define CONFIG_ENV_OVERWRITE #define CONFIG_SYS_CONSOLE_INFO_QUIET diff --git a/include/configs/trats2.h b/include/configs/trats2.h index c9ce828666..f335280c0d 100644 --- a/include/configs/trats2.h +++ b/include/configs/trats2.h @@ -173,7 +173,10 @@ "u-boot mmc 80 800;" \ "uImage ext4 0 2;" \ "exynos4412-trats2.dtb ext4 0 2;" \ - ""PARTS_ROOT" part 0 5\0" + ""PARTS_BOOT" part 0 2;" \ + ""PARTS_ROOT" part 0 5;" \ + ""PARTS_DATA" part 0 6;" \ + ""PARTS_UMS" part 0 7\0" #define CONFIG_EXTRA_ENV_SETTINGS \ "bootk=" \ -- cgit v1.2.1 From c4e96dbfccef3d8089d94b23e3724ac313c68886 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C5=81ukasz=20Majewski?= Date: Tue, 14 Jan 2014 08:02:26 +0100 Subject: config: Update envs for trats and trats2 - Disable L2 cache Disable L2 caches for Trats and Trats2 devices. It turns out that for data downloading with thordown command L2 cache disablement brings a significant speed improvement. rootfs - 400 MiB: - L2 cache enabled: 2.69 MiB/s - L2 cache disabled: 5.56 MiB/s Such improvement is possible due to reduction of the need to invalidate redundant data, which resides in L2 cache. Since the sent USB request size at once is 512B (L1 - 32 KiB in total) - one can be quite confident that it is already available in L1 and L2 can be disabled. Signed-off-by: Lukasz Majewski Acked-by: Minkyu Kang --- include/configs/trats.h | 1 + include/configs/trats2.h | 1 + 2 files changed, 2 insertions(+) (limited to 'include') diff --git a/include/configs/trats.h b/include/configs/trats.h index 0bdfe86477..fdd8b460b0 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -27,6 +27,7 @@ #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO +#define CONFIG_SYS_L2CACHE_OFF #ifndef CONFIG_SYS_L2CACHE_OFF #define CONFIG_SYS_L2_PL310 #define CONFIG_SYS_PL310_BASE 0x10502000 diff --git a/include/configs/trats2.h b/include/configs/trats2.h index f335280c0d..892dd8e889 100644 --- a/include/configs/trats2.h +++ b/include/configs/trats2.h @@ -30,6 +30,7 @@ #define CONFIG_SYS_CACHELINE_SIZE 32 +#define CONFIG_SYS_L2CACHE_OFF #ifndef CONFIG_SYS_L2CACHE_OFF #define CONFIG_SYS_L2_PL310 #define CONFIG_SYS_PL310_BASE 0x10502000 -- cgit v1.2.1 From 6e5d1db3c41b41c889adb4921b4516bcf62ae946 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C5=81ukasz=20Majewski?= Date: Tue, 14 Jan 2014 08:02:25 +0100 Subject: ARM: trats2: dfu: Enable default Poll Timeout for Trats2 board Provide default Poll Timeout value for Trats2 board. Signed-off-by: Lukasz Majewski Acked-by: Minkyu Kang --- include/configs/trats2.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/trats2.h b/include/configs/trats2.h index 892dd8e889..83633b074d 100644 --- a/include/configs/trats2.h +++ b/include/configs/trats2.h @@ -115,6 +115,7 @@ /* USB Composite download gadget - g_dnl */ #define CONFIG_USBDOWNLOAD_GADGET #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_32M +#define DFU_DEFAULT_POLL_TIMEOUT 300 #define CONFIG_DFU_FUNCTION #define CONFIG_DFU_MMC -- cgit v1.2.1 From 3865ceb726d997731b14756b70ebf1e083c213fa Mon Sep 17 00:00:00 2001 From: Bhupesh Sharma Date: Thu, 16 Jan 2014 09:47:40 -0600 Subject: vexpress/armv8: Fix incorrect ethernet controller This patch enables ethernet support in ARMv8 foundation model. The ARMv8 foundation model supports a SMSC91C111 integrated MAC and PHY module which is present at base address 0x01A000000. The previous implementation had enabled SMSC9115 ethernet controller which is not present on the ARMv8 foundation model. Tested on ARMv8 foundation model v1 and v2 by running ping/tftp between the foundation model and the host PC via a bridged network. Signed-off-by: Bhupesh Sharma --- include/configs/vexpress_aemv8a.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/configs/vexpress_aemv8a.h b/include/configs/vexpress_aemv8a.h index ce5f384776..e8517027e7 100644 --- a/include/configs/vexpress_aemv8a.h +++ b/include/configs/vexpress_aemv8a.h @@ -102,9 +102,9 @@ /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024) -/* SMSC9115 Ethernet from SMSC9118 family */ -#define CONFIG_SMC9111 1 -#define CONFIG_SMC9111_BASE (0x1a000000) +/* SMSC91C111 Ethernet Configuration */ +#define CONFIG_SMC91111 1 +#define CONFIG_SMC91111_BASE (0x01A000000) /* PL011 Serial Configuration */ #define CONFIG_PL011_SERIAL -- cgit v1.2.1 From 5c9038b6af1a93410af966999638eabb81efcd0f Mon Sep 17 00:00:00 2001 From: Robert Nelson Date: Fri, 17 Jan 2014 09:51:28 -0600 Subject: omap3_beagle: use omap3-beagle.dtb for the C4 revision findftd is currently setting fdtfile to undefined for the beagle c4, select omap3-beagle.dtb instead Signed-off-by: Robert Nelson --- include/configs/omap3_beagle.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index 1b566c01ee..c58bc91a50 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -241,6 +241,8 @@ "setenv fdtfile omap3-beagle.dtb; fi; " \ "if test $beaglerev = Cx; then " \ "setenv fdtfile omap3-beagle.dtb; fi; " \ + "if test $beaglerev = C4; then " \ + "setenv fdtfile omap3-beagle.dtb; fi; " \ "if test $beaglerev = xMAB; then " \ "setenv fdtfile omap3-beagle-xm.dtb; fi; " \ "if test $beaglerev = xMC; then " \ -- cgit v1.2.1 From 2eb3ac7fe8ee29b2edfd7e0309115c2fc6875f95 Mon Sep 17 00:00:00 2001 From: Priyanka Jain Date: Fri, 3 Jan 2014 11:24:55 +0530 Subject: powerpc/t1040qds: Update DDR initialization related settings Update following DDR related settings for T1040QDS -Correct number of chip selects to two as t1040qds supports two Chip selects. -Update board_specific_parameters udimm structure with settings derived via calibration. -Reduced I2C speed to 50KHz as DDR-SPD does not get reliably read at 400KHz. Verified the updated settings to be working fine with dual-ranked Micron, MT18KSF51272AZ-1G6 DIMM at data rate 833MT/s, 1333MT/s and 1600MT/s. Signed-off-by: Poonam Aggrwal Signed-off-by: Priyanka Jain Reviewed-by: York Sun --- include/configs/T1040QDS.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index 7d0bc043f9..cfaac43050 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -167,7 +167,7 @@ unsigned long get_board_ddr_clk(void); /* CONFIG_NUM_DDR_CONTROLLERS is defined in include/asm/config_mpc85xx.h */ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR) +#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_DDR_SPD #define CONFIG_SYS_FSL_DDR3 @@ -414,9 +414,9 @@ unsigned long get_board_ddr_clk(void); /* I2C */ #define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_FSL /* Use FSL common I2C driver */ -#define CONFIG_SYS_FSL_I2C_SPEED 400000 /* I2C speed in Hz */ +#define CONFIG_SYS_FSL_I2C_SPEED 50000 /* I2C speed in Hz */ #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F -#define CONFIG_SYS_FSL_I2C2_SPEED 400000 /* I2C speed in Hz */ +#define CONFIG_SYS_FSL_I2C2_SPEED 50000 /* I2C speed in Hz */ #define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C_OFFSET 0x118000 #define CONFIG_SYS_FSL_I2C2_OFFSET 0x119000 -- cgit v1.2.1 From eb6b458cef28c86603d56a27b9ee699b13c60c14 Mon Sep 17 00:00:00 2001 From: Po Liu Date: Fri, 10 Jan 2014 10:10:59 +0800 Subject: powerpc/c29xpcie: 8k page size NAND boot support base on TPL/SPL Using the TPL/SPL method to booting from 8k page NAND flash. - Add 256kB size SRAM tlb for second step booting; - Add spl.c for TPL image boot; - Add spl_minimal.c for minimal SPL image; - Add C29XPCIE_NAND configure; - Modify C29XPCIE.h for nand config and enviroment; Signed-off-by: Po Liu Reviewed-by: York Sun --- include/configs/C29XPCIE.h | 130 +++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 126 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h index 1cfb2c2279..8ec5cee8c1 100644 --- a/include/configs/C29XPCIE.h +++ b/include/configs/C29XPCIE.h @@ -23,6 +23,49 @@ #define CONFIG_RESET_VECTOR_ADDRESS 0x1107fffc #endif +#ifdef CONFIG_NAND +#define CONFIG_SPL +#define CONFIG_TPL +#ifdef CONFIG_TPL_BUILD +#define CONFIG_SPL_NAND_BOOT +#define CONFIG_SPL_FLUSH_IMAGE +#define CONFIG_SPL_ENV_SUPPORT +#define CONFIG_SPL_NAND_INIT +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_I2C_SUPPORT +#define CONFIG_SPL_DRIVERS_MISC_SUPPORT +#define CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT +#define CONFIG_SPL_COMMON_INIT_DDR +#define CONFIG_SPL_MAX_SIZE (128 << 10) +#define CONFIG_SPL_TEXT_BASE 0xf8f81000 +#define CONFIG_SYS_MPC85XX_NO_RESETVEC +#define CONFIG_SYS_NAND_U_BOOT_SIZE (576 << 10) +#define CONFIG_SYS_NAND_U_BOOT_DST (0x11000000) +#define CONFIG_SYS_NAND_U_BOOT_START (0x11000000) +#define CONFIG_SYS_NAND_U_BOOT_OFFS ((128 + 128) << 10) +#elif defined(CONFIG_SPL_BUILD) +#define CONFIG_SPL_INIT_MINIMAL +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SPL_NAND_MINIMAL +#define CONFIG_SPL_FLUSH_IMAGE +#define CONFIG_SPL_TEXT_BASE 0xff800000 +#define CONFIG_SPL_MAX_SIZE 8192 +#define CONFIG_SYS_NAND_U_BOOT_SIZE (128 << 10) +#define CONFIG_SYS_NAND_U_BOOT_DST 0xf8f80000 +#define CONFIG_SYS_NAND_U_BOOT_START 0xf8f80000 +#define CONFIG_SYS_NAND_U_BOOT_OFFS (128 << 10) +#endif +#define CONFIG_SPL_PAD_TO 0x20000 +#define CONFIG_TPL_PAD_TO 0x20000 +#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" +#define CONFIG_SYS_TEXT_BASE 0x11001000 +#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" +#endif + #ifndef CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_TEXT_BASE 0xeff80000 #endif @@ -31,8 +74,14 @@ #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc #endif -#ifndef CONFIG_SYS_MONITOR_BASE -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE +#else +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ +#endif + +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE #endif /* High Level Configuration Options */ @@ -130,6 +179,10 @@ (0xf00000000ull | CONFIG_SYS_PLATFORM_SRAM_BASE) #define CONFIG_SYS_PLATFORM_SRAM_SIZE (512 << 10) +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SYS_NO_FLASH +#endif + /* * IFC Definitions */ @@ -183,7 +236,7 @@ #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_MTD_NAND_VERIFY_WRITE #define CONFIG_CMD_NAND -#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) +#define CONFIG_SYS_NAND_BLOCK_SIZE (1024 * 1024) /* 8Bit NAND Flash - K9F1G08U0B */ #define CONFIG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \ @@ -215,6 +268,23 @@ #define CONFIG_SYS_NAND_DDR_LAW 11 /* Set up IFC registers for boot location NOR/NAND */ +#ifdef CONFIG_NAND +#define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR +#define CONFIG_SYS_AMASK0 CONFIG_SYS_NAND_AMASK +#define CONFIG_SYS_CSOR0 CONFIG_SYS_NAND_CSOR +#define CONFIG_SYS_CSOR0_EXT CONFIG_SYS_NAND_OOBSIZE +#define CONFIG_SYS_CS0_FTIM0 CONFIG_SYS_NAND_FTIM0 +#define CONFIG_SYS_CS0_FTIM1 CONFIG_SYS_NAND_FTIM1 +#define CONFIG_SYS_CS0_FTIM2 CONFIG_SYS_NAND_FTIM2 +#define CONFIG_SYS_CS0_FTIM3 CONFIG_SYS_NAND_FTIM3 +#define CONFIG_SYS_CSPR1 CONFIG_SYS_NOR_CSPR +#define CONFIG_SYS_AMASK1 CONFIG_SYS_NOR_AMASK +#define CONFIG_SYS_CSOR1 CONFIG_SYS_NOR_CSOR +#define CONFIG_SYS_CS1_FTIM0 CONFIG_SYS_NOR_FTIM0 +#define CONFIG_SYS_CS1_FTIM1 CONFIG_SYS_NOR_FTIM1 +#define CONFIG_SYS_CS1_FTIM2 CONFIG_SYS_NOR_FTIM2 +#define CONFIG_SYS_CS1_FTIM3 CONFIG_SYS_NOR_FTIM3 +#else #define CONFIG_SYS_CSPR0 CONFIG_SYS_NOR_CSPR #define CONFIG_SYS_AMASK0 CONFIG_SYS_NOR_AMASK #define CONFIG_SYS_CSOR0 CONFIG_SYS_NOR_CSOR @@ -230,6 +300,7 @@ #define CONFIG_SYS_CS1_FTIM1 CONFIG_SYS_NAND_FTIM1 #define CONFIG_SYS_CS1_FTIM2 CONFIG_SYS_NAND_FTIM2 #define CONFIG_SYS_CS1_FTIM3 CONFIG_SYS_NAND_FTIM3 +#endif /* CPLD on IFC, selected by CS2 */ #define CONFIG_SYS_CPLD_BASE 0xffdf0000 @@ -269,7 +340,44 @@ #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET #define CONFIG_SYS_MONITOR_LEN (512 * 1024) -#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) +#define CONFIG_SYS_MALLOC_LEN (2 * 1024 * 1024) + +/* + * Config the L2 Cache as L2 SRAM + */ +#if defined(CONFIG_SPL_BUILD) +#if defined(CONFIG_SDCARD) || defined(CONFIG_SPIFLASH) +#define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 +#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR +#define CONFIG_SYS_L2_SIZE (256 << 10) +#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) +#define CONFIG_SPL_RELOC_TEXT_BASE 0xf8f81000 +#define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 128 * 1024) +#define CONFIG_SPL_RELOC_STACK_SIZE (32 << 10) +#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 160 * 1024) +#define CONFIG_SPL_RELOC_MALLOC_SIZE (96 << 10) +#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 112 * 1024) +#elif defined(CONFIG_NAND) +#ifdef CONFIG_TPL_BUILD +#define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 +#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR +#define CONFIG_SYS_L2_SIZE (256 << 10) +#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) +#define CONFIG_SPL_RELOC_TEXT_BASE 0xf8f81000 +#define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 192 * 1024) +#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 208 * 1024) +#define CONFIG_SPL_RELOC_MALLOC_SIZE (48 << 10) +#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 176 * 1024) +#else +#define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 +#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR +#define CONFIG_SYS_L2_SIZE (256 << 10) +#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) +#define CONFIG_SPL_RELOC_TEXT_BASE (CONFIG_SYS_INIT_L2_END - 0x3000) +#define CONFIG_SPL_RELOC_STACK ((CONFIG_SYS_INIT_L2_END - 1) & ~0xF) +#endif +#endif +#endif /* Serial Port */ #define CONFIG_CONS_INDEX 1 @@ -278,6 +386,10 @@ #define CONFIG_SYS_NS16550_REG_SIZE 1 #define CONFIG_SYS_NS16550_CLK get_bus_freq(0) +#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_INIT_MINIMAL) +#define CONFIG_NS16550_MIN_FUNCTIONS +#endif + #define CONFIG_SERIAL_MULTI /* Enable both serial ports */ #define CONFIG_SYS_CONSOLE_IS_IN_ENV @@ -364,6 +476,16 @@ #define CONFIG_ENV_SECT_SIZE 0x10000 #define CONFIG_ENV_SIZE 0x2000 #endif +#elif defined(CONFIG_NAND) +#define CONFIG_ENV_IS_IN_NAND +#ifdef CONFIG_TPL_BUILD +#define CONFIG_ENV_SIZE 0x2000 +#define CONFIG_ENV_ADDR (CONFIG_SYS_INIT_L2_ADDR + (160 << 10)) +#else +#define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE +#define CONFIG_ENV_RANGE CONFIG_ENV_SIZE +#endif +#define CONFIG_ENV_OFFSET CONFIG_SYS_NAND_BLOCK_SIZE #else #define CONFIG_ENV_IS_IN_FLASH #if CONFIG_SYS_MONITOR_BASE > 0xfff80000 -- cgit v1.2.1 From 690e425844511fe37d3315e86414d0a9e3accd1c Mon Sep 17 00:00:00 2001 From: Prabhakar Kushwaha Date: Mon, 13 Jan 2014 11:28:04 +0530 Subject: powerpc:Rename CONFIG_PBLRCW_CONFIG & CONFIG_SYS_FSL_PBL_PBI Rename CONFIG_PBLRCW_CONFIG and CONFIG_PBLRCW_CONFIG. Also add their details in README. Signed-off-by: Prabhakar Kushwaha Reviewed-by: York Sun --- include/configs/B4860QDS.h | 4 ++-- include/configs/P2041RDB.h | 5 +++-- include/configs/T1040QDS.h | 4 ++-- include/configs/T2080QDS.h | 4 ++-- include/configs/T4240QDS.h | 4 ++-- include/configs/corenet_ds.h | 14 +++++++++----- include/configs/km/kmp204x-common.h | 4 ++-- 7 files changed, 22 insertions(+), 17 deletions(-) (limited to 'include') diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index c182158be4..c66722946e 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -16,8 +16,8 @@ #ifdef CONFIG_RAMBOOT_PBL #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc -#define CONFIG_PBLPBI_CONFIG $(SRCTREE)/board/freescale/b4860qds/b4_pbi.cfg -#define CONFIG_PBLRCW_CONFIG $(SRCTREE)/board/freescale/b4860qds/b4_rcw.cfg +#define CONFIG_SYS_FSL_PBL_PBI $(SRCTREE)/board/freescale/b4860qds/b4_pbi.cfg +#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/b4860qds/b4_rcw.cfg #endif #ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index ee71252b00..2b81cbe111 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -18,8 +18,9 @@ #ifdef CONFIG_RAMBOOT_PBL #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc -#define CONFIG_PBLPBI_CONFIG $(SRCTREE)/board/freescale/corenet_ds/pbi.cfg -#define CONFIG_PBLRCW_CONFIG $(SRCTREE)/board/freescale/corenet_ds/rcw_p2041rdb.cfg +#define CONFIG_SYS_FSL_PBL_PBI $(SRCTREE)/board/freescale/corenet_ds/pbi.cfg +#define CONFIG_SYS_FSL_PBL_RCW \ + $(SRCTREE)/board/freescale/corenet_ds/rcw_p2041rdb.cfg #endif #ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index cfaac43050..a639530eeb 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -32,8 +32,8 @@ #ifdef CONFIG_RAMBOOT_PBL #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc -#define CONFIG_PBLPBI_CONFIG $(SRCTREE)/board/freescale/t1040qds/t1040_pbi.cfg -#define CONFIG_PBLRCW_CONFIG $(SRCTREE)/board/freescale/t1040qds/t1040_rcw.cfg +#define CONFIG_SYS_FSL_PBL_PBI $(SRCTREE)/board/freescale/t1040qds/t1040_pbi.cfg +#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t1040qds/t1040_rcw.cfg #endif /* High Level Configuration Options */ diff --git a/include/configs/T2080QDS.h b/include/configs/T2080QDS.h index bff001f433..b35e1073bf 100644 --- a/include/configs/T2080QDS.h +++ b/include/configs/T2080QDS.h @@ -45,8 +45,8 @@ #ifdef CONFIG_RAMBOOT_PBL #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc -#define CONFIG_PBLPBI_CONFIG $(SRCTREE)/board/freescale/t2080qds/t2080_pbi.cfg -#define CONFIG_PBLRCW_CONFIG $(SRCTREE)/board/freescale/t2080qds/t2080_rcw.cfg +#define CONFIG_SYS_FSL_PBL_PBI $(SRCTREE)/board/freescale/t2080qds/t2080_pbi.cfg +#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t2080qds/t2080_rcw.cfg #endif #define CONFIG_SRIO_PCIE_BOOT_MASTER diff --git a/include/configs/T4240QDS.h b/include/configs/T4240QDS.h index c96df54d99..1f1177be60 100644 --- a/include/configs/T4240QDS.h +++ b/include/configs/T4240QDS.h @@ -21,8 +21,8 @@ #ifdef CONFIG_RAMBOOT_PBL #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc -#define CONFIG_PBLPBI_CONFIG $(SRCTREE)/board/freescale/t4qds/t4_pbi.cfg -#define CONFIG_PBLRCW_CONFIG $(SRCTREE)/board/freescale/t4qds/t4_rcw.cfg +#define CONFIG_SYS_FSL_PBL_PBI $(SRCTREE)/board/freescale/t4qds/t4_pbi.cfg +#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t4qds/t4_rcw.cfg #endif #ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 969b9903fb..3a1826dddd 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -15,15 +15,19 @@ #ifdef CONFIG_RAMBOOT_PBL #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc -#define CONFIG_PBLPBI_CONFIG $(SRCTREE)/board/freescale/corenet_ds/pbi.cfg +#define CONFIG_SYS_FSL_PBL_PBI $(SRCTREE)/board/freescale/corenet_ds/pbi.cfg #if defined(CONFIG_P3041DS) -#define CONFIG_PBLRCW_CONFIG $(SRCTREE)/board/freescale/corenet_ds/rcw_p3041ds.cfg +#define CONFIG_SYS_FSL_PBL_RCW \ + $(SRCTREE)/board/freescale/corenet_ds/rcw_p3041ds.cfg #elif defined(CONFIG_P4080DS) -#define CONFIG_PBLRCW_CONFIG $(SRCTREE)/board/freescale/corenet_ds/rcw_p4080ds.cfg +#define CONFIG_SYS_FSL_PBL_RCW \ + $(SRCTREE)/board/freescale/corenet_ds/rcw_p4080ds.cfg #elif defined(CONFIG_P5020DS) -#define CONFIG_PBLRCW_CONFIG $(SRCTREE)/board/freescale/corenet_ds/rcw_p5020ds.cfg +#define CONFIG_SYS_FSL_PBL_RCW \ + $(SRCTREE)/board/freescale/corenet_ds/rcw_p5020ds.cfg #elif defined(CONFIG_P5040DS) -#define CONFIG_PBLRCW_CONFIG $(SRCTREE)/board/freescale/corenet_ds/rcw_p5040ds.cfg +#define CONFIG_SYS_FSL_PBL_RCW \ + $(SRCTREE)/board/freescale/corenet_ds/rcw_p5040ds.cfg #endif #endif diff --git a/include/configs/km/kmp204x-common.h b/include/configs/km/kmp204x-common.h index 50330ccf6e..0463fcbac7 100644 --- a/include/configs/km/kmp204x-common.h +++ b/include/configs/km/kmp204x-common.h @@ -24,8 +24,8 @@ #define CONFIG_RAMBOOT_PBL #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc -#define CONFIG_PBLPBI_CONFIG $(SRCTREE)/board/keymile/kmp204x/pbi.cfg -#define CONFIG_PBLRCW_CONFIG $(SRCTREE)/board/keymile/kmp204x/rcw_kmp204x.cfg +#define CONFIG_SYS_FSL_PBL_PBI $(SRCTREE)/board/keymile/kmp204x/pbi.cfg +#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/keymile/kmp204x/rcw_kmp204x.cfg /* High Level Configuration Options */ #define CONFIG_BOOKE -- cgit v1.2.1 From e222b1f36fedb0363dbc21e0add7dc3848bae553 Mon Sep 17 00:00:00 2001 From: Prabhakar Kushwaha Date: Tue, 14 Jan 2014 11:34:26 +0530 Subject: powerpc/mpc85xx:Increase binary size for P, B & T series boards. u-boot binary size for Freescale mpc85xx platforms is 512KB. This has been reached to upper limit for some of the platforms causig linker error. So, Increase the u-boot binary size to 768KB. Signed-off-by: York Sun Signed-off-by: Prabhakar Kushwaha --- include/configs/B4860QDS.h | 8 ++++---- include/configs/BSC9131RDB.h | 6 +++--- include/configs/BSC9132QDS.h | 17 +++++++---------- include/configs/C29XPCIE.h | 10 +++------- include/configs/P1010RDB.h | 16 ++++++---------- include/configs/P1022DS.h | 12 ++++-------- include/configs/P1023RDB.h | 8 ++------ include/configs/P1023RDS.h | 12 ++++-------- include/configs/P1_P2_RDB.h | 14 +++++--------- include/configs/P2020DS.h | 10 +++------- include/configs/P2041RDB.h | 16 ++++++++-------- include/configs/T1040QDS.h | 16 ++++++++-------- include/configs/T1040RDB.h | 16 ++++++++-------- include/configs/T1042RDB_PI.h | 16 ++++++++-------- include/configs/T2080QDS.h | 16 ++++++++-------- include/configs/T4240EMU.h | 4 ++-- include/configs/T4240QDS.h | 14 +++++++------- include/configs/corenet_ds.h | 16 ++++++++-------- include/configs/p1_p2_rdb_pc.h | 12 ++++-------- include/configs/p1_twr.h | 8 ++------ include/configs/t4qds.h | 2 +- 21 files changed, 105 insertions(+), 144 deletions(-) (limited to 'include') diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index c66722946e..39c0b6d8c7 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -38,7 +38,7 @@ #define CONFIG_MP /* support multiple processors */ #ifndef CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_TEXT_BASE 0xeff80000 +#define CONFIG_SYS_TEXT_BASE 0xeff40000 #endif #ifndef CONFIG_RESET_VECTOR_ADDRESS @@ -115,7 +115,7 @@ #define CONFIG_SYS_EXTRA_ENV_RELOC #define CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE -#define CONFIG_ENV_OFFSET (5 * CONFIG_SYS_NAND_BLOCK_SIZE) +#define CONFIG_ENV_OFFSET (7 * CONFIG_SYS_NAND_BLOCK_SIZE) #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) #define CONFIG_ENV_IS_IN_REMOTE #define CONFIG_ENV_ADDR 0xffe20000 @@ -608,7 +608,7 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_QE_FMAN_FW_ADDR (512 * 1130) #elif defined(CONFIG_NAND) #define CONFIG_SYS_QE_FMAN_FW_IN_NAND -#define CONFIG_SYS_QE_FMAN_FW_ADDR (6 * CONFIG_SYS_NAND_BLOCK_SIZE) +#define CONFIG_SYS_QE_FMAN_FW_ADDR (8 * CONFIG_SYS_NAND_BLOCK_SIZE) #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) /* * Slave has no ucode locally, it can fetch this from remote. When implementing @@ -621,7 +621,7 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_QE_FMAN_FW_ADDR 0xFFE00000 #else #define CONFIG_SYS_QE_FMAN_FW_IN_NOR -#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xEFF40000 +#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xEFF00000 #endif #define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000 #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) diff --git a/include/configs/BSC9131RDB.h b/include/configs/BSC9131RDB.h index 584aba8d0e..fa89d13944 100644 --- a/include/configs/BSC9131RDB.h +++ b/include/configs/BSC9131RDB.h @@ -21,7 +21,7 @@ #define CONFIG_SYS_RAMBOOT #define CONFIG_SYS_EXTRA_ENV_RELOC #define CONFIG_SYS_TEXT_BASE 0x11000000 -#define CONFIG_RESET_VECTOR_ADDRESS 0x1107fffc +#define CONFIG_RESET_VECTOR_ADDRESS 0x110bfffc #endif #ifdef CONFIG_NAND @@ -38,7 +38,7 @@ #define CONFIG_SPL_MAX_SIZE 8192 #define CONFIG_SPL_RELOC_TEXT_BASE 0x00100000 #define CONFIG_SPL_RELOC_STACK 0x00100000 -#define CONFIG_SYS_NAND_U_BOOT_SIZE ((512 << 10) - 0x2000) +#define CONFIG_SYS_NAND_U_BOOT_SIZE ((768 << 10) - 0x2000) #define CONFIG_SYS_NAND_U_BOOT_DST (0x00200000 - CONFIG_SPL_MAX_SIZE) #define CONFIG_SYS_NAND_U_BOOT_START 0x00200000 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0 @@ -326,7 +326,7 @@ extern unsigned long get_sdram_size(void); #define CONFIG_ENV_IS_IN_NAND #define CONFIG_SYS_EXTRA_ENV_RELOC #define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE -#define CONFIG_ENV_OFFSET ((512 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE) +#define CONFIG_ENV_OFFSET ((768 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE) #define CONFIG_ENV_RANGE (3 * CONFIG_ENV_SIZE) #elif defined(CONFIG_SYS_RAMBOOT) #define CONFIG_ENV_IS_NOWHERE /* Store ENV in memory only */ diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h index 6170cbc81f..a973a49147 100644 --- a/include/configs/BSC9132QDS.h +++ b/include/configs/BSC9132QDS.h @@ -22,7 +22,7 @@ #define CONFIG_SYS_RAMBOOT #define CONFIG_SYS_EXTRA_ENV_RELOC #define CONFIG_SYS_TEXT_BASE 0x11000000 -#define CONFIG_RESET_VECTOR_ADDRESS 0x1107fffc +#define CONFIG_RESET_VECTOR_ADDRESS 0x110bfffc #endif #define CONFIG_SYS_FSL_ERRATUM_IFC_A002769 1 #ifdef CONFIG_SPIFLASH @@ -30,7 +30,7 @@ #define CONFIG_SYS_RAMBOOT #define CONFIG_SYS_EXTRA_ENV_RELOC #define CONFIG_SYS_TEXT_BASE 0x11000000 -#define CONFIG_RESET_VECTOR_ADDRESS 0x1107fffc +#define CONFIG_RESET_VECTOR_ADDRESS 0x110bfffc #endif #ifdef CONFIG_NAND @@ -47,7 +47,7 @@ #define CONFIG_SPL_MAX_SIZE 8192 #define CONFIG_SPL_RELOC_TEXT_BASE 0x00100000 #define CONFIG_SPL_RELOC_STACK 0x00100000 -#define CONFIG_SYS_NAND_U_BOOT_SIZE ((512 << 10) - 0x2000) +#define CONFIG_SYS_NAND_U_BOOT_SIZE ((768 << 10) - 0x2000) #define CONFIG_SYS_NAND_U_BOOT_DST (0x00200000 - CONFIG_SPL_MAX_SIZE) #define CONFIG_SYS_NAND_U_BOOT_START 0x00200000 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0 @@ -55,7 +55,7 @@ #endif #ifndef CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_TEXT_BASE 0x8ff80000 +#define CONFIG_SYS_TEXT_BASE 0x8ff40000 #endif #ifndef CONFIG_RESET_VECTOR_ADDRESS @@ -540,6 +540,7 @@ combinations. this should be removed later */ #if defined(CONFIG_RAMBOOT_SDCARD) #define CONFIG_ENV_IS_IN_MMC +#define CONFIG_FSL_FIXED_MMC_LOCATION #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_ENV_SIZE 0x2000 #elif defined(CONFIG_RAMBOOT_SPIFLASH) @@ -554,7 +555,7 @@ combinations. this should be removed later #elif defined(CONFIG_NAND) #define CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE -#define CONFIG_ENV_OFFSET ((512 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE) +#define CONFIG_ENV_OFFSET ((768 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE) #define CONFIG_ENV_RANGE (3 * CONFIG_ENV_SIZE) #elif defined(CONFIG_SYS_RAMBOOT) #define CONFIG_ENV_IS_NOWHERE /* Store ENV in memory only */ @@ -562,13 +563,9 @@ combinations. this should be removed later #define CONFIG_ENV_SIZE 0x2000 #else #define CONFIG_ENV_IS_IN_FLASH -#if CONFIG_SYS_MONITOR_BASE > 0xfff80000 -#define CONFIG_ENV_ADDR 0xfff80000 -#else #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE) -#endif #define CONFIG_ENV_SIZE 0x2000 -#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */ +#define CONFIG_ENV_SECT_SIZE 0x20000 #endif #define CONFIG_LOADS_ECHO /* echo on for serial download */ diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h index 8ec5cee8c1..69ca0a13e4 100644 --- a/include/configs/C29XPCIE.h +++ b/include/configs/C29XPCIE.h @@ -20,7 +20,7 @@ #ifdef CONFIG_SPIFLASH #define CONFIG_RAMBOOT_SPIFLASH #define CONFIG_SYS_TEXT_BASE 0x11000000 -#define CONFIG_RESET_VECTOR_ADDRESS 0x1107fffc +#define CONFIG_RESET_VECTOR_ADDRESS 0x110bfffc #endif #ifdef CONFIG_NAND @@ -42,7 +42,7 @@ #define CONFIG_SPL_MAX_SIZE (128 << 10) #define CONFIG_SPL_TEXT_BASE 0xf8f81000 #define CONFIG_SYS_MPC85XX_NO_RESETVEC -#define CONFIG_SYS_NAND_U_BOOT_SIZE (576 << 10) +#define CONFIG_SYS_NAND_U_BOOT_SIZE (832 << 10) #define CONFIG_SYS_NAND_U_BOOT_DST (0x11000000) #define CONFIG_SYS_NAND_U_BOOT_START (0x11000000) #define CONFIG_SYS_NAND_U_BOOT_OFFS ((128 + 128) << 10) @@ -67,7 +67,7 @@ #endif #ifndef CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_TEXT_BASE 0xeff80000 +#define CONFIG_SYS_TEXT_BASE 0xeff40000 #endif #ifndef CONFIG_RESET_VECTOR_ADDRESS @@ -488,11 +488,7 @@ #define CONFIG_ENV_OFFSET CONFIG_SYS_NAND_BLOCK_SIZE #else #define CONFIG_ENV_IS_IN_FLASH -#if CONFIG_SYS_MONITOR_BASE > 0xfff80000 -#define CONFIG_ENV_ADDR 0xfff80000 -#else #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE) -#endif #define CONFIG_ENV_SIZE 0x2000 #define CONFIG_ENV_SECT_SIZE 0x20000 #endif diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index ea5cb6501b..62d7a84f4c 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -23,13 +23,13 @@ #ifdef CONFIG_SDCARD #define CONFIG_RAMBOOT_SDCARD #define CONFIG_SYS_TEXT_BASE 0x11000000 -#define CONFIG_RESET_VECTOR_ADDRESS 0x1107fffc +#define CONFIG_RESET_VECTOR_ADDRESS 0x110bfffc #endif #ifdef CONFIG_SPIFLASH #define CONFIG_RAMBOOT_SPIFLASH #define CONFIG_SYS_TEXT_BASE 0x11000000 -#define CONFIG_RESET_VECTOR_ADDRESS 0x1107fffc +#define CONFIG_RESET_VECTOR_ADDRESS 0x110bfffc #endif #ifdef CONFIG_NAND @@ -46,7 +46,7 @@ #define CONFIG_SPL_MAX_SIZE 8192 #define CONFIG_SPL_RELOC_TEXT_BASE 0x00100000 #define CONFIG_SPL_RELOC_STACK 0x00100000 -#define CONFIG_SYS_NAND_U_BOOT_SIZE ((512 << 10) - 0x2000) +#define CONFIG_SYS_NAND_U_BOOT_SIZE ((768 << 10) - 0x2000) #define CONFIG_SYS_NAND_U_BOOT_DST (0x00200000 - CONFIG_SPL_MAX_SIZE) #define CONFIG_SYS_NAND_U_BOOT_START 0x00200000 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0 @@ -57,11 +57,11 @@ #ifdef CONFIG_NAND_SECBOOT /* NAND Boot */ #define CONFIG_RAMBOOT_NAND #define CONFIG_SYS_TEXT_BASE 0x11000000 -#define CONFIG_RESET_VECTOR_ADDRESS 0x1107fffc +#define CONFIG_RESET_VECTOR_ADDRESS 0x110bfffc #endif #ifndef CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_TEXT_BASE 0xeff80000 +#define CONFIG_SYS_TEXT_BASE 0xeff40000 #endif #ifndef CONFIG_RESET_VECTOR_ADDRESS @@ -661,18 +661,14 @@ extern unsigned long get_sdram_size(void); #define CONFIG_ENV_SIZE (16 * 1024) #define CONFIG_ENV_RANGE (32 * CONFIG_ENV_SIZE) /* new block size 512K */ #endif -#define CONFIG_ENV_OFFSET ((512 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE) +#define CONFIG_ENV_OFFSET ((768 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE) #elif defined(CONFIG_SYS_RAMBOOT) #define CONFIG_ENV_IS_NOWHERE /* Store ENV in memory only */ #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - 0x1000) #define CONFIG_ENV_SIZE 0x2000 #else #define CONFIG_ENV_IS_IN_FLASH -#if CONFIG_SYS_MONITOR_BASE > 0xfff80000 -#define CONFIG_ENV_ADDR 0xfff80000 -#else #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE) -#endif #define CONFIG_ENV_SIZE 0x2000 #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */ #endif diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index 934a6cb7a6..9c9d72b605 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -32,7 +32,7 @@ #define CONFIG_SPL_TEXT_BASE 0xf8f81000 #define CONFIG_SPL_PAD_TO 0x18000 #define CONFIG_SPL_MAX_SIZE (96 * 1024) -#define CONFIG_SYS_MMC_U_BOOT_SIZE (512 << 10) +#define CONFIG_SYS_MMC_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_MMC_U_BOOT_DST (0x11000000) #define CONFIG_SYS_MMC_U_BOOT_START (0x11000000) #define CONFIG_SYS_MMC_U_BOOT_OFFS (96 << 10) @@ -62,7 +62,7 @@ #define CONFIG_SPL_TEXT_BASE 0xf8f81000 #define CONFIG_SPL_PAD_TO 0x18000 #define CONFIG_SPL_MAX_SIZE (96 * 1024) -#define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (512 << 10) +#define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x11000000) #define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x11000000) #define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (96 << 10) @@ -96,7 +96,7 @@ #define CONFIG_SPL_MAX_SIZE (128 << 10) #define CONFIG_SPL_TEXT_BASE 0xf8f81000 #define CONFIG_SYS_MPC85XX_NO_RESETVEC -#define CONFIG_SYS_NAND_U_BOOT_SIZE (576 << 10) +#define CONFIG_SYS_NAND_U_BOOT_SIZE (832 << 10) #define CONFIG_SYS_NAND_U_BOOT_DST (0x11000000) #define CONFIG_SYS_NAND_U_BOOT_START (0x11000000) #define CONFIG_SYS_NAND_U_BOOT_OFFS ((128 + 128) << 10) @@ -128,7 +128,7 @@ #define CONFIG_MP /* support multiple processors */ #ifndef CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_TEXT_BASE 0xeff80000 +#define CONFIG_SYS_TEXT_BASE 0xeff40000 #endif #ifndef CONFIG_RESET_VECTOR_ADDRESS @@ -653,11 +653,7 @@ #define CONFIG_ENV_SIZE 0x2000 #else #define CONFIG_ENV_IS_IN_FLASH -#if CONFIG_SYS_MONITOR_BASE > 0xfff80000 -#define CONFIG_ENV_ADDR 0xfff80000 -#else #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE) -#endif #define CONFIG_ENV_SIZE 0x2000 #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */ #endif diff --git a/include/configs/P1023RDB.h b/include/configs/P1023RDB.h index 7de6814a03..78a0aa2a7b 100644 --- a/include/configs/P1023RDB.h +++ b/include/configs/P1023RDB.h @@ -11,7 +11,7 @@ #define __CONFIG_H #ifndef CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_TEXT_BASE 0xeff80000 +#define CONFIG_SYS_TEXT_BASE 0xeff40000 #endif #ifndef CONFIG_SYS_MONITOR_BASE @@ -260,11 +260,7 @@ extern unsigned long get_clock_freq(void); #define CONFIG_ENV_OVERWRITE #define CONFIG_ENV_IS_IN_FLASH -#if CONFIG_SYS_MONITOR_BASE > 0xfff80000 -#define CONFIG_ENV_ADDR 0xfff80000 -#else #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE) -#endif #define CONFIG_ENV_SIZE 0x2000 #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */ @@ -365,7 +361,7 @@ extern unsigned long get_clock_freq(void); /* Default address of microcode for the Linux Fman driver */ /* QE microcode/firmware address */ #define CONFIG_SYS_QE_FMAN_FW_IN_NOR -#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xeff40000 +#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xEFF00000 #define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000 #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) diff --git a/include/configs/P1023RDS.h b/include/configs/P1023RDS.h index 11c74ff5f5..d2aaf98113 100644 --- a/include/configs/P1023RDS.h +++ b/include/configs/P1023RDS.h @@ -32,7 +32,7 @@ #endif #ifndef CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_TEXT_BASE 0xeff80000 +#define CONFIG_SYS_TEXT_BASE 0xeff40000 #endif #ifndef CONFIG_SYS_MONITOR_BASE @@ -220,7 +220,7 @@ extern unsigned long get_clock_freq(void); /* NAND boot: 4K NAND loader config */ #define CONFIG_SYS_NAND_SPL_SIZE 0x1000 -#define CONFIG_SYS_NAND_U_BOOT_SIZE ((512 << 10) + CONFIG_SYS_NAND_SPL_SIZE) +#define CONFIG_SYS_NAND_U_BOOT_SIZE ((768 << 10) + CONFIG_SYS_NAND_SPL_SIZE) #define CONFIG_SYS_NAND_U_BOOT_DST (0x11000000 - CONFIG_SYS_NAND_SPL_SIZE) #define CONFIG_SYS_NAND_U_BOOT_START 0x11000000 #define CONFIG_SYS_NAND_U_BOOT_OFFS (0) @@ -386,7 +386,7 @@ extern unsigned long get_clock_freq(void); #if defined(CONFIG_RAMBOOT_NAND) #define CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE -#define CONFIG_ENV_OFFSET ((512 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE) +#define CONFIG_ENV_OFFSET ((768 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE) #else #define CONFIG_ENV_IS_NOWHERE /* Store ENV in memory only */ #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - 0x4000) @@ -394,11 +394,7 @@ extern unsigned long get_clock_freq(void); #endif #else #define CONFIG_ENV_IS_IN_FLASH -#if CONFIG_SYS_MONITOR_BASE > 0xfff80000 -#define CONFIG_ENV_ADDR 0xfff80000 -#else #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE) -#endif #define CONFIG_ENV_SIZE 0x2000 #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */ #endif @@ -506,7 +502,7 @@ extern unsigned long get_clock_freq(void); /* Default address of microcode for the Linux Fman driver */ /* QE microcode/firmware address */ #define CONFIG_SYS_QE_FMAN_FW_IN_NOR -#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xEFF40000 +#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xEFF00000 #else #define CONFIG_SYS_QE_FMAN_FW_IN_NAND #define CONFIG_SYS_QE_FMAN_FW_ADDR 0x1f00000 diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h index 85cb0767ef..726014a563 100644 --- a/include/configs/P1_P2_RDB.h +++ b/include/configs/P1_P2_RDB.h @@ -46,17 +46,17 @@ #ifdef CONFIG_SDCARD #define CONFIG_RAMBOOT_SDCARD 1 #define CONFIG_SYS_TEXT_BASE 0x11000000 -#define CONFIG_RESET_VECTOR_ADDRESS 0x1107fffc +#define CONFIG_RESET_VECTOR_ADDRESS 0x110bfffc #endif #ifdef CONFIG_SPIFLASH #define CONFIG_RAMBOOT_SPIFLASH 1 #define CONFIG_SYS_TEXT_BASE 0x11000000 -#define CONFIG_RESET_VECTOR_ADDRESS 0x1107fffc +#define CONFIG_RESET_VECTOR_ADDRESS 0x110bfffc #endif #ifndef CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_TEXT_BASE 0xeff80000 +#define CONFIG_SYS_TEXT_BASE 0xeff40000 #endif #ifndef CONFIG_RESET_VECTOR_ADDRESS @@ -267,7 +267,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); /* NAND boot: 4K NAND loader config */ #define CONFIG_SYS_NAND_SPL_SIZE 0x1000 -#define CONFIG_SYS_NAND_U_BOOT_SIZE ((512 << 10) - 0x2000) +#define CONFIG_SYS_NAND_U_BOOT_SIZE ((768 << 10) - 0x2000) #define CONFIG_SYS_NAND_U_BOOT_DST (CONFIG_SYS_INIT_L2_ADDR) #define CONFIG_SYS_NAND_U_BOOT_START (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_NAND_SPL_SIZE) #define CONFIG_SYS_NAND_U_BOOT_OFFS (0) @@ -495,7 +495,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #if defined(CONFIG_RAMBOOT_NAND) #define CONFIG_ENV_IS_IN_NAND 1 #define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE - #define CONFIG_ENV_OFFSET ((512 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE) + #define CONFIG_ENV_OFFSET ((768*1024)+CONFIG_SYS_NAND_BLOCK_SIZE) #elif defined(CONFIG_RAMBOOT_SDCARD) #define CONFIG_ENV_IS_IN_MMC #define CONFIG_FSL_FIXED_MMC_LOCATION @@ -513,11 +513,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #endif #else #define CONFIG_ENV_IS_IN_FLASH 1 - #if CONFIG_SYS_MONITOR_BASE > 0xfff80000 - #define CONFIG_ENV_ADDR 0xfff80000 - #else #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE) - #endif #define CONFIG_ENV_SIZE 0x2000 #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */ #endif diff --git a/include/configs/P2020DS.h b/include/configs/P2020DS.h index ada6c7b871..7ef165e152 100644 --- a/include/configs/P2020DS.h +++ b/include/configs/P2020DS.h @@ -20,14 +20,14 @@ #ifdef CONFIG_SDCARD #define CONFIG_SYS_RAMBOOT #define CONFIG_SYS_EXTRA_ENV_RELOC -#define CONFIG_SYS_TEXT_BASE 0xf8f80000 +#define CONFIG_SYS_TEXT_BASE 0xf8f40000 #define CONFIG_RESET_VECTOR_ADDRESS 0xf8fffffc #endif #ifdef CONFIG_SPIFLASH #define CONFIG_SYS_RAMBOOT #define CONFIG_SYS_EXTRA_ENV_RELOC -#define CONFIG_SYS_TEXT_BASE 0xf8f80000 +#define CONFIG_SYS_TEXT_BASE 0xf8f40000 #define CONFIG_RESET_VECTOR_ADDRESS 0xf8fffffc #endif @@ -40,7 +40,7 @@ #define CONFIG_MP 1 /* support multiple processors */ #ifndef CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_TEXT_BASE 0xeff80000 +#define CONFIG_SYS_TEXT_BASE 0xeff40000 #endif #ifndef CONFIG_RESET_VECTOR_ADDRESS @@ -578,11 +578,7 @@ #define CONFIG_ENV_SECT_SIZE 0x10000 #else #define CONFIG_ENV_IS_IN_FLASH 1 -#if CONFIG_SYS_MONITOR_BASE > 0xfff80000 -#define CONFIG_ENV_ADDR 0xfff80000 -#else #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE) -#endif #define CONFIG_ENV_SIZE 0x2000 #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */ #endif diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 2b81cbe111..6934c616bb 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -41,7 +41,7 @@ #define CONFIG_MP /* support multiple processors */ #ifndef CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_TEXT_BASE 0xeff80000 +#define CONFIG_SYS_TEXT_BASE 0xeff40000 #endif #ifndef CONFIG_RESET_VECTOR_ADDRESS @@ -94,12 +94,12 @@ #define CONFIG_FSL_FIXED_MMC_LOCATION #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_ENV_SIZE 0x2000 - #define CONFIG_ENV_OFFSET (512 * 1097) + #define CONFIG_ENV_OFFSET (512 * 1658) #elif defined(CONFIG_NAND) #define CONFIG_SYS_EXTRA_ENV_RELOC #define CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE -#define CONFIG_ENV_OFFSET (5 * CONFIG_SYS_NAND_BLOCK_SIZE) +#define CONFIG_ENV_OFFSET (7 * CONFIG_SYS_NAND_BLOCK_SIZE) #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) #define CONFIG_ENV_IS_IN_REMOTE #define CONFIG_ENV_ADDR 0xffe20000 @@ -512,14 +512,14 @@ unsigned long get_board_sys_clk(unsigned long dummy); #elif defined(CONFIG_SDCARD) /* * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is - * about 545KB (1089 blocks), Env is stored after the image, and the env size is - * 0x2000 (16 blocks), 8 + 1089 + 16 = 1113, enlarge it to 1130. + * about 825KB (1650 blocks), Env is stored after the image, and the env size is + * 0x2000 (16 blocks), 8 + 1650 + 16 = 1674, enlarge it to 1680. */ #define CONFIG_SYS_QE_FMAN_FW_IN_MMC -#define CONFIG_SYS_QE_FMAN_FW_ADDR (512 * 1130) +#define CONFIG_SYS_QE_FMAN_FW_ADDR (512 * 1680) #elif defined(CONFIG_NAND) #define CONFIG_SYS_QE_FMAN_FW_IN_NAND -#define CONFIG_SYS_QE_FMAN_FW_ADDR (6 * CONFIG_SYS_NAND_BLOCK_SIZE) +#define CONFIG_SYS_QE_FMAN_FW_ADDR (8 * CONFIG_SYS_NAND_BLOCK_SIZE) #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) /* * Slave has no ucode locally, it can fetch this from remote. When implementing @@ -532,7 +532,7 @@ unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_QE_FMAN_FW_ADDR 0xFFE00000 #else #define CONFIG_SYS_QE_FMAN_FW_IN_NOR -#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xEFF40000 +#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xEFF00000 #endif #define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000 #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index a639530eeb..91b511bf5e 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -45,7 +45,7 @@ #define CONFIG_MP /* support multiple processors */ #ifndef CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_TEXT_BASE 0xeff80000 +#define CONFIG_SYS_TEXT_BASE 0xeff40000 #endif #ifndef CONFIG_RESET_VECTOR_ADDRESS @@ -93,12 +93,12 @@ #define CONFIG_ENV_IS_IN_MMC #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_ENV_SIZE 0x2000 -#define CONFIG_ENV_OFFSET (512 * 1105) +#define CONFIG_ENV_OFFSET (512 * 1658) #elif defined(CONFIG_NAND) #define CONFIG_SYS_EXTRA_ENV_RELOC #define CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE -#define CONFIG_ENV_OFFSET (5 * CONFIG_SYS_NAND_BLOCK_SIZE) +#define CONFIG_ENV_OFFSET (7 * CONFIG_SYS_NAND_BLOCK_SIZE) #else #define CONFIG_ENV_IS_IN_FLASH #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE) @@ -583,17 +583,17 @@ unsigned long get_board_ddr_clk(void); #elif defined(CONFIG_SDCARD) /* * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is - * about 545KB (1089 blocks), Env is stored after the image, and the env size is - * 0x2000 (16 blocks), 8 + 1089 + 16 = 1113, enlarge it to 1130. + * about 825KB (1650 blocks), Env is stored after the image, and the env size is + * 0x2000 (16 blocks), 8 + 1650 + 16 = 1674, enlarge it to 1680. */ #define CONFIG_SYS_QE_FMAN_FW_IN_MMC -#define CONFIG_SYS_QE_FMAN_FW_ADDR (512 * 1130) +#define CONFIG_SYS_QE_FMAN_FW_ADDR (512 * 1680) #elif defined(CONFIG_NAND) #define CONFIG_SYS_QE_FMAN_FW_IN_NAND -#define CONFIG_SYS_QE_FMAN_FW_ADDR (6 * CONFIG_SYS_NAND_BLOCK_SIZE) +#define CONFIG_SYS_QE_FMAN_FW_ADDR (8 * CONFIG_SYS_NAND_BLOCK_SIZE) #else #define CONFIG_SYS_QE_FMAN_FW_IN_NOR -#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xEFF40000 +#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xEFF00000 #endif #define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000 #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) diff --git a/include/configs/T1040RDB.h b/include/configs/T1040RDB.h index d721139a1f..65b4b26a09 100644 --- a/include/configs/T1040RDB.h +++ b/include/configs/T1040RDB.h @@ -44,7 +44,7 @@ #define CONFIG_MP /* support multiple processors */ #ifndef CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_TEXT_BASE 0xeff80000 +#define CONFIG_SYS_TEXT_BASE 0xeff40000 #endif #ifndef CONFIG_RESET_VECTOR_ADDRESS @@ -92,12 +92,12 @@ #define CONFIG_ENV_IS_IN_MMC #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_ENV_SIZE 0x2000 -#define CONFIG_ENV_OFFSET (512 * 1105) +#define CONFIG_ENV_OFFSET (512 * 1658) #elif defined(CONFIG_NAND) #define CONFIG_SYS_EXTRA_ENV_RELOC #define CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE -#define CONFIG_ENV_OFFSET (5 * CONFIG_SYS_NAND_BLOCK_SIZE) +#define CONFIG_ENV_OFFSET (3 * CONFIG_SYS_NAND_BLOCK_SIZE) #else #define CONFIG_ENV_IS_IN_FLASH #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE) @@ -521,17 +521,17 @@ #elif defined(CONFIG_SDCARD) /* * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is - * about 545KB (1089 blocks), Env is stored after the image, and the env size is - * 0x2000 (16 blocks), 8 + 1089 + 16 = 1113, enlarge it to 1130. + * about 825KB (1650 blocks), Env is stored after the image, and the env size is + * 0x2000 (16 blocks), 8 + 1650 + 16 = 1674, enlarge it to 1680. */ #define CONFIG_SYS_QE_FMAN_FW_IN_MMC -#define CONFIG_SYS_QE_FMAN_FW_ADDR (512 * 1130) +#define CONFIG_SYS_QE_FMAN_FW_ADDR (512 * 1680) #elif defined(CONFIG_NAND) #define CONFIG_SYS_QE_FMAN_FW_IN_NAND -#define CONFIG_SYS_QE_FMAN_FW_ADDR (6 * CONFIG_SYS_NAND_BLOCK_SIZE) +#define CONFIG_SYS_QE_FMAN_FW_ADDR (4 * CONFIG_SYS_NAND_BLOCK_SIZE) #else #define CONFIG_SYS_QE_FMAN_FW_IN_NOR -#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xEFF40000 +#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xEFF00000 #endif #define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000 #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) diff --git a/include/configs/T1042RDB_PI.h b/include/configs/T1042RDB_PI.h index 2c02d9da58..104bb929ef 100644 --- a/include/configs/T1042RDB_PI.h +++ b/include/configs/T1042RDB_PI.h @@ -44,7 +44,7 @@ #define CONFIG_MP /* support multiple processors */ #ifndef CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_TEXT_BASE 0xeff80000 +#define CONFIG_SYS_TEXT_BASE 0xeff40000 #endif #ifndef CONFIG_RESET_VECTOR_ADDRESS @@ -92,12 +92,12 @@ #define CONFIG_ENV_IS_IN_MMC #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_ENV_SIZE 0x2000 -#define CONFIG_ENV_OFFSET (512 * 1105) +#define CONFIG_ENV_OFFSET (512 * 1658) #elif defined(CONFIG_NAND) #define CONFIG_SYS_EXTRA_ENV_RELOC #define CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE -#define CONFIG_ENV_OFFSET (5 * CONFIG_SYS_NAND_BLOCK_SIZE) +#define CONFIG_ENV_OFFSET (3 * CONFIG_SYS_NAND_BLOCK_SIZE) #else #define CONFIG_ENV_IS_IN_FLASH #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE) @@ -529,17 +529,17 @@ #elif defined(CONFIG_SDCARD) /* * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is - * about 545KB (1089 blocks), Env is stored after the image, and the env size is - * 0x2000 (16 blocks), 8 + 1089 + 16 = 1113, enlarge it to 1130. + * about 825KB (1650 blocks), Env is stored after the image, and the env size is + * 0x2000 (16 blocks), 8 + 1650 + 16 = 1674, enlarge it to 1680. */ #define CONFIG_SYS_QE_FMAN_FW_IN_MMC -#define CONFIG_SYS_QE_FMAN_FW_ADDR (512 * 1130) +#define CONFIG_SYS_QE_FMAN_FW_ADDR (512 * 1680) #elif defined(CONFIG_NAND) #define CONFIG_SYS_QE_FMAN_FW_IN_NAND -#define CONFIG_SYS_QE_FMAN_FW_ADDR (6 * CONFIG_SYS_NAND_BLOCK_SIZE) +#define CONFIG_SYS_QE_FMAN_FW_ADDR (4 * CONFIG_SYS_NAND_BLOCK_SIZE) #else #define CONFIG_SYS_QE_FMAN_FW_IN_NOR -#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xEFF40000 +#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xEFF00000 #endif #define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000 #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) diff --git a/include/configs/T2080QDS.h b/include/configs/T2080QDS.h index b35e1073bf..d6d1f93684 100644 --- a/include/configs/T2080QDS.h +++ b/include/configs/T2080QDS.h @@ -60,7 +60,7 @@ #endif #ifndef CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_TEXT_BASE 0xeff80000 +#define CONFIG_SYS_TEXT_BASE 0xeff40000 #endif #ifndef CONFIG_RESET_VECTOR_ADDRESS @@ -103,12 +103,12 @@ #define CONFIG_ENV_IS_IN_MMC #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_ENV_SIZE 0x2000 -#define CONFIG_ENV_OFFSET (512 * 1105) +#define CONFIG_ENV_OFFSET (512 * 1658) #elif defined(CONFIG_NAND) #define CONFIG_SYS_EXTRA_ENV_RELOC #define CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE -#define CONFIG_ENV_OFFSET (5 * CONFIG_SYS_NAND_BLOCK_SIZE) +#define CONFIG_ENV_OFFSET (7 * CONFIG_SYS_NAND_BLOCK_SIZE) #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) #define CONFIG_ENV_IS_IN_REMOTE #define CONFIG_ENV_ADDR 0xffe20000 @@ -544,14 +544,14 @@ unsigned long get_board_ddr_clk(void); #elif defined(CONFIG_SDCARD) /* * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is - * about 545KB (1089 blocks), Env is stored after the image, and the env size is - * 0x2000 (16 blocks), 8 + 1089 + 16 = 1113, enlarge it to 1130. + * about 825KB (1650 blocks), Env is stored after the image, and the env size is + * 0x2000 (16 blocks), 8 + 1650 + 16 = 1674, enlarge it to 1680. */ #define CONFIG_SYS_QE_FMAN_FW_IN_MMC -#define CONFIG_SYS_QE_FMAN_FW_ADDR (512 * 1130) +#define CONFIG_SYS_QE_FMAN_FW_ADDR (512 * 1680) #elif defined(CONFIG_NAND) #define CONFIG_SYS_QE_FMAN_FW_IN_NAND -#define CONFIG_SYS_QE_FMAN_FW_ADDR (6 * CONFIG_SYS_NAND_BLOCK_SIZE) +#define CONFIG_SYS_QE_FMAN_FW_ADDR (8 * CONFIG_SYS_NAND_BLOCK_SIZE) #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) /* * Slave has no ucode locally, it can fetch this from remote. When implementing @@ -564,7 +564,7 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_QE_FMAN_FW_ADDR 0xFFE00000 #else #define CONFIG_SYS_QE_FMAN_FW_IN_NOR -#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xEFF40000 +#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xEFF00000 #endif #define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000 #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) diff --git a/include/configs/T4240EMU.h b/include/configs/T4240EMU.h index 5e228f3556..c81c4577e3 100644 --- a/include/configs/T4240EMU.h +++ b/include/configs/T4240EMU.h @@ -98,7 +98,7 @@ #define CONFIG_SYS_INTERLAKEN #define CONFIG_SYS_QE_FMAN_FW_IN_NOR -#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xEFF40000 +#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xEFF00000 #define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000 #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) @@ -122,7 +122,7 @@ "bank_intlv=auto;" \ "netdev=eth0\0" \ "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ - "ubootaddr=" __stringify(CONFIG_SYS_TEXT_BASE) "\0" \ +"ubootaddr=" __stringify(CONFIG_SYS_TEXT_BASE) "\0" \ "consoledev=ttyS0\0" \ "ramdiskaddr=2000000\0" \ "ramdiskfile=t4240emu/ramdisk.uboot\0" \ diff --git a/include/configs/T4240QDS.h b/include/configs/T4240QDS.h index 1f1177be60..22019dcd2b 100644 --- a/include/configs/T4240QDS.h +++ b/include/configs/T4240QDS.h @@ -64,12 +64,12 @@ #define CONFIG_ENV_IS_IN_MMC #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_ENV_SIZE 0x2000 -#define CONFIG_ENV_OFFSET (512 * 1097) +#define CONFIG_ENV_OFFSET (512 * 1658) #elif defined(CONFIG_NAND) #define CONFIG_SYS_EXTRA_ENV_RELOC #define CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE -#define CONFIG_ENV_OFFSET (5 * CONFIG_SYS_NAND_BLOCK_SIZE) +#define CONFIG_ENV_OFFSET (7 * CONFIG_SYS_NAND_BLOCK_SIZE) #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) #define CONFIG_ENV_IS_IN_REMOTE #define CONFIG_ENV_ADDR 0xffe20000 @@ -376,14 +376,14 @@ unsigned long get_board_ddr_clk(void); #elif defined(CONFIG_SDCARD) /* * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is - * about 545KB (1089 blocks), Env is stored after the image, and the env size is - * 0x2000 (16 blocks), 8 + 1089 + 16 = 1113, enlarge it to 1130. + * about 825KB (1650 blocks), Env is stored after the image, and the env size is + * 0x2000 (16 blocks), 8 + 1650 + 16 = 1674, enlarge it to 1680. */ #define CONFIG_SYS_QE_FMAN_FW_IN_MMC -#define CONFIG_SYS_QE_FMAN_FW_ADDR (512 * 1130) +#define CONFIG_SYS_QE_FMAN_FW_ADDR (512 * 1680) #elif defined(CONFIG_NAND) #define CONFIG_SYS_QE_FMAN_FW_IN_NAND -#define CONFIG_SYS_QE_FMAN_FW_ADDR (6 * CONFIG_SYS_NAND_BLOCK_SIZE) +#define CONFIG_SYS_QE_FMAN_FW_ADDR (8 * CONFIG_SYS_NAND_BLOCK_SIZE) #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) /* * Slave has no ucode locally, it can fetch this from remote. When implementing @@ -396,7 +396,7 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_QE_FMAN_FW_ADDR 0xFFE00000 #else #define CONFIG_SYS_QE_FMAN_FW_IN_NOR -#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xEFF40000 +#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xEFF00000 #endif #define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000 #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 3a1826dddd..fa748f71cb 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -49,7 +49,7 @@ #define CONFIG_MP /* support multiple processors */ #ifndef CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_TEXT_BASE 0xeff80000 +#define CONFIG_SYS_TEXT_BASE 0xeff40000 #endif #ifndef CONFIG_RESET_VECTOR_ADDRESS @@ -95,12 +95,12 @@ #define CONFIG_FSL_FIXED_MMC_LOCATION #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_ENV_SIZE 0x2000 -#define CONFIG_ENV_OFFSET (512 * 1097) +#define CONFIG_ENV_OFFSET (512 * 1658) #elif defined(CONFIG_NAND) #define CONFIG_SYS_EXTRA_ENV_RELOC #define CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE -#define CONFIG_ENV_OFFSET (5 * CONFIG_SYS_NAND_BLOCK_SIZE) +#define CONFIG_ENV_OFFSET (7 * CONFIG_SYS_NAND_BLOCK_SIZE) #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) #define CONFIG_ENV_IS_IN_REMOTE #define CONFIG_ENV_ADDR 0xffe20000 @@ -518,14 +518,14 @@ #elif defined(CONFIG_SDCARD) /* * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is - * about 545KB (1089 blocks), Env is stored after the image, and the env size is - * 0x2000 (16 blocks), 8 + 1089 + 16 = 1113, enlarge it to 1130. + * about 825KB (1650 blocks), Env is stored after the image, and the env size is + * 0x2000 (16 blocks), 8 + 1650 + 16 = 1674, enlarge it to 1680. */ #define CONFIG_SYS_QE_FMAN_FW_IN_MMC -#define CONFIG_SYS_QE_FMAN_FW_ADDR (512 * 1130) +#define CONFIG_SYS_QE_FMAN_FW_ADDR (512 * 1680) #elif defined(CONFIG_NAND) #define CONFIG_SYS_QE_FMAN_FW_IN_NAND -#define CONFIG_SYS_QE_FMAN_FW_ADDR (6 * CONFIG_SYS_NAND_BLOCK_SIZE) +#define CONFIG_SYS_QE_FMAN_FW_ADDR (8 * CONFIG_SYS_NAND_BLOCK_SIZE) #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) /* * Slave has no ucode locally, it can fetch this from remote. When implementing @@ -538,7 +538,7 @@ #define CONFIG_SYS_QE_FMAN_FW_ADDR 0xFFE00000 #else #define CONFIG_SYS_QE_FMAN_FW_IN_NOR -#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xEFF40000 +#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xEFF00000 #endif #define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000 #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index c6df11b8f1..95e23ac585 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -161,7 +161,7 @@ #define CONFIG_SPL_TEXT_BASE 0xf8f81000 #define CONFIG_SPL_PAD_TO 0x18000 #define CONFIG_SPL_MAX_SIZE (96 * 1024) -#define CONFIG_SYS_MMC_U_BOOT_SIZE (512 << 10) +#define CONFIG_SYS_MMC_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_MMC_U_BOOT_DST (0x11000000) #define CONFIG_SYS_MMC_U_BOOT_START (0x11000000) #define CONFIG_SYS_MMC_U_BOOT_OFFS (96 << 10) @@ -191,7 +191,7 @@ #define CONFIG_SPL_TEXT_BASE 0xf8f81000 #define CONFIG_SPL_PAD_TO 0x18000 #define CONFIG_SPL_MAX_SIZE (96 * 1024) -#define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (512 << 10) +#define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x11000000) #define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x11000000) #define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (96 << 10) @@ -221,7 +221,7 @@ #define CONFIG_SPL_MAX_SIZE (128 << 10) #define CONFIG_SPL_TEXT_BASE 0xf8f81000 #define CONFIG_SYS_MPC85XX_NO_RESETVEC -#define CONFIG_SYS_NAND_U_BOOT_SIZE (576 << 10) +#define CONFIG_SYS_NAND_U_BOOT_SIZE (832 << 10) #define CONFIG_SYS_NAND_U_BOOT_DST (0x11000000) #define CONFIG_SYS_NAND_U_BOOT_START (0x11000000) #define CONFIG_SYS_NAND_U_BOOT_OFFS ((128 + 128) << 10) @@ -247,7 +247,7 @@ #endif #ifndef CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_TEXT_BASE 0xeff80000 +#define CONFIG_SYS_TEXT_BASE 0xeff40000 #endif #ifndef CONFIG_RESET_VECTOR_ADDRESS @@ -842,11 +842,7 @@ #define CONFIG_ENV_SIZE 0x2000 #else #define CONFIG_ENV_IS_IN_FLASH -#if CONFIG_SYS_MONITOR_BASE > 0xfff80000 -#define CONFIG_ENV_ADDR 0xfff80000 -#else #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE) -#endif #define CONFIG_ENV_SIZE 0x2000 #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */ #endif diff --git a/include/configs/p1_twr.h b/include/configs/p1_twr.h index 9837100e31..a7fe90ff3b 100644 --- a/include/configs/p1_twr.h +++ b/include/configs/p1_twr.h @@ -24,11 +24,11 @@ #define CONFIG_SYS_RAMBOOT #define CONFIG_SYS_EXTRA_ENV_RELOC #define CONFIG_SYS_TEXT_BASE 0x11000000 -#define CONFIG_RESET_VECTOR_ADDRESS 0x1107fffc +#define CONFIG_RESET_VECTOR_ADDRESS 0x110bfffc #endif #ifndef CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_TEXT_BASE 0xeff80000 +#define CONFIG_SYS_TEXT_BASE 0xeff40000 #endif #ifndef CONFIG_RESET_VECTOR_ADDRESS @@ -407,11 +407,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #endif #else #define CONFIG_ENV_IS_IN_FLASH -#if CONFIG_SYS_MONITOR_BASE > 0xfff80000 -#define CONFIG_ENV_ADDR 0xfff80000 -#else #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE) -#endif #define CONFIG_ENV_SIZE 0x2000 #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */ #endif diff --git a/include/configs/t4qds.h b/include/configs/t4qds.h index 54a5e3e260..74fef67f23 100644 --- a/include/configs/t4qds.h +++ b/include/configs/t4qds.h @@ -21,7 +21,7 @@ #define CONFIG_MP /* support multiple processors */ #ifndef CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_TEXT_BASE 0xeff80000 +#define CONFIG_SYS_TEXT_BASE 0xeff40000 #endif #ifndef CONFIG_RESET_VECTOR_ADDRESS -- cgit v1.2.1 From f7e27cc5ee13aebce4e81fcf908d22d2d55d61e0 Mon Sep 17 00:00:00 2001 From: "Haijun.Zhang" Date: Fri, 10 Jan 2014 13:52:17 +0800 Subject: esdhc: Workaround for card can't be detected on T4240QDS Card detection pin is ineffective on T4240QDS Rev1.0. There are two cards can be connected to board. 1. eMMC card is built-in board, can not be removed. so For eMMC card it is always there. 2. Card detecting pin is functional for SDHC card in Rev2.0. This workaround force sdhc driver scan and initialize the card regardless of whether the card is inserted or not in case Rev1.0. Signed-off-by: Haijun Zhang Acked-by: Pantelis Antoniou Reviewed-by: York Sun --- include/configs/T4240QDS.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'include') diff --git a/include/configs/T4240QDS.h b/include/configs/T4240QDS.h index 22019dcd2b..5b1ed63977 100644 --- a/include/configs/T4240QDS.h +++ b/include/configs/T4240QDS.h @@ -165,6 +165,8 @@ unsigned long get_board_ddr_clk(void); #define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20 #define QIXIS_RCFG_CTL_RECONFIG_START 0x21 #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08 +#define QIXIS_BRDCFG5 0x55 +#define QIXIS_MUX_SDHC 2 #define QIXIS_BASE_PHYS (0xf00000000ull | QIXIS_BASE) #define CONFIG_SYS_CSPR3_EXT (0xf) @@ -466,6 +468,9 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_CMD_FAT #define CONFIG_DOS_PARTITION #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 +#define CONFIG_ESDHC_DETECT_QUIRK \ + (!(readb(QIXIS_BASE + QIXIS_BRDCFG5) & QIXIS_MUX_SDHC) || \ + IS_SVR_REV(get_svr(), 1, 0)) #endif #define CONFIG_BOOTDELAY 10 /* -1 disables auto-boot */ -- cgit v1.2.1 From d47e3d27078dd7419c41e1f8f56dcc221511dd5d Mon Sep 17 00:00:00 2001 From: "Haijun.Zhang" Date: Fri, 10 Jan 2014 13:52:18 +0800 Subject: esdhc: Detecting 8 bit width before mmc initialization The upper 4 data signals of esdhc are shared with spi flash. So detect if the upper 4 pins are assigned to esdhc before enable sdhc 8 bit width. Signed-off-by: Haijun Zhang Acked-by: Pantelis Antoniou Reviewed-by: York Sun --- include/configs/T4240QDS.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/configs/T4240QDS.h b/include/configs/T4240QDS.h index 5b1ed63977..0d43c27916 100644 --- a/include/configs/T4240QDS.h +++ b/include/configs/T4240QDS.h @@ -167,6 +167,7 @@ unsigned long get_board_ddr_clk(void); #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08 #define QIXIS_BRDCFG5 0x55 #define QIXIS_MUX_SDHC 2 +#define QIXIS_MUX_SDHC_WIDTH8 1 #define QIXIS_BASE_PHYS (0xf00000000ull | QIXIS_BASE) #define CONFIG_SYS_CSPR3_EXT (0xf) @@ -471,6 +472,8 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_ESDHC_DETECT_QUIRK \ (!(readb(QIXIS_BASE + QIXIS_BRDCFG5) & QIXIS_MUX_SDHC) || \ IS_SVR_REV(get_svr(), 1, 0)) +#define CONFIG_ESDHC_DETECT_8_BIT_QUIRK \ + (!(readb(QIXIS_BASE + QIXIS_BRDCFG5) & QIXIS_MUX_SDHC_WIDTH8)) #endif #define CONFIG_BOOTDELAY 10 /* -1 disables auto-boot */ -- cgit v1.2.1 From 6c0a032a3280daf96924b689f47e62bd09472260 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Enric=20Balletb=C3=B2=20i=20Serra?= Date: Fri, 6 Dec 2013 21:30:18 +0100 Subject: ARM: OMAP4: Rename to ti_omap4_common.h Follow the pattern ti__common.h used by other TI processors to be coherent. So just rename omap4_common.h to ti_omap4_common.h. Signed-off-by: Enric Balletbo i Serra Reviewed-by: Lokesh Vutla --- include/configs/omap4_common.h | 162 -------------------------------------- include/configs/omap4_panda.h | 4 +- include/configs/omap4_sdp4430.h | 4 +- include/configs/ti_omap4_common.h | 162 ++++++++++++++++++++++++++++++++++++++ 4 files changed, 166 insertions(+), 166 deletions(-) delete mode 100644 include/configs/omap4_common.h create mode 100644 include/configs/ti_omap4_common.h (limited to 'include') diff --git a/include/configs/omap4_common.h b/include/configs/omap4_common.h deleted file mode 100644 index d099bfd48a..0000000000 --- a/include/configs/omap4_common.h +++ /dev/null @@ -1,162 +0,0 @@ -/* - * (C) Copyright 2010 - * Texas Instruments Incorporated. - * Aneesh V - * Steve Sakoman - * - * TI OMAP4 common configuration settings - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __CONFIG_OMAP4_COMMON_H -#define __CONFIG_OMAP4_COMMON_H - -/* - * High Level Configuration Options - */ -#define CONFIG_OMAP44XX 1 /* which is a 44XX */ -#define CONFIG_OMAP4430 1 /* which is in a 4430 */ -#define CONFIG_MISC_INIT_R -#define CONFIG_ARCH_CPU_INIT -#define CONFIG_DISPLAY_CPUINFO 1 -#define CONFIG_DISPLAY_BOARDINFO 1 - -#define CONFIG_SYS_THUMB_BUILD - -#ifndef CONFIG_SYS_L2CACHE_OFF -#define CONFIG_SYS_L2_PL310 1 -#define CONFIG_SYS_PL310_BASE 0x48242000 -#endif -#define CONFIG_SYS_CACHELINE_SIZE 32 - -/* Get CPU defs */ -#include -#include - -/* Use General purpose timer 1 */ -#define CONFIG_SYS_TIMERBASE GPT2_BASE - -/* - * Total Size Environment - 128k - */ -#define CONFIG_ENV_SIZE (128 << 10) - -/* - * For the DDR timing information we can either dynamically determine - * the timings to use or use pre-determined timings (based on using the - * dynamic method. Default to the static timing infomation. - */ -#define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS -#ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS -#define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION -#define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS -#endif - -#include - -/* - * Hardware drivers - */ -#define CONFIG_SYS_NS16550 -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE (-4) -#define CONFIG_SYS_NS16550_CLK 48000000 -#define CONFIG_CONS_INDEX 3 -#define CONFIG_SYS_NS16550_COM3 UART3_BASE - -/* TWL6030 */ -#ifndef CONFIG_SPL_BUILD -#define CONFIG_TWL6030_POWER 1 -#endif - -/* USB */ -#define CONFIG_MUSB_UDC 1 -#define CONFIG_USB_OMAP3 1 - -/* USB device configuration */ -#define CONFIG_USB_DEVICE 1 -#define CONFIG_USB_TTY 1 -#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 - -/* Per-Soc commands */ -#undef CONFIG_CMD_NET -#undef CONFIG_CMD_NFS - -/* - * Environment setup - */ -#define CONFIG_EXTRA_ENV_SETTINGS \ - "loadaddr=0x82000000\0" \ - "console=ttyO2,115200n8\0" \ - "fdt_high=0xffffffff\0" \ - "fdtaddr=0x80f80000\0" \ - "fdtfile=undefined\0" \ - "bootpart=0:2\0" \ - "bootdir=/boot\0" \ - "bootfile=zImage\0" \ - "usbtty=cdc_acm\0" \ - "vram=16M\0" \ - "mmcdev=0\0" \ - "mmcroot=/dev/mmcblk0p2 rw\0" \ - "mmcrootfstype=ext3 rootwait\0" \ - "mmcargs=setenv bootargs console=${console} " \ - "vram=${vram} " \ - "root=${mmcroot} " \ - "rootfstype=${mmcrootfstype}\0" \ - "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ - "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \ - "source ${loadaddr}\0" \ - "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \ - "importbootenv=echo Importing environment from mmc${mmcdev} ...; " \ - "env import -t ${loadaddr} ${filesize}\0" \ - "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \ - "mmcboot=echo Booting from mmc${mmcdev} ...; " \ - "run mmcargs; " \ - "bootz ${loadaddr} - ${fdtaddr}\0" \ - "findfdt="\ - "if test $board_name = sdp4430; then " \ - "setenv fdtfile omap4-sdp.dtb; fi; " \ - "if test $board_name = panda; then " \ - "setenv fdtfile omap4-panda.dtb; fi;" \ - "if test $board_name = panda-a4; then " \ - "setenv fdtfile omap4-panda-a4.dtb; fi;" \ - "if test $board_name = panda-es; then " \ - "setenv fdtfile omap4-panda-es.dtb; fi;" \ - "if test $fdtfile = undefined; then " \ - "echo WARNING: Could not determine device tree to use; fi; \0" \ - "loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \ - -#define CONFIG_BOOTCOMMAND \ - "run findfdt; " \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "echo SD/MMC found on device ${mmcdev};" \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loadbootenv; then " \ - "run importbootenv; " \ - "fi;" \ - "if test -n ${uenvcmd}; then " \ - "echo Running uenvcmd ...;" \ - "run uenvcmd;" \ - "fi;" \ - "fi;" \ - "if run loadimage; then " \ - "run loadfdt;" \ - "run mmcboot; " \ - "fi; " \ - "fi" - -/* - * Defines for SPL - * It is known that this will break HS devices. Since the current size of - * SPL is overlapped with public stack and breaking non HS devices to boot. - * So moving TEXT_BASE down to non-HS limit. - */ -#define CONFIG_SPL_TEXT_BASE 0x40300000 -#define CONFIG_SPL_MAX_SIZE (0x4030C000 - CONFIG_SPL_TEXT_BASE) -#define CONFIG_SPL_DISPLAY_PRINT -#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" - -#endif /* __CONFIG_OMAP4_COMMON_H */ diff --git a/include/configs/omap4_panda.h b/include/configs/omap4_panda.h index 73dc088595..7378acdb21 100644 --- a/include/configs/omap4_panda.h +++ b/include/configs/omap4_panda.h @@ -4,7 +4,7 @@ * Steve Sakoman * * Configuration settings for the TI OMAP4 Panda board. - * See omap4_common.h for OMAP4 common part + * See ti_omap4_common.h for OMAP4 common part * * SPDX-License-Identifier: GPL-2.0+ */ @@ -36,7 +36,7 @@ #define CONFIG_CMD_PING #define CONFIG_CMD_DHCP -#include +#include #define CONFIG_CMD_NET /* GPIO */ diff --git a/include/configs/omap4_sdp4430.h b/include/configs/omap4_sdp4430.h index b35251120d..a83797454c 100644 --- a/include/configs/omap4_sdp4430.h +++ b/include/configs/omap4_sdp4430.h @@ -5,7 +5,7 @@ * Steve Sakoman * * Configuration settings for the TI SDP4430 board. - * See omap4_common.h for OMAP4 common part + * See ti_omap4_common.h for OMAP4 common part * * SPDX-License-Identifier: GPL-2.0+ */ @@ -19,7 +19,7 @@ #define CONFIG_4430SDP 1 /* working with SDP */ #define CONFIG_MACH_TYPE MACH_TYPE_OMAP_4430SDP -#include +#include /* Battery Charger */ #ifndef CONFIG_SPL_BUILD diff --git a/include/configs/ti_omap4_common.h b/include/configs/ti_omap4_common.h new file mode 100644 index 0000000000..b625c491eb --- /dev/null +++ b/include/configs/ti_omap4_common.h @@ -0,0 +1,162 @@ +/* + * (C) Copyright 2010 + * Texas Instruments Incorporated. + * Aneesh V + * Steve Sakoman + * + * TI OMAP4 common configuration settings + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_TI_OMAP4_COMMON_H +#define __CONFIG_TI_OMAP4_COMMON_H + +/* + * High Level Configuration Options + */ +#define CONFIG_OMAP44XX 1 /* which is a 44XX */ +#define CONFIG_OMAP4430 1 /* which is in a 4430 */ +#define CONFIG_MISC_INIT_R +#define CONFIG_ARCH_CPU_INIT +#define CONFIG_DISPLAY_CPUINFO 1 +#define CONFIG_DISPLAY_BOARDINFO 1 + +#define CONFIG_SYS_THUMB_BUILD + +#ifndef CONFIG_SYS_L2CACHE_OFF +#define CONFIG_SYS_L2_PL310 1 +#define CONFIG_SYS_PL310_BASE 0x48242000 +#endif +#define CONFIG_SYS_CACHELINE_SIZE 32 + +/* Get CPU defs */ +#include +#include + +/* Use General purpose timer 1 */ +#define CONFIG_SYS_TIMERBASE GPT2_BASE + +/* + * Total Size Environment - 128k + */ +#define CONFIG_ENV_SIZE (128 << 10) + +/* + * For the DDR timing information we can either dynamically determine + * the timings to use or use pre-determined timings (based on using the + * dynamic method. Default to the static timing infomation. + */ +#define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS +#ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS +#define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION +#define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS +#endif + +#include + +/* + * Hardware drivers + */ +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE (-4) +#define CONFIG_SYS_NS16550_CLK 48000000 +#define CONFIG_CONS_INDEX 3 +#define CONFIG_SYS_NS16550_COM3 UART3_BASE + +/* TWL6030 */ +#ifndef CONFIG_SPL_BUILD +#define CONFIG_TWL6030_POWER 1 +#endif + +/* USB */ +#define CONFIG_MUSB_UDC 1 +#define CONFIG_USB_OMAP3 1 + +/* USB device configuration */ +#define CONFIG_USB_DEVICE 1 +#define CONFIG_USB_TTY 1 +#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 + +/* Per-Soc commands */ +#undef CONFIG_CMD_NET +#undef CONFIG_CMD_NFS + +/* + * Environment setup + */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "loadaddr=0x82000000\0" \ + "console=ttyO2,115200n8\0" \ + "fdt_high=0xffffffff\0" \ + "fdtaddr=0x80f80000\0" \ + "fdtfile=undefined\0" \ + "bootpart=0:2\0" \ + "bootdir=/boot\0" \ + "bootfile=zImage\0" \ + "usbtty=cdc_acm\0" \ + "vram=16M\0" \ + "mmcdev=0\0" \ + "mmcroot=/dev/mmcblk0p2 rw\0" \ + "mmcrootfstype=ext3 rootwait\0" \ + "mmcargs=setenv bootargs console=${console} " \ + "vram=${vram} " \ + "root=${mmcroot} " \ + "rootfstype=${mmcrootfstype}\0" \ + "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ + "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \ + "source ${loadaddr}\0" \ + "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \ + "importbootenv=echo Importing environment from mmc${mmcdev} ...; " \ + "env import -t ${loadaddr} ${filesize}\0" \ + "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \ + "mmcboot=echo Booting from mmc${mmcdev} ...; " \ + "run mmcargs; " \ + "bootz ${loadaddr} - ${fdtaddr}\0" \ + "findfdt="\ + "if test $board_name = sdp4430; then " \ + "setenv fdtfile omap4-sdp.dtb; fi; " \ + "if test $board_name = panda; then " \ + "setenv fdtfile omap4-panda.dtb; fi;" \ + "if test $board_name = panda-a4; then " \ + "setenv fdtfile omap4-panda-a4.dtb; fi;" \ + "if test $board_name = panda-es; then " \ + "setenv fdtfile omap4-panda-es.dtb; fi;" \ + "if test $fdtfile = undefined; then " \ + "echo WARNING: Could not determine device tree to use; fi; \0" \ + "loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \ + +#define CONFIG_BOOTCOMMAND \ + "run findfdt; " \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ + "echo SD/MMC found on device ${mmcdev};" \ + "if run loadbootscript; then " \ + "run bootscript; " \ + "else " \ + "if run loadbootenv; then " \ + "run importbootenv; " \ + "fi;" \ + "if test -n ${uenvcmd}; then " \ + "echo Running uenvcmd ...;" \ + "run uenvcmd;" \ + "fi;" \ + "fi;" \ + "if run loadimage; then " \ + "run loadfdt;" \ + "run mmcboot; " \ + "fi; " \ + "fi" + +/* + * Defines for SPL + * It is known that this will break HS devices. Since the current size of + * SPL is overlapped with public stack and breaking non HS devices to boot. + * So moving TEXT_BASE down to non-HS limit. + */ +#define CONFIG_SPL_TEXT_BASE 0x40300000 +#define CONFIG_SPL_MAX_SIZE (0x4030C000 - CONFIG_SPL_TEXT_BASE) +#define CONFIG_SPL_DISPLAY_PRINT +#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" + +#endif /* __CONFIG_TI_OMAP4_COMMON_H */ -- cgit v1.2.1 From 3d657a05a9cba0415fa028ac3d5acc5ec883bf00 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Enric=20Balletb=C3=B2=20i=20Serra?= Date: Fri, 6 Dec 2013 21:30:19 +0100 Subject: ARM: OMAP5: Rename to ti_omap5_common.h Follow the pattern ti__common.h used by other TI processors to be coherent. So just rename omap5_common.h to ti_omap5_common.h. Signed-off-by: Enric Balletbo i Serra Reviewed-by: Lokesh Vutla --- include/configs/dra7xx_evm.h | 4 +- include/configs/omap5_common.h | 149 -------------------------------------- include/configs/omap5_uevm.h | 4 +- include/configs/ti_omap5_common.h | 149 ++++++++++++++++++++++++++++++++++++++ 4 files changed, 153 insertions(+), 153 deletions(-) delete mode 100644 include/configs/omap5_common.h create mode 100644 include/configs/ti_omap5_common.h (limited to 'include') diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index f210ed8b92..04ae3ca41d 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -4,7 +4,7 @@ * Lokesh Vutla * * Configuration settings for the TI DRA7XX board. - * See omap5_common.h for omap5 common settings. + * See ti_omap5_common.h for omap5 common settings. * * SPDX-License-Identifier: GPL-2.0+ */ @@ -34,7 +34,7 @@ #define CONFIG_SYS_OMAP_ABE_SYSCK -#include +#include /* CPSW Ethernet */ #define CONFIG_CMD_NET /* 'bootp' and 'tftp' */ diff --git a/include/configs/omap5_common.h b/include/configs/omap5_common.h deleted file mode 100644 index c7fa37e823..0000000000 --- a/include/configs/omap5_common.h +++ /dev/null @@ -1,149 +0,0 @@ -/* - * (C) Copyright 2013 - * Texas Instruments Incorporated. - * Sricharan R - * - * Derived from OMAP4 done by: - * Aneesh V - * - * TI OMAP5 AND DRA7XX common configuration settings - * - * SPDX-License-Identifier: GPL-2.0+ - * - * For more details, please see the technical documents listed at - * http://www.ti.com/product/omap5432 - */ - -#ifndef __CONFIG_OMAP5_COMMON_H -#define __CONFIG_OMAP5_COMMON_H - -#define CONFIG_OMAP54XX -#define CONFIG_DISPLAY_CPUINFO -#define CONFIG_DISPLAY_BOARDINFO -#define CONFIG_MISC_INIT_R -#define CONFIG_ARCH_CPU_INIT - -#define CONFIG_SYS_CACHELINE_SIZE 64 - -/* Use General purpose timer 1 */ -#define CONFIG_SYS_TIMERBASE GPT2_BASE - -/* - * For the DDR timing information we can either dynamically determine - * the timings to use or use pre-determined timings (based on using the - * dynamic method. Default to the static timing infomation. - */ -#define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS -#ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS -#define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION -#define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS -#endif - -#ifndef CONFIG_SPL_BUILD -#define CONFIG_PALMAS_POWER -#endif - -#include -#include - -#define CONFIG_ENV_SIZE (128 << 10) - -#include - -/* - * Hardware drivers - */ -#define CONFIG_SYS_NS16550 -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE (-4) -#define CONFIG_SYS_NS16550_CLK 48000000 - -/* Per-SoC commands */ -#undef CONFIG_CMD_NET -#undef CONFIG_CMD_NFS - -/* - * Environment setup - */ -#ifndef PARTS_DEFAULT -#define PARTS_DEFAULT -#endif - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "loadaddr=0x80200000\0" \ - "fdtaddr=0x80F80000\0" \ - "fdt_high=0xffffffff\0" \ - "rdaddr=0x81000000\0" \ - "console=" CONSOLEDEV ",115200n8\0" \ - "fdtfile=undefined\0" \ - "bootpart=0:2\0" \ - "bootdir=/boot\0" \ - "bootfile=zImage\0" \ - "usbtty=cdc_acm\0" \ - "vram=16M\0" \ - "partitions=" PARTS_DEFAULT "\0" \ - "optargs=\0" \ - "mmcdev=0\0" \ - "mmcroot=/dev/mmcblk1p2 rw\0" \ - "mmcrootfstype=ext4 rootwait\0" \ - "mmcargs=setenv bootargs console=${console} " \ - "${optargs} " \ - "vram=${vram} " \ - "root=${mmcroot} " \ - "rootfstype=${mmcrootfstype}\0" \ - "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ - "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \ - "source ${loadaddr}\0" \ - "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \ - "importbootenv=echo Importing environment from mmc${mmcdev} ...; " \ - "env import -t ${loadaddr} ${filesize}\0" \ - "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \ - "mmcboot=mmc dev ${mmcdev}; " \ - "if mmc rescan; then " \ - "echo SD/MMC found on device ${mmcdev};" \ - "if run loadbootenv; then " \ - "echo Loaded environment from ${bootenv};" \ - "run importbootenv;" \ - "fi;" \ - "if test -n $uenvcmd; then " \ - "echo Running uenvcmd ...;" \ - "run uenvcmd;" \ - "fi;" \ - "if run loadimage; then " \ - "run loadfdt; " \ - "echo Booting from mmc${mmcdev} ...; " \ - "run mmcargs; " \ - "bootz ${loadaddr} - ${fdtaddr}; " \ - "fi;" \ - "fi;\0" \ - "findfdt="\ - "if test $board_name = omap5_uevm; then " \ - "setenv fdtfile omap5-uevm.dtb; fi; " \ - "if test $board_name = dra7xx; then " \ - "setenv fdtfile dra7-evm.dtb; fi;" \ - "if test $fdtfile = undefined; then " \ - "echo WARNING: Could not determine device tree to use; fi; \0" \ - "loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile};\0" \ - -#define CONFIG_BOOTCOMMAND \ - "run findfdt; " \ - "run mmcboot;" \ - "setenv mmcdev 1; " \ - "setenv bootpart 1:2; " \ - "setenv mmcroot /dev/mmcblk0p2 rw; " \ - "run mmcboot;" \ - - -/* - * SPL related defines. The Public RAM memory map the ROM defines the - * area between 0x40300000 and 0x4031E000 as a download area for OMAP5 - * (dra7xx is larger, but we do not need to be larger at this time). We - * set CONFIG_SPL_DISPLAY_PRINT to have omap_rev_string() called and - * print some information. - */ -#define CONFIG_SPL_TEXT_BASE 0x40300000 -#define CONFIG_SPL_MAX_SIZE (0x4031E000 - CONFIG_SPL_TEXT_BASE) -#define CONFIG_SPL_DISPLAY_PRINT -#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" - -#endif /* __CONFIG_OMAP5_COMMON_H */ diff --git a/include/configs/omap5_uevm.h b/include/configs/omap5_uevm.h index 76c5106b45..51dff23623 100644 --- a/include/configs/omap5_uevm.h +++ b/include/configs/omap5_uevm.h @@ -4,7 +4,7 @@ * Sricharan R * * Configuration settings for the TI EVM5430 board. - * See omap5_common.h for omap5 common settings. + * See ti_omap5_common.h for omap5 common settings. * * SPDX-License-Identifier: GPL-2.0+ */ @@ -17,7 +17,7 @@ "uuid_disk=${uuid_gpt_disk};" \ "name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}" -#include +#include #define CONFIG_CONS_INDEX 3 #define CONFIG_SYS_NS16550_COM3 UART3_BASE diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h new file mode 100644 index 0000000000..4f34dcf0f2 --- /dev/null +++ b/include/configs/ti_omap5_common.h @@ -0,0 +1,149 @@ +/* + * (C) Copyright 2013 + * Texas Instruments Incorporated. + * Sricharan R + * + * Derived from OMAP4 done by: + * Aneesh V + * + * TI OMAP5 AND DRA7XX common configuration settings + * + * SPDX-License-Identifier: GPL-2.0+ + * + * For more details, please see the technical documents listed at + * http://www.ti.com/product/omap5432 + */ + +#ifndef __CONFIG_TI_OMAP5_COMMON_H +#define __CONFIG_TI_OMAP5_COMMON_H + +#define CONFIG_OMAP54XX +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO +#define CONFIG_MISC_INIT_R +#define CONFIG_ARCH_CPU_INIT + +#define CONFIG_SYS_CACHELINE_SIZE 64 + +/* Use General purpose timer 1 */ +#define CONFIG_SYS_TIMERBASE GPT2_BASE + +/* + * For the DDR timing information we can either dynamically determine + * the timings to use or use pre-determined timings (based on using the + * dynamic method. Default to the static timing infomation. + */ +#define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS +#ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS +#define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION +#define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS +#endif + +#ifndef CONFIG_SPL_BUILD +#define CONFIG_PALMAS_POWER +#endif + +#include +#include + +#define CONFIG_ENV_SIZE (128 << 10) + +#include + +/* + * Hardware drivers + */ +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE (-4) +#define CONFIG_SYS_NS16550_CLK 48000000 + +/* Per-SoC commands */ +#undef CONFIG_CMD_NET +#undef CONFIG_CMD_NFS + +/* + * Environment setup + */ +#ifndef PARTS_DEFAULT +#define PARTS_DEFAULT +#endif + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "loadaddr=0x80200000\0" \ + "fdtaddr=0x80F80000\0" \ + "fdt_high=0xffffffff\0" \ + "rdaddr=0x81000000\0" \ + "console=" CONSOLEDEV ",115200n8\0" \ + "fdtfile=undefined\0" \ + "bootpart=0:2\0" \ + "bootdir=/boot\0" \ + "bootfile=zImage\0" \ + "usbtty=cdc_acm\0" \ + "vram=16M\0" \ + "partitions=" PARTS_DEFAULT "\0" \ + "optargs=\0" \ + "mmcdev=0\0" \ + "mmcroot=/dev/mmcblk1p2 rw\0" \ + "mmcrootfstype=ext4 rootwait\0" \ + "mmcargs=setenv bootargs console=${console} " \ + "${optargs} " \ + "vram=${vram} " \ + "root=${mmcroot} " \ + "rootfstype=${mmcrootfstype}\0" \ + "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ + "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \ + "source ${loadaddr}\0" \ + "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \ + "importbootenv=echo Importing environment from mmc${mmcdev} ...; " \ + "env import -t ${loadaddr} ${filesize}\0" \ + "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \ + "mmcboot=mmc dev ${mmcdev}; " \ + "if mmc rescan; then " \ + "echo SD/MMC found on device ${mmcdev};" \ + "if run loadbootenv; then " \ + "echo Loaded environment from ${bootenv};" \ + "run importbootenv;" \ + "fi;" \ + "if test -n $uenvcmd; then " \ + "echo Running uenvcmd ...;" \ + "run uenvcmd;" \ + "fi;" \ + "if run loadimage; then " \ + "run loadfdt; " \ + "echo Booting from mmc${mmcdev} ...; " \ + "run mmcargs; " \ + "bootz ${loadaddr} - ${fdtaddr}; " \ + "fi;" \ + "fi;\0" \ + "findfdt="\ + "if test $board_name = omap5_uevm; then " \ + "setenv fdtfile omap5-uevm.dtb; fi; " \ + "if test $board_name = dra7xx; then " \ + "setenv fdtfile dra7-evm.dtb; fi;" \ + "if test $fdtfile = undefined; then " \ + "echo WARNING: Could not determine device tree to use; fi; \0" \ + "loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile};\0" \ + +#define CONFIG_BOOTCOMMAND \ + "run findfdt; " \ + "run mmcboot;" \ + "setenv mmcdev 1; " \ + "setenv bootpart 1:2; " \ + "setenv mmcroot /dev/mmcblk0p2 rw; " \ + "run mmcboot;" \ + + +/* + * SPL related defines. The Public RAM memory map the ROM defines the + * area between 0x40300000 and 0x4031E000 as a download area for OMAP5 + * (dra7xx is larger, but we do not need to be larger at this time). We + * set CONFIG_SPL_DISPLAY_PRINT to have omap_rev_string() called and + * print some information. + */ +#define CONFIG_SPL_TEXT_BASE 0x40300000 +#define CONFIG_SPL_MAX_SIZE (0x4031E000 - CONFIG_SPL_TEXT_BASE) +#define CONFIG_SPL_DISPLAY_PRINT +#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" + +#endif /* __CONFIG_TI_OMAP5_COMMON_H */ -- cgit v1.2.1 From 70e71b61bca9c44708a449461f0dc5a51d7cf622 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Enric=20Balletb=C3=B2=20i=20Serra?= Date: Fri, 6 Dec 2013 21:30:20 +0100 Subject: TI: armv7: Move ELM support to SoC configuration file. The ELM hardware engine wihich is used for ECC error detections is not present on OMAP3 SoC, so move the CONFIG_SPL_NAND_AM33XX_BCH from ti_armv7_common.h to SoC configuration file. Signed-off-by: Enric Balletbo i Serra Reviewed-by: Lokesh Vutla --- include/configs/ti_am335x_common.h | 4 ++++ include/configs/ti_armv7_common.h | 1 - include/configs/ti_omap4_common.h | 4 ++++ include/configs/ti_omap5_common.h | 4 ++++ 4 files changed, 12 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/ti_am335x_common.h b/include/configs/ti_am335x_common.h index 4364eef7ba..91f97dd061 100644 --- a/include/configs/ti_am335x_common.h +++ b/include/configs/ti_am335x_common.h @@ -73,6 +73,10 @@ #define CONFIG_SKIP_LOWLEVEL_INIT #endif +#ifdef CONFIG_NAND +#define CONFIG_SPL_NAND_AM33XX_BCH /* ELM support */ +#endif + /* Now bring in the rest of the common code. */ #include diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h index 99b60fcf61..f4e42eff13 100644 --- a/include/configs/ti_armv7_common.h +++ b/include/configs/ti_armv7_common.h @@ -237,7 +237,6 @@ #define CONFIG_SPL_BOARD_INIT #ifdef CONFIG_NAND -#define CONFIG_SPL_NAND_AM33XX_BCH /* OMAP4 and later ELM support */ #define CONFIG_SPL_NAND_SUPPORT #define CONFIG_SPL_NAND_BASE #define CONFIG_SPL_NAND_DRIVERS diff --git a/include/configs/ti_omap4_common.h b/include/configs/ti_omap4_common.h index b625c491eb..2f0e4c0f67 100644 --- a/include/configs/ti_omap4_common.h +++ b/include/configs/ti_omap4_common.h @@ -159,4 +159,8 @@ #define CONFIG_SPL_DISPLAY_PRINT #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" +#ifdef CONFIG_NAND +#define CONFIG_SPL_NAND_AM33XX_BCH /* ELM support */ +#endif + #endif /* __CONFIG_TI_OMAP4_COMMON_H */ diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h index 4f34dcf0f2..7b10fbd28a 100644 --- a/include/configs/ti_omap5_common.h +++ b/include/configs/ti_omap5_common.h @@ -146,4 +146,8 @@ #define CONFIG_SPL_DISPLAY_PRINT #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" +#ifdef CONFIG_NAND +#define CONFIG_SPL_NAND_AM33XX_BCH /* ELM support */ +#endif + #endif /* __CONFIG_TI_OMAP5_COMMON_H */ -- cgit v1.2.1 From c6a7fce1138596b9e91727c32da2c2faa3bb481f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Enric=20Balletb=C3=B2=20i=20Serra?= Date: Fri, 6 Dec 2013 21:30:21 +0100 Subject: TI: armv7: Do not define the number DRAM banks if is already defined. If CONFIG_NR_DRAM_BANKS is not defined, we say (for simplicity) that we have 1 bank, but for some boards should be interesting that we can define CONFIG_NR_DRAM_BANKS. To handle this possibility just define the number of DRAM banks if is not already defined. This is useful for some OMAP3 boards where the DRAM initialitzation is only at u-boot level. Signed-off-by: Enric Balletbo i Serra --- include/configs/ti_armv7_common.h | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h index f4e42eff13..69d69a5421 100644 --- a/include/configs/ti_armv7_common.h +++ b/include/configs/ti_armv7_common.h @@ -45,11 +45,15 @@ #define CONFIG_BOOTDELAY 1 /* - * DDR information. We say (for simplicity) that we have 1 bank, - * always, even when we have more. We always start at 0x80000000, - * and we place the initial stack pointer in our SRAM. + * DDR information. If the CONFIG_NR_DRAM_BANKS is not defined, + * we say (for simplicity) that we have 1 bank, always, even when + * we have more. We always start at 0x80000000, and we place the + * initial stack pointer in our SRAM. Otherwise, we can define + * CONFIG_NR_DRAM_BANKS before including this file. */ +#ifndef CONFIG_NR_DRAM_BANKS #define CONFIG_NR_DRAM_BANKS 1 +#endif #define CONFIG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \ GENERATED_GBL_DATA_SIZE) -- cgit v1.2.1 From c7964f86c28da4e4cf5a7cc4430461ea17218d80 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Enric=20Balletb=C3=B2=20i=20Serra?= Date: Fri, 6 Dec 2013 21:30:23 +0100 Subject: TI: OMAP3: Create common config files for TI OMAP3 platforms. Create a new file, include/configs/ti_omap3_common.h, for everything common to the OMAP3 SoC leaving just the board specific part to board configuration file. Signed-off-by: Enric Balletbo i Serra --- include/configs/ti_omap3_common.h | 73 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 73 insertions(+) create mode 100644 include/configs/ti_omap3_common.h (limited to 'include') diff --git a/include/configs/ti_omap3_common.h b/include/configs/ti_omap3_common.h new file mode 100644 index 0000000000..854cb78882 --- /dev/null +++ b/include/configs/ti_omap3_common.h @@ -0,0 +1,73 @@ +/* + * ti_omap3_common.h + * + * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ + * + * SPDX-License-Identifier: GPL-2.0+ + * + * For more details, please see the technical documents listed at + * http://www.ti.com/product/omap3530 + * http://www.ti.com/product/omap3630 + * http://www.ti.com/product/dm3730 + */ + +#ifndef __CONFIG_TI_OMAP3_COMMON_H__ +#define __CONFIG_TI_OMAP3_COMMON_H__ + +#define CONFIG_OMAP34XX + +#include +#include + +/* The chip has SDRC controller */ +#define CONFIG_SDRC + +/* Clock Defines */ +#define V_OSCK 26000000 /* Clock output from T2 */ +#define V_SCLK (V_OSCK >> 1) + +/* NS16550 Configuration */ +#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE (-4) +#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK +#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \ + 115200} + +/* Select serial console configuration */ +#define CONFIG_CONS_INDEX 3 +#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 +#define CONFIG_SERIAL3 3 + +/* Physical Memory Map */ +#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 +#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 + +/* + * OMAP3 has 12 GP timers, they can be driven by the system clock + * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). + * This rate is divided by a local divisor. + */ +#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) + +#define CONFIG_SYS_MONITOR_LEN (256 << 10) + +/* TWL4030 */ +#define CONFIG_TWL4030_POWER 1 + +/* SPL */ +#define CONFIG_SPL_TEXT_BASE 0x40200800 +#define CONFIG_SPL_MAX_SIZE (54 * 1024) +#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" +#define CONFIG_SPL_POWER_SUPPORT + +#ifdef CONFIG_NAND +#define CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SPL_NAND_SIMPLE +#endif + +/* Now bring in the rest of the common code. */ +#include + +#endif /* __CONFIG_TI_OMAP3_COMMON_H__ */ -- cgit v1.2.1 From e37e954eba3edb5015a0a02880d57517f57425d8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Enric=20Balletb=C3=B2=20i=20Serra?= Date: Fri, 6 Dec 2013 21:30:24 +0100 Subject: OMAP3: igep00x0: Convert to ti_omap3_common.h. To reduce code duplication update omap3_igep00x0.h to use ti_omap3_common.h. Signed-off-by: Enric Balletbo i Serra --- include/configs/omap3_igep00x0.h | 189 ++------------------------------------- 1 file changed, 9 insertions(+), 180 deletions(-) (limited to 'include') diff --git a/include/configs/omap3_igep00x0.h b/include/configs/omap3_igep00x0.h index 71062a601f..20fbbecdfb 100644 --- a/include/configs/omap3_igep00x0.h +++ b/include/configs/omap3_igep00x0.h @@ -10,20 +10,13 @@ #ifndef __IGEP00X0_H #define __IGEP00X0_H -#include - -/* - * High Level Configuration Options - */ -#define CONFIG_OMAP 1 /* in a TI OMAP core */ -#define CONFIG_OMAP34XX 1 /* which is a 34XX */ -#define CONFIG_OMAP_GPIO -#define CONFIG_OMAP_COMMON +#ifdef CONFIG_BOOT_NAND +#define CONFIG_NAND +#endif -#define CONFIG_SDRC /* The chip has SDRC controller */ +#define CONFIG_NR_DRAM_BANKS 2 -#include -#include +#include #include /* @@ -32,47 +25,12 @@ #define CONFIG_DISPLAY_CPUINFO 1 #define CONFIG_DISPLAY_BOARDINFO 1 -/* Clock Defines */ -#define V_OSCK 26000000 /* Clock output from T2 */ -#define V_SCLK (V_OSCK >> 1) - #define CONFIG_MISC_INIT_R -#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ -#define CONFIG_SETUP_MEMORY_TAGS 1 -#define CONFIG_INITRD_TAG 1 #define CONFIG_REVISION_TAG 1 -#define CONFIG_OF_LIBFDT -#define CONFIG_CMD_BOOTZ #define CONFIG_SUPPORT_RAW_INITRD -/* - * NS16550 Configuration - */ - -#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ - -#define CONFIG_SYS_NS16550 -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE (-4) -#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK - -/* select serial console configuration */ -#define CONFIG_CONS_INDEX 3 -#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 -#define CONFIG_SERIAL3 3 - -/* allow to overwrite serial and ethaddr */ -#define CONFIG_ENV_OVERWRITE -#define CONFIG_BAUDRATE 115200 -#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \ - 115200} -#define CONFIG_GENERIC_MMC 1 -#define CONFIG_MMC 1 -#define CONFIG_OMAP_HSMMC 1 -#define CONFIG_DOS_PARTITION 1 - /* define to enable boot progress via leds */ #if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020) || \ (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0030) @@ -95,21 +53,10 @@ #define CONFIG_USBD_MANUFACTURER "Texas Instruments" #define CONFIG_USBD_PRODUCT_NAME "IGEP" -/* commands to include */ -#include - #define CONFIG_CMD_CACHE -#define CONFIG_CMD_EXT4 -#define CONFIG_CMD_FAT /* FAT support */ -#define CONFIG_CMD_FS_GENERIC -#define CONFIG_CMD_I2C /* I2C serial bus support */ -#define CONFIG_CMD_MMC /* MMC support */ #ifdef CONFIG_BOOT_ONENAND #define CONFIG_CMD_ONENAND /* ONENAND support */ #endif -#ifdef CONFIG_BOOT_NAND -#define CONFIG_CMD_NAND -#endif #if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020) || \ (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0032) #define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ @@ -117,24 +64,8 @@ #define CONFIG_CMD_DHCP #define CONFIG_CMD_PING #define CONFIG_CMD_NFS /* NFS support */ -#define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */ -#define CONFIG_MTD_DEVICE - -#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ -#undef CONFIG_CMD_IMLS /* List all found images */ -#define CONFIG_SYS_NO_FLASH -#define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_OMAP34XX -#define CONFIG_SYS_OMAP24_I2C_SPEED 100000 -#define CONFIG_SYS_OMAP24_I2C_SLAVE 1 - -/* - * TWL4030 - */ -#define CONFIG_TWL4030_POWER 1 - -#define CONFIG_BOOTDELAY 3 +/*#undef CONFIG_ENV_IS_NOWHERE*/ #define CONFIG_EXTRA_ENV_SETTINGS \ "usbtty=cdc_acm\0" \ @@ -205,48 +136,6 @@ "fi;" \ "run nandboot;" \ -#define CONFIG_AUTO_COMPLETE 1 - -/* - * Miscellaneous configurable options - */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ -#define CONFIG_SYS_PROMPT "U-Boot # " -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -/* Print Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -/* Boot Argument Buffer Size */ -#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) - -#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) /* memtest */ - /* works on */ -#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ - 0x01F00000) /* 31MB */ - -#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */ - /* load address */ - -#define CONFIG_SYS_MONITOR_LEN (256 << 10) - -/* - * OMAP3 has 12 GP timers, they can be driven by the system clock - * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). - * This rate is divided by a local divisor. - */ -#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) -#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ - -/* - * Physical Memory Map - * - */ -#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ -#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 -#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 - /* * FLASH and environment organization */ @@ -263,23 +152,15 @@ #define CONFIG_ENV_ADDR ONENAND_ENV_OFFSET #endif -#ifdef CONFIG_BOOT_NAND +#ifdef CONFIG_NAND #define PISMO1_NAND_SIZE GPMC_SIZE_128M /* Configure the PISMO */ -#define CONFIG_NAND_OMAP_GPMC -#define CONFIG_SYS_NAND_BASE NAND_BASE #define GPMC_NAND_ECC_LP_x16_LAYOUT 1 #define CONFIG_ENV_OFFSET 0x260000 /* environment starts here */ #define CONFIG_ENV_IS_IN_NAND 1 #define CONFIG_ENV_SIZE (512 << 10) /* Total Size Environment */ #define CONFIG_ENV_ADDR NAND_ENV_OFFSET -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #endif -/* - * Size of malloc() pool - */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) - /* * SMSC911x Ethernet */ @@ -289,54 +170,9 @@ #define CONFIG_SMC911X_BASE 0x2C000000 #endif /* (CONFIG_CMD_NET) */ -/* - * Leave it at 0x80008000 to allow booting new u-boot.bin with X-loader - * and older u-boot.bin with the new U-Boot SPL. - */ -#define CONFIG_SYS_TEXT_BASE 0x80008000 -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 -#define CONFIG_SYS_INIT_RAM_SIZE 0x800 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) - -/* SPL */ -#define CONFIG_SPL -#define CONFIG_SPL_FRAMEWORK -#define CONFIG_SPL_NAND_SIMPLE -#define CONFIG_SPL_TEXT_BASE 0x40200800 -#define CONFIG_SPL_MAX_SIZE (54 * 1024) -#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK - -/* move malloc and bss high to prevent clashing with the main image */ -#define CONFIG_SYS_SPL_MALLOC_START 0x87000000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 -#define CONFIG_SPL_BSS_START_ADDR 0x87080000 /* end of minimum RAM */ -#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ - -/* MMC boot config */ -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ -#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ -#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 -#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" - -#define CONFIG_SPL_BOARD_INIT -#define CONFIG_SPL_LIBCOMMON_SUPPORT -#define CONFIG_SPL_LIBDISK_SUPPORT -#define CONFIG_SPL_I2C_SUPPORT -#define CONFIG_SPL_LIBGENERIC_SUPPORT -#define CONFIG_SPL_MMC_SUPPORT -#define CONFIG_SPL_FAT_SUPPORT -#define CONFIG_SPL_SERIAL_SUPPORT - -#define CONFIG_SPL_POWER_SUPPORT -#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" - +/* OneNAND boot config */ #ifdef CONFIG_BOOT_ONENAND #define CONFIG_SPL_ONENAND_SUPPORT - -/* OneNAND boot config */ #define CONFIG_SYS_ONENAND_U_BOOT_OFFS 0x80000 #define CONFIG_SYS_ONENAND_PAGE_SIZE 2048 #define CONFIG_SPL_ONENAND_LOAD_ADDR 0x80000 @@ -345,13 +181,8 @@ #endif -#ifdef CONFIG_BOOT_NAND -#define CONFIG_SPL_NAND_SUPPORT -#define CONFIG_SPL_NAND_BASE -#define CONFIG_SPL_NAND_DRIVERS -#define CONFIG_SPL_NAND_ECC - /* NAND boot config */ +#ifdef CONFIG_NAND #define CONFIG_SYS_NAND_5_ADDR_CYCLE #define CONFIG_SYS_NAND_PAGE_COUNT 64 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 @@ -363,8 +194,6 @@ #define CONFIG_SYS_NAND_ECCSIZE 512 #define CONFIG_SYS_NAND_ECCBYTES 3 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW -#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 #endif #endif /* __IGEP00X0_H */ -- cgit v1.2.1 From b1cde7e21f950e05d18c102976c3b7d232b65e13 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 20 Jan 2014 08:40:07 -0500 Subject: am43xx_evm.h: Correct SPL max size Upon further inspection of relevant parts of the architecture, the maximum SPL binary size is 220KiB. Cc: Lokesh Vutla Signed-off-by: Tom Rini --- include/configs/am43xx_evm.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h index 4de495a15a..83431a41a7 100644 --- a/include/configs/am43xx_evm.h +++ b/include/configs/am43xx_evm.h @@ -34,7 +34,7 @@ /* SPL defines. */ #define CONFIG_SPL_TEXT_BASE 0x40300350 -#define CONFIG_SPL_MAX_SIZE (0x40337C00 - CONFIG_SPL_TEXT_BASE) +#define CONFIG_SPL_MAX_SIZE (220 << 10) /* 220KB */ #define CONFIG_SPL_YMODEM_SUPPORT /* Enabling L2 Cache */ -- cgit v1.2.1 From d937326ffcd6da4c6ba1297a8786cfeaec1812e7 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Mon, 6 Jan 2014 15:39:48 +0900 Subject: Remove obsolete _LINUX_CONFIG_H macro Commit 643aae1406c93ddc64fcf8c136b47cdffd9c8ccd deleted include/linux/config.h but missed to delete _LINUX_CONFIG_H macro. It is no longer used at all. Signed-off-by: Masahiro Yamada --- include/common.h | 3 --- 1 file changed, 3 deletions(-) (limited to 'include') diff --git a/include/common.h b/include/common.h index d49c51464d..d5ebb25390 100644 --- a/include/common.h +++ b/include/common.h @@ -8,9 +8,6 @@ #ifndef __COMMON_H_ #define __COMMON_H_ 1 -#undef _LINUX_CONFIG_H -#define _LINUX_CONFIG_H 1 /* avoid reading Linux autoconf.h file */ - #ifndef __ASSEMBLY__ /* put C only stuff in this section */ typedef unsigned char uchar; -- cgit v1.2.1 From 5378d5eabe8943bcff0d93ba43df3a5b246d4138 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Mon, 6 Jan 2014 15:45:09 +0900 Subject: avr32: move CONFIG_AVR32 definition to arch/avr32/config.mk MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Like other architectures, CONFIG_AVR32 can be defined in arch/avr32/config.mk rather than board header files. Signed-off-by: Masahiro Yamada Cc: Andreas Bießmann Acked-by: Andreas Bießmann --- include/configs/atngw100.h | 1 - include/configs/atngw100mkii.h | 1 - include/configs/atstk1002.h | 1 - include/configs/atstk1003.h | 1 - include/configs/atstk1004.h | 1 - include/configs/atstk1006.h | 1 - include/configs/favr-32-ezkit.h | 1 - include/configs/grasshopper.h | 1 - include/configs/hammerhead.h | 1 - include/configs/mimc200.h | 1 - 10 files changed, 10 deletions(-) (limited to 'include') diff --git a/include/configs/atngw100.h b/include/configs/atngw100.h index 597bede85e..9c81e3199f 100644 --- a/include/configs/atngw100.h +++ b/include/configs/atngw100.h @@ -10,7 +10,6 @@ #include -#define CONFIG_AVR32 #define CONFIG_AT32AP #define CONFIG_AT32AP7000 #define CONFIG_ATNGW100 diff --git a/include/configs/atngw100mkii.h b/include/configs/atngw100mkii.h index bd4dca5217..066d09ab0a 100644 --- a/include/configs/atngw100mkii.h +++ b/include/configs/atngw100mkii.h @@ -12,7 +12,6 @@ #include -#define CONFIG_AVR32 #define CONFIG_AT32AP #define CONFIG_AT32AP7000 #define CONFIG_ATNGW100MKII diff --git a/include/configs/atstk1002.h b/include/configs/atstk1002.h index fd76572a47..8f3fd0bb00 100644 --- a/include/configs/atstk1002.h +++ b/include/configs/atstk1002.h @@ -10,7 +10,6 @@ #include -#define CONFIG_AVR32 #define CONFIG_AT32AP #define CONFIG_AT32AP7000 #define CONFIG_ATSTK1002 diff --git a/include/configs/atstk1003.h b/include/configs/atstk1003.h index 2562460b98..63704b1987 100644 --- a/include/configs/atstk1003.h +++ b/include/configs/atstk1003.h @@ -10,7 +10,6 @@ #include -#define CONFIG_AVR32 #define CONFIG_AT32AP #define CONFIG_AT32AP7001 #define CONFIG_ATSTK1003 diff --git a/include/configs/atstk1004.h b/include/configs/atstk1004.h index 8e32a10b19..331a60d76a 100644 --- a/include/configs/atstk1004.h +++ b/include/configs/atstk1004.h @@ -10,7 +10,6 @@ #include -#define CONFIG_AVR32 #define CONFIG_AT32AP #define CONFIG_AT32AP7002 #define CONFIG_ATSTK1004 diff --git a/include/configs/atstk1006.h b/include/configs/atstk1006.h index 9ce22649e7..bbe0aea861 100644 --- a/include/configs/atstk1006.h +++ b/include/configs/atstk1006.h @@ -10,7 +10,6 @@ #include -#define CONFIG_AVR32 #define CONFIG_AT32AP #define CONFIG_AT32AP7000 #define CONFIG_ATSTK1006 diff --git a/include/configs/favr-32-ezkit.h b/include/configs/favr-32-ezkit.h index fc015e6939..338d3dc782 100644 --- a/include/configs/favr-32-ezkit.h +++ b/include/configs/favr-32-ezkit.h @@ -10,7 +10,6 @@ #include -#define CONFIG_AVR32 #define CONFIG_AT32AP #define CONFIG_AT32AP7000 #define CONFIG_FAVR32_EZKIT diff --git a/include/configs/grasshopper.h b/include/configs/grasshopper.h index 938ee86281..73534addfc 100644 --- a/include/configs/grasshopper.h +++ b/include/configs/grasshopper.h @@ -11,7 +11,6 @@ #include -#define CONFIG_AVR32 #define CONFIG_AT32AP #define CONFIG_AT32AP7000 diff --git a/include/configs/hammerhead.h b/include/configs/hammerhead.h index 3f2fadbb58..4f0603abc1 100644 --- a/include/configs/hammerhead.h +++ b/include/configs/hammerhead.h @@ -8,7 +8,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_AVR32 #define CONFIG_AT32AP #define CONFIG_AT32AP7000 #define CONFIG_HAMMERHEAD diff --git a/include/configs/mimc200.h b/include/configs/mimc200.h index 3d792398c5..fc7ecfaee4 100644 --- a/include/configs/mimc200.h +++ b/include/configs/mimc200.h @@ -10,7 +10,6 @@ #include -#define CONFIG_AVR32 #define CONFIG_AT32AP #define CONFIG_AT32AP7000 #define CONFIG_MIMC200 -- cgit v1.2.1 From 3b98b57fa796d0c8d4cbdf6b2b6faa08197a9858 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Wed, 8 Jan 2014 20:11:27 +0900 Subject: include: delete unused header files Signed-off-by: Masahiro Yamada --- include/amba_clcd.h | 77 ------- include/asm-generic/global_data_flags.h | 28 --- include/at45.h | 68 ------ include/at91rm9200_i2c.h | 114 ---------- include/at91rm9200_net.h | 50 ----- include/bcm5221.h | 88 -------- include/configs/AdderUSB.h | 35 --- include/configs/EXBITGEN.h | 190 ---------------- include/configs/MVS1.h | 384 -------------------------------- include/configs/ORSG.h | 282 ----------------------- include/configs/mpq101.h | 359 ----------------------------- include/configs/tb0229.h | 175 --------------- include/cramfs/cramfs_fs_sb.h | 19 -- include/da9030.h | 102 --------- include/dm9161.h | 127 ----------- include/faraday/ftsdc021.h | 13 -- include/ks8721.h | 75 ------- include/linux/mtd/inftl-user.h | 89 -------- include/linux/mtd/jffs2-user.h | 35 --- include/smiLynxEM.h | 163 -------------- 20 files changed, 2473 deletions(-) delete mode 100644 include/amba_clcd.h delete mode 100644 include/asm-generic/global_data_flags.h delete mode 100644 include/at45.h delete mode 100644 include/at91rm9200_i2c.h delete mode 100644 include/at91rm9200_net.h delete mode 100644 include/bcm5221.h delete mode 100644 include/configs/AdderUSB.h delete mode 100644 include/configs/EXBITGEN.h delete mode 100644 include/configs/MVS1.h delete mode 100644 include/configs/ORSG.h delete mode 100644 include/configs/mpq101.h delete mode 100644 include/configs/tb0229.h delete mode 100644 include/cramfs/cramfs_fs_sb.h delete mode 100644 include/da9030.h delete mode 100644 include/dm9161.h delete mode 100644 include/faraday/ftsdc021.h delete mode 100644 include/ks8721.h delete mode 100644 include/linux/mtd/inftl-user.h delete mode 100644 include/linux/mtd/jffs2-user.h delete mode 100644 include/smiLynxEM.h (limited to 'include') diff --git a/include/amba_clcd.h b/include/amba_clcd.h deleted file mode 100644 index db80517e53..0000000000 --- a/include/amba_clcd.h +++ /dev/null @@ -1,77 +0,0 @@ -/* - * Register definitions for the AMBA CLCD logic cell. - * - * derived from David A Rusling, although rearranged as a C structure - * linux/include/asm-arm/hardware/amba_clcd.h -- Integrator LCD panel. - * - * Copyright (C) 2001 ARM Limited - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file COPYING in the main directory of this archive - * for more details. - */ - -/* - * CLCD Controller Internal Register addresses - */ -struct clcd_registers { - u32 tim0; /* 0x00 */ - u32 tim1; - u32 tim2; - u32 tim3; - u32 ubas; /* 0x10 */ - u32 lbas; -#if !defined(CONFIG_ARCH_VERSATILE) && !defined(CONFIG_ARCH_REALVIEW) - u32 ienb; - u32 cntl; -#else /* Someone rearranged these two registers on the Versatile */ - u32 cntl; - u32 ienb; -#endif - u32 stat; /* 0x20 */ - u32 intr; - u32 ucur; - u32 lcur; - u32 unused[0x74]; /* 0x030..0x1ff */ - u32 palette[0x80]; /* 0x200..0x3ff */ -}; - -/* Bit definition for TIM2 */ -#define TIM2_CLKSEL (1 << 5) -#define TIM2_IVS (1 << 11) -#define TIM2_IHS (1 << 12) -#define TIM2_IPC (1 << 13) -#define TIM2_IOE (1 << 14) -#define TIM2_BCD (1 << 26) - -/* Bit definitions for control register */ -#define CNTL_LCDEN (1 << 0) -#define CNTL_LCDBPP1 (0 << 1) -#define CNTL_LCDBPP2 (1 << 1) -#define CNTL_LCDBPP4 (2 << 1) -#define CNTL_LCDBPP8 (3 << 1) -#define CNTL_LCDBPP16 (4 << 1) -#define CNTL_LCDBPP16_565 (6 << 1) -#define CNTL_LCDBPP24 (5 << 1) -#define CNTL_LCDBW (1 << 4) -#define CNTL_LCDTFT (1 << 5) -#define CNTL_LCDMONO8 (1 << 6) -#define CNTL_LCDDUAL (1 << 7) -#define CNTL_BGR (1 << 8) -#define CNTL_BEBO (1 << 9) -#define CNTL_BEPO (1 << 10) -#define CNTL_LCDPWR (1 << 11) -#define CNTL_LCDVCOMP(x) ((x) << 12) -#define CNTL_LDMAFIFOTIME (1 << 15) -#define CNTL_WATERMARK (1 << 16) - -/* u-boot specific: information passed by the board file */ -struct clcd_config { - struct clcd_registers *address; - u32 tim0; - u32 tim1; - u32 tim2; - u32 tim3; - u32 cntl; - unsigned long pixclock; -}; diff --git a/include/asm-generic/global_data_flags.h b/include/asm-generic/global_data_flags.h deleted file mode 100644 index bb57fb6c4a..0000000000 --- a/include/asm-generic/global_data_flags.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * transitional header until we merge global_data.h - * - * (C) Copyright 2000-2010 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * Licensed under the GPL-2 or later. - */ - -#ifndef __ASM_GENERIC_GLOBAL_DATA_FLAGS_H -#define __ASM_GENERIC_GLOBAL_DATA_FLAGS_H - -/* - * Global Data Flags - * - * Note: The low 16 bits are expected for common code. If your arch - * really needs to add your own, use the high 16bits. - */ -#define GD_FLG_RELOC 0x0001 /* Code was relocated to RAM */ -#define GD_FLG_DEVINIT 0x0002 /* Devices have been initialized */ -#define GD_FLG_SILENT 0x0004 /* Silent mode */ -#define GD_FLG_POSTFAIL 0x0008 /* Critical POST test failed */ -#define GD_FLG_POSTSTOP 0x0010 /* POST seqeunce aborted */ -#define GD_FLG_LOGINIT 0x0020 /* Log Buffer has been initialized */ -#define GD_FLG_DISABLE_CONSOLE 0x0040 /* Disable console (in & out) */ -#define GD_FLG_ENV_READY 0x0080 /* Environment imported into hash table */ - -#endif diff --git a/include/at45.h b/include/at45.h deleted file mode 100644 index df649ba971..0000000000 --- a/include/at45.h +++ /dev/null @@ -1,68 +0,0 @@ -#ifndef _AT45_H_ -#define _AT45_H_ -#ifdef CONFIG_DATAFLASH_MMC_SELECT -extern void AT91F_SelectMMC(void); -extern void AT91F_SelectSPI(void); -extern int AT91F_GetMuxStatus(void); -#endif -extern void AT91F_SpiInit(void); -extern void AT91F_SpiEnable(int cs); -extern unsigned int AT91F_SpiWrite ( AT91PS_DataflashDesc pDesc ); -extern AT91S_DataFlashStatus AT91F_DataFlashSendCommand( - AT91PS_DataFlash pDataFlash, - unsigned char OpCode, - unsigned int CmdSize, - unsigned int DataflashAddress); -extern AT91S_DataFlashStatus AT91F_DataFlashGetStatus ( - AT91PS_DataflashDesc pDesc); -extern AT91S_DataFlashStatus AT91F_DataFlashWaitReady ( - AT91PS_DataflashDesc pDataFlashDesc, - unsigned int timeout); -extern AT91S_DataFlashStatus AT91F_DataFlashContinuousRead ( - AT91PS_DataFlash pDataFlash, - int src, - unsigned char *dataBuffer, - int sizeToRead ); -extern AT91S_DataFlashStatus AT91F_DataFlashPagePgmBuf( - AT91PS_DataFlash pDataFlash, - unsigned char *src, - unsigned int dest, - unsigned int SizeToWrite); -extern AT91S_DataFlashStatus AT91F_MainMemoryToBufferTransfert( - AT91PS_DataFlash pDataFlash, - unsigned char BufferCommand, - unsigned int page); -extern AT91S_DataFlashStatus AT91F_DataFlashWriteBuffer ( - AT91PS_DataFlash pDataFlash, - unsigned char BufferCommand, - unsigned char *dataBuffer, - unsigned int bufferAddress, - int SizeToWrite ); -extern AT91S_DataFlashStatus AT91F_PageErase( - AT91PS_DataFlash pDataFlash, - unsigned int page); -extern AT91S_DataFlashStatus AT91F_BlockErase( - AT91PS_DataFlash pDataFlash, - unsigned int block); -extern AT91S_DataFlashStatus AT91F_WriteBufferToMain ( - AT91PS_DataFlash pDataFlash, - unsigned char BufferCommand, - unsigned int dest ); -extern AT91S_DataFlashStatus AT91F_PartialPageWrite ( - AT91PS_DataFlash pDataFlash, - unsigned char *src, - unsigned int dest, - unsigned int size); -extern AT91S_DataFlashStatus AT91F_DataFlashWrite( - AT91PS_DataFlash pDataFlash, - unsigned char *src, - int dest, - int size ); -extern int AT91F_DataFlashRead( - AT91PS_DataFlash pDataFlash, - unsigned long addr, - unsigned long size, - char *buffer); -extern int AT91F_DataflashProbe(int cs, AT91PS_DataflashDesc pDesc); - -#endif diff --git a/include/at91rm9200_i2c.h b/include/at91rm9200_i2c.h deleted file mode 100644 index 486660638c..0000000000 --- a/include/at91rm9200_i2c.h +++ /dev/null @@ -1,114 +0,0 @@ -/* ---------------------------------------------------------------------------- */ -/* ATMEL Microcontroller Software Support - ROUSSET - */ -/* ---------------------------------------------------------------------------- */ -/* The software is delivered "AS IS" without warranty or condition of any */ -/* kind, either express, implied or statutory. This includes without */ -/* limitation any warranty or condition with respect to merchantability or */ -/* fitness for any particular purpose, or against the infringements of */ -/* intellectual property rights of others. */ -/* ---------------------------------------------------------------------------- */ -/* File Name : at91rm9200_i2c.h */ -/* Object : AT91RM9200 / TWI definitions */ -/* Generated : AT91 SW Application Group 12/03/2002 (10:48:02) */ -/* */ -/* ---------------------------------------------------------------------------- */ - -#ifndef AT91RM9200_TWI_H -#define AT91RM9200_TWI_H - -/* ******************************************************************************/ -/* SOFTWARE API DEFINITION FOR Two-wire Interface */ -/* ******************************************************************************/ -#ifndef __ASSEMBLY__ - -typedef struct _AT91S_TWI { - AT91_REG TWI_CR; /* Control Register */ - AT91_REG TWI_MMR; /* Master Mode Register */ - AT91_REG TWI_SMR; /* Slave Mode Register */ - AT91_REG TWI_IADR; /* Internal Address Register */ - AT91_REG TWI_CWGR; /* Clock Waveform Generator Register */ - AT91_REG Reserved0[3]; - AT91_REG TWI_SR; /* Status Register */ - AT91_REG TWI_IER; /* Interrupt Enable Register */ - AT91_REG TWI_IDR; /* Interrupt Disable Register */ - AT91_REG TWI_IMR; /* Interrupt Mask Register */ - AT91_REG TWI_RHR; /* Receive Holding Register */ - AT91_REG TWI_THR; /* Transmit Holding Register */ - AT91_REG Reserved1[50]; - AT91_REG TWI_RPR; /* Receive Pointer Register */ - AT91_REG TWI_RCR; /* Receive Counter Register */ - AT91_REG TWI_TPR; /* Transmit Pointer Register */ - AT91_REG TWI_TCR; /* Transmit Counter Register */ - AT91_REG TWI_RNPR; /* Receive Next Pointer Register */ - AT91_REG TWI_RNCR; /* Receive Next Counter Register */ - AT91_REG TWI_TNPR; /* Transmit Next Pointer Register */ - AT91_REG TWI_TNCR; /* Transmit Next Counter Register */ - AT91_REG TWI_PTCR; /* PDC Transfer Control Register */ - AT91_REG TWI_PTSR; /* PDC Transfer Status Register */ -} AT91S_TWI, *AT91PS_TWI; - -#endif - -/* -------- TWI_CR : (TWI Offset: 0x0) TWI Control Register -------- */ -#define AT91C_TWI_START (0x1 << 0) /* (TWI) Send a START Condition */ -#define AT91C_TWI_STOP (0x1 << 1) /* (TWI) Send a STOP Condition */ -#define AT91C_TWI_MSEN (0x1 << 2) /* (TWI) TWI Master Transfer Enabled */ -#define AT91C_TWI_MSDIS (0x1 << 3) /* (TWI) TWI Master Transfer Disabled */ -#define AT91C_TWI_SVEN (0x1 << 4) /* (TWI) TWI Slave Transfer Enabled */ -#define AT91C_TWI_SVDIS (0x1 << 5) /* (TWI) TWI Slave Transfer Disabled */ -#define AT91C_TWI_SWRST (0x1 << 7) /* (TWI) Software Reset */ -/* -------- TWI_MMR : (TWI Offset: 0x4) TWI Master Mode Register -------- */ -#define AT91C_TWI_IADRSZ (0x3 << 8) /* (TWI) Internal Device Address Size */ -#define AT91C_TWI_IADRSZ_NO (0x0 << 8) /* (TWI) No internal device address */ -#define AT91C_TWI_IADRSZ_1_BYTE (0x1 << 8) /* (TWI) One-byte internal device address */ -#define AT91C_TWI_IADRSZ_2_BYTE (0x2 << 8) /* (TWI) Two-byte internal device address */ -#define AT91C_TWI_IADRSZ_3_BYTE (0x3 << 8) /* (TWI) Three-byte internal device address */ -#define AT91C_TWI_MREAD (0x1 << 12) /* (TWI) Master Read Direction */ -#define AT91C_TWI_DADR (0x7F << 6) /* (TWI) Device Address */ -/* -------- TWI_SMR : (TWI Offset: 0x8) TWI Slave Mode Register -------- */ -#define AT91C_TWI_SADR (0x7F << 16) /* (TWI) Slave Device Address */ -/* -------- TWI_CWGR : (TWI Offset: 0x10) TWI Clock Waveform Generator Register -------- */ -#define AT91C_TWI_CLDIV (0xFF << 0) /* (TWI) Clock Low Divider */ -#define AT91C_TWI_CHDIV (0xFF << 8) /* (TWI) Clock High Divider */ -#define AT91C_TWI_CKDIV (0x7 << 16) /* (TWI) Clock Divider */ -/* -------- TWI_SR : (TWI Offset: 0x20) TWI Status Register -------- */ -#define AT91C_TWI_TXCOMP (0x1 << 0) /* (TWI) Transmission Completed */ -#define AT91C_TWI_RXRDY (0x1 << 1) /* (TWI) Receive holding register ReaDY */ -#define AT91C_TWI_TXRDY (0x1 << 2) /* (TWI) Transmit holding register ReaDY*/ -#define AT91C_TWI_SVREAD (0x1 << 3) /* (TWI) Slave Read */ -#define AT91C_TWI_SVACC (0x1 << 4) /* (TWI) Slave Access */ -#define AT91C_TWI_GCACC (0x1 << 5) /* (TWI) General Call Access */ -#define AT91C_TWI_OVRE (0x1 << 6) /* (TWI) Overrun Error */ -#define AT91C_TWI_UNRE (0x1 << 7) /* (TWI) Underrun Error */ -#define AT91C_TWI_NACK (0x1 << 8) /* (TWI) Not Acknowledged */ -#define AT91C_TWI_ARBLST (0x1 << 9) /* (TWI) Arbitration Lost */ -/* -------- TWI_IER : (TWI Offset: 0x24) TWI Interrupt Enable Register -------- */ -/* -------- TWI_IDR : (TWI Offset: 0x28) TWI Interrupt Disable Register ------- */ -/* -------- TWI_IMR : (TWI Offset: 0x2c) TWI Interrupt Mask Register -------- */ - -/* - i2c Support for Atmel's AT91RM9200 Two-Wire Interface - - (c) Rick Bronson - - * SPDX-License-Identifier: GPL-2.0+ -*/ - -#ifndef AT91_I2C_H -#define AT91_I2C_H - -#define AT91C_TWI_CLOCK 100000 -#define AT91C_TWI_SCLOCK (10 * AT91C_MASTER_CLOCK / AT91C_TWI_CLOCK) -#define AT91C_TWI_CKDIV1 (2 << 16) /* TWI clock divider. NOTE: see Errata #22 */ - -#if (AT91C_TWI_SCLOCK % 10) >= 5 -#define AT91C_TWI_CLDIV2 ((AT91C_TWI_SCLOCK / 10) - 5) -#else -#define AT91C_TWI_CLDIV2 ((AT91C_TWI_SCLOCK / 10) - 6) -#endif -#define AT91C_TWI_CLDIV3 ((AT91C_TWI_CLDIV2 + (4 - AT91C_TWI_CLDIV2 % 4)) >> 2) - -#define AT91C_EEPROM_I2C_ADDRESS (0x50 << 16) - -#endif /* __ASSEMBLY__ */ -#endif /* AT91RM9200_TWI_H */ diff --git a/include/at91rm9200_net.h b/include/at91rm9200_net.h deleted file mode 100644 index 831cb1e260..0000000000 --- a/include/at91rm9200_net.h +++ /dev/null @@ -1,50 +0,0 @@ -/* - * Ethernet: An implementation of the Ethernet Device Driver suite for the - * uClinux 2.0.38 operating system. This Driver has been developed - * for AT75C220 board. - * - * NOTE: The driver is implemented for one MAC - * - * Version: @(#)at91rm9200_net.h 1.0.0 01/10/2001 - * - * Authors: Lineo Inc - * - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef AT91RM9200_ETHERNET -#define AT91RM9200_ETHERNET - -#include -#include -#include - -#define ETHERNET_ADDRESS_SIZE 6 - -typedef unsigned char UCHAR; - -/* Interface to drive the physical layer */ -typedef struct _AT91S_PhyOps -{ - unsigned char (*Init)(AT91S_EMAC *pmac); - unsigned int (*IsPhyConnected)(AT91S_EMAC *pmac); - unsigned char (*GetLinkSpeed)(AT91S_EMAC *pmac); - unsigned char (*AutoNegotiate)(AT91S_EMAC *pmac, int *); - -} AT91S_PhyOps,*AT91PS_PhyOps; - - -#define EMAC_DESC_DONE 0x00000001 /* ownership bit */ -#define EMAC_DESC_WRAP 0x00000002 /* bit for wrap */ - -/****************** function prototypes **********************/ - -/* MII functions */ -void at91rm9200_EmacEnableMDIO(AT91PS_EMAC p_mac); -void at91rm9200_EmacDisableMDIO(AT91PS_EMAC p_mac); -UCHAR at91rm9200_EmacReadPhy(AT91PS_EMAC p_mac, unsigned char RegisterAddress, unsigned short *pInput); -UCHAR at91rm9200_EmacWritePhy(AT91PS_EMAC p_mac, unsigned char RegisterAddress, unsigned short *pOutput); -void at91rm9200_GetPhyInterface(AT91PS_PhyOps p_phyops); - -#endif /* AT91RM9200_ETHERNET */ diff --git a/include/bcm5221.h b/include/bcm5221.h deleted file mode 100644 index 4719389cfd..0000000000 --- a/include/bcm5221.h +++ /dev/null @@ -1,88 +0,0 @@ -/* - * Broadcom BCM5221 Ethernet PHY - * - * (C) Copyright 2005 REA Elektronik GmbH - * Anders Larsen - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#define BCM5221_BMCR 0 /* Basic Mode Control Register */ -#define BCM5221_BMSR 1 /* Basic Mode Status Register */ -#define BCM5221_PHYID1 2 /* PHY Identifier Register 1 */ -#define BCM5221_PHYID2 3 /* PHY Identifier Register 2 */ -#define BCM5221_ANAR 4 /* Auto-negotiation Advertisement Register */ -#define BCM5221_ANLPAR 5 /* Auto-negotiation Link Partner Ability Register */ -#define BCM5221_ANER 6 /* Auto-negotiation Expansion Register */ -#define BCM5221_ACSR 24 /* Auxiliary Control/Status Register */ -#define BCM5221_INTR 26 /* Interrupt Register */ - -/* --Bit definitions: BCM5221_BMCR */ -#define BCM5221_RESET (1 << 15) /* 1= Software Reset; 0=Normal Operation */ -#define BCM5221_LOOPBACK (1 << 14) /* 1=loopback Enabled; 0=Normal Operation */ -#define BCM5221_SPEED_SELECT (1 << 13) /* 1=100Mbps; 0=10Mbps */ -#define BCM5221_AUTONEG (1 << 12) -#define BCM5221_POWER_DOWN (1 << 11) -#define BCM5221_ISOLATE (1 << 10) -#define BCM5221_RESTART_AUTONEG (1 << 9) -#define BCM5221_DUPLEX_MODE (1 << 8) -#define BCM5221_COLLISION_TEST (1 << 7) - -/*--Bit definitions: BCM5221_BMSR */ -#define BCM5221_100BASE_T4 (1 << 15) -#define BCM5221_100BASE_TX_FD (1 << 14) -#define BCM5221_100BASE_TX_HD (1 << 13) -#define BCM5221_10BASE_T_FD (1 << 12) -#define BCM5221_10BASE_T_HD (1 << 11) -#define BCM5221_MF_PREAMB_SUPPR (1 << 6) -#define BCM5221_AUTONEG_COMP (1 << 5) -#define BCM5221_REMOTE_FAULT (1 << 4) -#define BCM5221_AUTONEG_ABILITY (1 << 3) -#define BCM5221_LINK_STATUS (1 << 2) -#define BCM5221_JABBER_DETECT (1 << 1) -#define BCM5221_EXTEND_CAPAB (1 << 0) - -/*--definitions: BCM5221_PHYID1 */ -#define BCM5221_PHYID1_OUI 0x1018 -#define BCM5221_LSB_MASK 0x3F - -/*--Bit definitions: BCM5221_ANAR, BCM5221_ANLPAR */ -#define BCM5221_NP (1 << 15) -#define BCM5221_ACK (1 << 14) -#define BCM5221_RF (1 << 13) -#define BCM5221_FCS (1 << 10) -#define BCM5221_T4 (1 << 9) -#define BCM5221_TX_FDX (1 << 8) -#define BCM5221_TX_HDX (1 << 7) -#define BCM5221_10_FDX (1 << 6) -#define BCM5221_10_HDX (1 << 5) -#define BCM5221_AN_IEEE_802_3 0x0001 - -/*--Bit definitions: BCM5221_ANER */ -#define BCM5221_PDF (1 << 4) -#define BCM5221_LP_NP_ABLE (1 << 3) -#define BCM5221_NP_ABLE (1 << 2) -#define BCM5221_PAGE_RX (1 << 1) -#define BCM5221_LP_AN_ABLE (1 << 0) - -/*--Bit definitions: BCM5221_ACSR */ -#define BCM5221_100 (1 << 1) -#define BCM5221_FDX (1 << 0) - -/*--Bit definitions: BCM5221_INTR */ -#define BCM5221_FDX_LED (1 << 15) -#define BCM5221_INTR_ENABLE (1 << 14) -#define BCM5221_FDX_MASK (1 << 11) -#define BCM5221_SPD_MASK (1 << 10) -#define BCM5221_LINK_MASK (1 << 9) -#define BCM5221_INTR_MASK (1 << 8) -#define BCM5221_FDX_CHG (1 << 3) -#define BCM5221_SPD_CHG (1 << 2) -#define BCM5221_LINK_CHG (1 << 1) -#define BCM5221_INTR_STATUS (1 << 0) - -/****************** function prototypes **********************/ -unsigned int bcm5221_IsPhyConnected(AT91PS_EMAC p_mac); -unsigned char bcm5221_GetLinkSpeed(AT91PS_EMAC p_mac); -unsigned char bcm5221_AutoNegotiate(AT91PS_EMAC p_mac, int *status); -unsigned char bcm5221_InitPhy(AT91PS_EMAC p_mac); diff --git a/include/configs/AdderUSB.h b/include/configs/AdderUSB.h deleted file mode 100644 index ef76ce4cfc..0000000000 --- a/include/configs/AdderUSB.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * Copyright (C) 2006 CodeHermit. - * Bryan O'Donoghue - * - * Provides support for USB console on the Analogue & Micro Adder87x - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __ADDERUSB__ -#define __ADDERUSB__ - -/* Include the board port */ -#include "Adder.h" - -#define CONFIG_USB_DEVICE /* Include UDC driver */ -#define CONFIG_USB_TTY /* Bind the TTY driver to UDC */ -#define CONFIG_SYS_USB_EXTC_CLK 0x02 /* Oscillator on EXTC_CLK 2 */ -#define CONFIG_SYS_USB_BRG_CLK 0x04 /* or use Baud rate generator 0x04 */ -#define CONFIG_SYS_CONSOLE_IS_IN_ENV /* Console is in env */ - -/* If you have a USB-IF assigned VendorID then you may wish to define - * your own vendor specific values either in BoardName.h or directly in - * usbd_vendor_info.h - */ - -/* -#define CONFIG_USBD_MANUFACTURER "CodeHermit.ie" -#define CONFIG_USBD_PRODUCT_NAME "Das U-Boot" -#define CONFIG_USBD_VENDORID 0xFFFF -#define CONFIG_USBD_PRODUCTID_GSERIAL 0xFFFF -#define CONFIG_USBD_PRODUCTID_CDCACM 0xFFFE -*/ - -#endif /* __ADDERUSB_H__ */ diff --git a/include/configs/EXBITGEN.h b/include/configs/EXBITGEN.h deleted file mode 100644 index 208b599f6d..0000000000 --- a/include/configs/EXBITGEN.h +++ /dev/null @@ -1,190 +0,0 @@ -/* - * (C) Copyright 2000-2004 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -/* - * board/config.h - configuration options, board specific - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * High Level Configuration Options - * (easy to change) - */ - -#define CONFIG_405GP 1 /* This is a PPC405GP CPU */ -#define CONFIG_4xx 1 /* ...member of PPC4xx family */ -#define CONFIG_EXBITGEN 1 /* on a Exbit Generic board */ - -#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ - -#define CONFIG_SYS_CLK_FREQ 25000000 /* external frequency to pll */ - -/* I2C configuration */ -#define CONFIG_HARD_I2C 1 /* I2C with hardware support */ -#define CONFIG_SYS_I2C_SPEED 40000 /* I2C speed */ -#define CONFIG_SYS_I2C_SLAVE 0x7F /* I2C slave address */ - -/* environment is in EEPROM */ -#define CONFIG_ENV_IS_IN_EEPROM 1 -#undef CONFIG_ENV_IS_IN_FLASH -#undef CONFIG_ENV_IS_IN_NVRAM - -#ifdef CONFIG_ENV_IS_IN_EEPROM -#define CONFIG_SYS_I2C_EEPROM_ADDR 0x56 /* 1010110 */ -#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* 8-bit internal addressing */ -#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 1 /* ... and 1 bit in I2C address */ -#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 /* 4 bytes per page */ -#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 40 /* write takes up to 40 msec */ -#define CONFIG_ENV_OFFSET 4 /* Offset of Environment Sector */ -#define CONFIG_ENV_SIZE 350 /* that is 350 bytes only! */ -#endif - -#define CONFIG_BOOTDELAY 10 /* autoboot after 10 seconds */ -/* Explanation: - autbooting is altogether disabled and cannot be - enabled if CONFIG_BOOTDELAY is negative. - If you want shorter bootdelay, then - - "setenv bootdelay " to the proper value -*/ - -#define CONFIG_BOOTCOMMAND "bootm 20400000 20800000" - -#define CONFIG_BOOTARGS "root=/dev/ram " \ - "ramdisk_size=32768 " \ - "console=ttyS0,115200 " \ - "ram=128M debug" - -#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ -#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ - -#define CONFIG_MII 1 /* MII PHY management */ -#define CONFIG_PHY_ADDR 0 /* PHY address */ - - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_PPC4xx_EMAC -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - - -/* - * Command line configuration. - */ -#include - - -#undef CONFIG_WATCHDOG /* watchdog disabled */ - -/* - * Miscellaneous configurable options - */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#if defined(CONFIG_CMD_KGDB) -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ -#else -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#endif -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ - -#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ - -/* UART configuration */ -#define CONFIG_SYS_BASE_BAUD 691200 - -/* Default baud rate */ -#define CONFIG_BAUDRATE 115200 - -/* The following table includes the supported baudrates */ -#define CONFIG_SYS_BAUDRATE_TABLE \ - { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \ - 57600, 115200, 230400, 460800, 921600 } - -#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ -#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */ - -/*----------------------------------------------------------------------- - * PCI stuff - *----------------------------------------------------------------------- - */ -#undef CONFIG_PCI /* no pci support */ - -/*----------------------------------------------------------------------- - * External peripheral base address - *----------------------------------------------------------------------- - */ -#undef CONFIG_IDE_PCMCIA /* no pcmcia interface required */ -#undef CONFIG_IDE_LED /* no led for ide supported */ -#undef CONFIG_IDE_RESET /* no reset for ide supported */ - -#define CONFIG_SYS_KEY_REG_BASE_ADDR 0xF0100000 -#define CONFIG_SYS_IR_REG_BASE_ADDR 0xF0200000 -#define CONFIG_SYS_FPGA_REG_BASE_ADDR 0xF0300000 - -/*----------------------------------------------------------------------- - * Start addresses for the final memory configuration - * (Set up by the startup code) - * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 - */ -#define CONFIG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_FLASH0_BASE 0xFFF80000 -#define CONFIG_SYS_FLASH0_SIZE 0x00080000 -#define CONFIG_SYS_FLASH1_BASE 0x20000000 -#define CONFIG_SYS_FLASH1_SIZE 0x02000000 -#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_FLASH0_BASE -#define CONFIG_SYS_FLASH_SIZE CONFIG_SYS_FLASH0_SIZE -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_MONITOR_LEN (192 * 1024) /* Reserve 196 kB for Monitor */ -#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */ - -#if CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH0_BASE -#define CONFIG_SYS_RAMSTART -#endif - -/* - * For booting Linux, the board info and command line data - * have to be in the first 8 MB of memory, since this is - * the maximum mapped by the Linux kernel during initialization. - */ -#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ -/*----------------------------------------------------------------------- - * FLASH organization - */ -#define CONFIG_SYS_MAX_FLASH_BANKS 5 /* max number of memory banks */ -#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max number of sectors on one chip */ - -#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ -#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ - -#ifdef CONFIG_ENV_IS_IN_FLASH -#define CONFIG_ENV_OFFSET 0x00060000 /* Offset of Environment Sector */ -#define CONFIG_ENV_SIZE 0x00010000 /* Total Size of Environment Sector */ -#define CONFIG_ENV_SECT_SIZE 0x00010000 /* see README - env sector total size */ -#endif - -/* On Chip Memory location/size */ -#define CONFIG_SYS_OCM_DATA_ADDR 0xF8000000 -#define CONFIG_SYS_OCM_DATA_SIZE 0x1000 - -/* Global info and initial stack */ -#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_OCM_DATA_ADDR /* inside of on-chip SRAM */ -#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_OCM_DATA_SIZE /* Size of used area in RAM */ -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET - -#if defined(CONFIG_CMD_KGDB) -#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#endif -#endif /* __CONFIG_H */ diff --git a/include/configs/MVS1.h b/include/configs/MVS1.h deleted file mode 100644 index 73cd2a9a37..0000000000 --- a/include/configs/MVS1.h +++ /dev/null @@ -1,384 +0,0 @@ -/* - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -/* - * board/config.h - configuration options, board specific - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * High Level Configuration Options - * (easy to change) - */ - -#define CONFIG_MPC823 1 /* This is a MPC823 CPU */ -#define CONFIG_MVS 1 /* ...on a MVsensor module */ -#define CONFIG_MVS_16BIT_FLASH /* ...with 16-bit flash access */ -#define CONFIG_8xx_GCLK_FREQ 50000000/* ... and a 50 MHz CPU */ - -#define CONFIG_CLOCKS_IN_MHZ 1 /* clocks passsed to Linux in MHz */ - -#undef CONFIG_8xx_CONS_SMC1 /* Console is *NOT* on SMC1 */ -#define CONFIG_8xx_CONS_SMC2 1 /* Console is on SMC2 */ -#undef CONFIG_8xx_CONS_NONE -#define CONFIG_BAUDRATE 115200 /* console baudrate */ -#define CONFIG_BOOTDELAY 5 /* autoboot after this many seconds */ - -#define CONFIG_PREBOOT "echo;" \ - "echo To mount root over NFS use \"run bootnet\";" \ - "echo To mount root from FLASH use \"run bootflash\";" \ - "echo" -#define CONFIG_BOOTARGS "root=/dev/mtdblock2 rw" -#define CONFIG_BOOTCOMMAND \ - "bootp; " \ - "setenv bootargs root=/dev/nfs rw nfsroot=${serverip}:${rootpath} " \ - "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off; " \ - "bootm" - -#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ -#undef CONFIG_SYS_LOADS_BAUD_CHANGE /* don't allow baudrate change */ - -#define CONFIG_WATCHDOG /* watchdog disabled/enabled */ - -#undef CONFIG_STATUS_LED /* Status LED disabled/enabled */ - -#undef CONFIG_CAN_DRIVER /* CAN Driver support disabled */ - - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_SUBNETMASK -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_VENDOREX - -#undef CONFIG_MAC_PARTITION -#undef CONFIG_DOS_PARTITION - -#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */ - - -/* - * Command line configuration. - */ -#define CONFIG_CMD_LOADS -#define CONFIG_CMD_LOADB -#define CONFIG_CMD_IMI -#define CONFIG_CMD_FLASH -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_NET -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_SAVEENV -#define CONFIG_CMD_BOOTD -#define CONFIG_CMD_RUN - - -/* - * Miscellaneous configurable options - */ -#undef CONFIG_SYS_LONGHELP /* undef to save memory */ - -#undef CONFIG_SYS_HUSH_PARSER /* Hush parse for U-Boot ?? */ - -#if defined(CONFIG_CMD_KGDB) -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ -#else -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#endif -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ - -#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ - -#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ - -/* - * Low Level Configuration Settings - * (address mappings, register initial values, etc.) - * You should know what you are doing if you make changes here. - */ -/*----------------------------------------------------------------------- - * Internal Memory Mapped Register - */ -#define CONFIG_SYS_IMMR 0xFFF00000 - -/*----------------------------------------------------------------------- - * Definitions for initial stack pointer and data area (in DPRAM) - */ -#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_IMMR -#define CONFIG_SYS_INIT_RAM_SIZE 0x2F00 /* Size of used area in DPRAM */ -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET - -/*----------------------------------------------------------------------- - * Start addresses for the final memory configuration - * (Set up by the startup code) - * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 - */ -#define CONFIG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_FLASH_BASE 0x40000000 - -#define CONFIG_SYS_MONITOR_LEN (128 << 10) /* Reserve 192 kB for Monitor */ - -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE -#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ - -/* - * For booting Linux, the board info and command line data - * have to be in the first 8 MB of memory, since this is - * the maximum mapped by the Linux kernel during initialization. - */ -#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ - -/*----------------------------------------------------------------------- - * FLASH organization - */ -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ -#define CONFIG_SYS_MAX_FLASH_SECT 71 /* max number of sectors on one chip (for AMD320DB chip) */ - -#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ -#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ - -#define CONFIG_ENV_IS_IN_FLASH 1 - -/* 4MB flash - use bottom sectors of a bottom boot sector flash (16 bit access) */ -#define CONFIG_ENV_OFFSET 0x8000 /* Offset of Environment Sector (bottom boot sector) */ -#define CONFIG_ENV_SIZE 0x2000 /* Used Size of Environment Sector 8k */ - -/*----------------------------------------------------------------------- - * Cache Configuration - */ -#define CONFIG_SYS_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */ -#if defined(CONFIG_CMD_KGDB) -#define CONFIG_SYS_CACHELINE_SHIFT 4 /* log base 2 of the above value */ -#endif - -/*----------------------------------------------------------------------- - * SYPCR - System Protection Control 11-9 - * SYPCR can only be written once after reset! - *----------------------------------------------------------------------- - * Software & Bus Monitor Timer max, Bus Monitor enable, SW Watchdog freeze - */ -#if defined(CONFIG_WATCHDOG) -#define CONFIG_SYS_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | \ - SYPCR_SWE | SYPCR_SWRI| SYPCR_SWP) -#else -#define CONFIG_SYS_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | SYPCR_SWP) -#endif - -/*----------------------------------------------------------------------- - * SIUMCR - SIU Module Configuration 11-6 - *----------------------------------------------------------------------- - * PCMCIA config., multi-function pin tri-state - */ -#define CONFIG_SYS_SIUMCR (SIUMCR_DBGC00 | SIUMCR_DBPC00 | SIUMCR_MLRC01) - -/*----------------------------------------------------------------------- - * TBSCR - Time Base Status and Control 11-26 - *----------------------------------------------------------------------- - * Clear Reference Interrupt Status, Timebase freezing enabled - */ -#define CONFIG_SYS_TBSCR (TBSCR_REFA | TBSCR_REFB | TBSCR_TBF) - -/*----------------------------------------------------------------------- - * RTCSC - Real-Time Clock Status and Control Register 11-27 - *----------------------------------------------------------------------- - */ -#define CONFIG_SYS_RTCSC (RTCSC_SEC | RTCSC_ALR | RTCSC_RTF| RTCSC_RTE) - -/*----------------------------------------------------------------------- - * PISCR - Periodic Interrupt Status and Control 11-31 - *----------------------------------------------------------------------- - * Clear Periodic Interrupt Status, Interrupt Timer freezing enabled - */ -#define CONFIG_SYS_PISCR (PISCR_PS | PISCR_PITF) - -/*----------------------------------------------------------------------- - * PLPRCR - PLL, Low-Power, and Reset Control Register 15-30 - *----------------------------------------------------------------------- - * Reset PLL lock status sticky bit, timer expired status bit and timer - * interrupt status bit - * - */ -#define CONFIG_SYS_PLPRCR (PLPRCR_SPLSS | PLPRCR_TEXPS | PLPRCR_TMIST) - -/*----------------------------------------------------------------------- - * SCCR - System Clock and reset Control Register 15-27 - *----------------------------------------------------------------------- - * Set clock output, timebase and RTC source and divider, - * power management and some other internal clocks - */ -#define SCCR_MASK SCCR_EBDF11 -#define CONFIG_SYS_SCCR (SCCR_TBS | \ - SCCR_COM00 | SCCR_DFSYNC00 | SCCR_DFBRG00 | \ - SCCR_DFNL000 | SCCR_DFNH000 | SCCR_DFLCD000 | \ - SCCR_DFALCD00) - -/*----------------------------------------------------------------------- - * PCMCIA stuff - *----------------------------------------------------------------------- - * - */ -#define CONFIG_SYS_PCMCIA_MEM_ADDR (0xE0000000) -#define CONFIG_SYS_PCMCIA_MEM_SIZE ( 64 << 20 ) -#define CONFIG_SYS_PCMCIA_DMA_ADDR (0xE4000000) -#define CONFIG_SYS_PCMCIA_DMA_SIZE ( 64 << 20 ) -#define CONFIG_SYS_PCMCIA_ATTRB_ADDR (0xE8000000) -#define CONFIG_SYS_PCMCIA_ATTRB_SIZE ( 64 << 20 ) -#define CONFIG_SYS_PCMCIA_IO_ADDR (0xEC000000) -#define CONFIG_SYS_PCMCIA_IO_SIZE ( 64 << 20 ) - -/*----------------------------------------------------------------------- - * IDE/ATA stuff (Supports IDE harddisk on PCMCIA Adapter) - *----------------------------------------------------------------------- - */ - -#define CONFIG_IDE_PCCARD 0 /* **DON'T** Use IDE with PC Card Adapter */ - -#undef CONFIG_IDE_PCMCIA /* Direct IDE not supported */ -#undef CONFIG_IDE_LED /* LED for ide not supported */ -#undef CONFIG_IDE_RESET /* reset for ide not supported */ - -#define CONFIG_SYS_IDE_MAXBUS 0 /* max. no. of IDE buses */ -#define CONFIG_SYS_IDE_MAXDEVICE 0 /* max. no. of drives per IDE bus */ - - -#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000 - -#define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_PCMCIA_MEM_ADDR - -/* Offset for data I/O */ -#define CONFIG_SYS_ATA_DATA_OFFSET (CONFIG_SYS_PCMCIA_MEM_SIZE + 0x320) - -/* Offset for normal register accesses */ -#define CONFIG_SYS_ATA_REG_OFFSET (2 * CONFIG_SYS_PCMCIA_MEM_SIZE + 0x320) - -/* Offset for alternate registers */ -#define CONFIG_SYS_ATA_ALT_OFFSET 0x0100 - -/*----------------------------------------------------------------------- - * - *----------------------------------------------------------------------- - * - */ -/*#define CONFIG_SYS_DER 0x2002000F*/ -#define CONFIG_SYS_DER 0 - -/* - * Init Memory Controller: - * - * BR0/1 and OR0/1 (FLASH) - */ - -#define FLASH_BASE0_PRELIM 0x40000000 /* FLASH bank #0 */ -#undef FLASH_BASE1_PRELIM - -/* used to re-map FLASH both when starting from SRAM or FLASH: - * restrict access enough to keep SRAM working (if any) - * but not too much to meddle with FLASH accesses - */ -#define CONFIG_SYS_REMAP_OR_AM 0x80000000 /* OR addr mask */ -#define CONFIG_SYS_PRELIM_OR_AM 0xE0000000 /* OR addr mask */ - - -/* - * FLASH timing: - */ -/* 50 MHz CPU - 50 MHz bus: ACS = 00, TRLX = 1, CSNT = 1, SCY = 2, EHTR = 1 */ -#define CONFIG_SYS_OR_TIMING_FLASH (OR_ACS_DIV1 | OR_TRLX | OR_CSNT_SAM | \ - OR_SCY_2_CLK | OR_EHTR | OR_BI) -/* FLASH timing: ACS = 11, TRLX = 0, CSNT = 1, SCY = 5, EHTR = 1 */ -/* -#define CONFIG_SYS_OR_TIMING_FLASH (OR_CSNT_SAM | OR_ACS_DIV2 | OR_BI | \ - OR_SCY_5_CLK | OR_EHTR) -*/ - -#define CONFIG_SYS_OR0_REMAP (CONFIG_SYS_REMAP_OR_AM | CONFIG_SYS_OR_TIMING_FLASH) -#define CONFIG_SYS_OR0_PRELIM (CONFIG_SYS_PRELIM_OR_AM | CONFIG_SYS_OR_TIMING_FLASH) -#ifdef CONFIG_MVS_16BIT_FLASH -#define CONFIG_SYS_BR0_PRELIM ((FLASH_BASE0_PRELIM & BR_BA_MSK) | BR_PS_16 | BR_V ) -#else -#define CONFIG_SYS_BR0_PRELIM ((FLASH_BASE0_PRELIM & BR_BA_MSK) | BR_PS_32 | BR_V ) -#endif - -#undef CONFIG_SYS_OR1_REMAP -#undef CONFIG_SYS_OR1_PRELIM -#undef CONFIG_SYS_BR1_PRELIM -/* - * BR2/3 and OR2/3 (SDRAM) - * - */ -#define SDRAM_BASE2_PRELIM 0x00000000 /* SDRAM bank #0 */ -#undef SDRAM_BASE3_PRELIM -#define SDRAM_MAX_SIZE 0x04000000 /* max 64 MB per bank */ - -/* SDRAM timing: Multiplexed addresses, GPL5 output to GPL5_A (don't care) */ -#define CONFIG_SYS_OR_TIMING_SDRAM 0x00000A00 - -#define CONFIG_SYS_OR2_PRELIM (CONFIG_SYS_PRELIM_OR_AM | CONFIG_SYS_OR_TIMING_SDRAM ) -#define CONFIG_SYS_BR2_PRELIM ((SDRAM_BASE2_PRELIM & BR_BA_MSK) | BR_MS_UPMA | BR_V ) - -#undef CONFIG_SYS_OR3_PRELIM -#undef CONFIG_SYS_BR3_PRELIM - - -/* - * Memory Periodic Timer Prescaler - * - * The Divider for PTA (refresh timer) configuration is based on an - * example SDRAM configuration (64 MBit, one bank). The adjustment to - * the number of chip selects (NCS) and the actually needed refresh - * rate is done by setting MPTPR. - * - * PTA is calculated from - * PTA = (gclk * Trefresh) / ((2 ^ (2 * DFBRG)) * PTP * NCS) - * - * gclk CPU clock (not bus clock!) - * Trefresh Refresh cycle * 4 (four word bursts used) - * - * 4096 Rows from SDRAM example configuration - * 1000 factor s -> ms - * 32 PTP (pre-divider from MPTPR) from SDRAM example configuration - * 4 Number of refresh cycles per period - * 64 Refresh cycle in ms per number of rows - * -------------------------------------------- - * Divider = 4096 * 32 * 1000 / (4 * 64) = 512000 - * - * 50 MHz => 50.000.000 / Divider = 98 - * 66 Mhz => 66.000.000 / Divider = 129 - * 80 Mhz => 80.000.000 / Divider = 156 - */ -#define CONFIG_SYS_MAMR_PTA 98 - -/* refresh rate 15.6 us (= 64 ms / 4K = 62.4 / quad bursts) for <= 128 MBit */ -#define CONFIG_SYS_MPTPR_2BK_4K MPTPR_PTP_DIV16 /* setting for 2 banks */ -#define CONFIG_SYS_MPTPR_1BK_4K MPTPR_PTP_DIV32 /* setting for 1 bank */ - -/* refresh rate 7.8 us (= 64 ms / 8K = 31.2 / quad bursts) for 256 MBit */ -#define CONFIG_SYS_MPTPR_2BK_8K MPTPR_PTP_DIV8 /* setting for 2 banks */ -#define CONFIG_SYS_MPTPR_1BK_8K MPTPR_PTP_DIV16 /* setting for 1 bank */ - -/* - * MAMR settings for SDRAM - */ - -/* 8 column SDRAM */ -#define CONFIG_SYS_MAMR_8COL ((CONFIG_SYS_MAMR_PTA << MAMR_PTA_SHIFT) | MAMR_PTAE | \ - MAMR_AMA_TYPE_0 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A11 | \ - MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) -/* 9 column SDRAM */ -#define CONFIG_SYS_MAMR_9COL ((CONFIG_SYS_MAMR_PTA << MAMR_PTA_SHIFT) | MAMR_PTAE | \ - MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A7 | \ - MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) - -#endif /* __CONFIG_H */ diff --git a/include/configs/ORSG.h b/include/configs/ORSG.h deleted file mode 100644 index 5a9bee3496..0000000000 --- a/include/configs/ORSG.h +++ /dev/null @@ -1,282 +0,0 @@ -/* - * (C) Copyright 2001 - * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -/* - * board/config.h - configuration options, board specific - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * High Level Configuration Options - * (easy to change) - */ - -#define CONFIG_405GP 1 /* This is a PPC405 CPU */ -#define CONFIG_4xx 1 /* ...member of PPC4xx family */ -#define CONFIG_ORSG 1 /* ...on a ORSG board */ - -#define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ - -#define CONFIG_SYS_CLK_FREQ 33000000 /* external frequency to pll */ - -#define CONFIG_BAUDRATE 9600 -#define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */ - -#undef CONFIG_BOOTARGS -#define CONFIG_BOOTCOMMAND "go fff00100" - -#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ -#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ - -#define CONFIG_PPC4xx_EMAC -#define CONFIG_MII 1 /* MII PHY management */ -#define CONFIG_PHY_ADDR 0 /* PHY address */ -#define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */ - - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - - -/* - * Command line configuration. - */ -#include - -#define CONFIG_CMD_PCI -#define CONFIG_CMD_IRQ -#define CONFIG_CMD_ASKENV -#define CONFIG_CMD_ELF -#define CONFIG_CMD_BSP -#define CONFIG_CMD_EEPROM - - -#define CONFIG_MAC_PARTITION -#define CONFIG_DOS_PARTITION - -#undef CONFIG_WATCHDOG /* watchdog disabled */ - -#define CONFIG_SDRAM_BANK0 1 /* init onboard SDRAM bank 0 */ - -/* - * Miscellaneous configurable options - */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#if defined(CONFIG_CMD_KGDB) -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ -#else -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#endif -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ - -#define CONFIG_SYS_CONSOLE_INFO_QUIET 1 /* don't print console @ startup*/ - -#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ - -#define CONFIG_CONS_INDEX 1 /* Use UART0 */ -#define CONFIG_SYS_NS16550 -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE 1 -#define CONFIG_SYS_NS16550_CLK get_serial_clock() - -#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */ -#define CONFIG_SYS_BASE_BAUD 691200 - -/* The following table includes the supported baudrates */ -#define CONFIG_SYS_BAUDRATE_TABLE \ - { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \ - 57600, 115200, 230400, 460800, 921600 } - -#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ -#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */ - -#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ - -/*----------------------------------------------------------------------- - * PCI stuff - *----------------------------------------------------------------------- - */ -#define PCI_HOST_ADAPTER 0 /* configure as pci adapter */ -#define PCI_HOST_FORCE 1 /* configure as pci host */ -#define PCI_HOST_AUTO 2 /* detected via arbiter enable */ - -#define CONFIG_PCI /* include pci support */ -#define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ -#define CONFIG_PCI_HOST PCI_HOST_ADAPTER /* select pci adapter */ -#undef CONFIG_PCI_PNP /* no pci plug-and-play */ - /* resource configuration */ - -#undef CONFIG_PCI_SCAN_SHOW /* print pci devices @ startup */ - -#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x12FE /* PCI Vendor ID: esd gmbh */ -#define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0x0411 /* PCI Device ID: ORSG */ -#define CONFIG_SYS_PCI_CLASSCODE 0x0b20 /* PCI Class Code: Processor/PPC*/ -#define CONFIG_SYS_PCI_PTM1LA 0x00000000 /* point to sdram */ -#define CONFIG_SYS_PCI_PTM1MS 0xfc000001 /* 64MB, enable hard-wired to 1 */ -#define CONFIG_SYS_PCI_PTM1PCI 0x00000000 /* Host: use this pci address */ -#define CONFIG_SYS_PCI_PTM2LA 0xffc00000 /* point to flash */ -#define CONFIG_SYS_PCI_PTM2MS 0xffc00001 /* 4MB, enable */ -#define CONFIG_SYS_PCI_PTM2PCI 0x04000000 /* Host: use this pci address */ - -/*----------------------------------------------------------------------- - * Start addresses for the final memory configuration - * (Set up by the startup code) - * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 - */ -#define CONFIG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_FLASH_BASE 0xFFFD0000 -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE -#define CONFIG_SYS_MONITOR_LEN (192 * 1024) /* Reserve 192 kB for Monitor */ -#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */ - -/* - * For booting Linux, the board info and command line data - * have to be in the first 8 MB of memory, since this is - * the maximum mapped by the Linux kernel during initialization. - */ -#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ -/*----------------------------------------------------------------------- - * FLASH organization - */ -#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */ -#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max number of sectors on one chip */ - -#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ -#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ - -#define CONFIG_SYS_FLASH_WORD_SIZE unsigned short /* flash word size (width) */ -#define CONFIG_SYS_FLASH_ADDR0 0x5555 /* 1st address for flash config cycles */ -#define CONFIG_SYS_FLASH_ADDR1 0x2AAA /* 2nd address for flash config cycles */ -/* - * The following defines are added for buggy IOP480 byte interface. - * All other boards should use the standard values (CPCI405 etc.) - */ -#define CONFIG_SYS_FLASH_READ0 0x0000 /* 0 is standard */ -#define CONFIG_SYS_FLASH_READ1 0x0001 /* 1 is standard */ -#define CONFIG_SYS_FLASH_READ2 0x0002 /* 2 is standard */ - -#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ - -#if 0 /* Use NVRAM for environment variables */ -/*----------------------------------------------------------------------- - * NVRAM organization - */ -#define CONFIG_ENV_IS_IN_NVRAM 1 /* use NVRAM for environment vars */ -#define CONFIG_SYS_NVRAM_BASE_ADDR 0xf0200000 /* NVRAM base address */ -#define CONFIG_SYS_NVRAM_SIZE (32*1024) /* NVRAM size */ -#define CONFIG_ENV_SIZE 0x1000 /* Size of Environment vars */ -#define CONFIG_ENV_ADDR \ - (CONFIG_SYS_NVRAM_BASE_ADDR+CONFIG_SYS_NVRAM_SIZE-CONFIG_ENV_SIZE) /* Env */ -#define CONFIG_SYS_NVRAM_VXWORKS_OFFS 0x6900 /* Offset for VxWorks eth-addr */ - -#else /* Use EEPROM for environment variables */ - -#define CONFIG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */ -#define CONFIG_ENV_OFFSET 0x000 /* environment starts at the beginning of the EEPROM */ -#define CONFIG_ENV_SIZE 0x300 /* 768 bytes may be used for env vars */ - /* total size of a CAT24WC08 is 1024 bytes */ -#endif - -/*----------------------------------------------------------------------- - * I2C EEPROM (CAT24WC08) for environment - */ -#define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_PPC4XX -#define CONFIG_SYS_I2C_PPC4XX_CH0 -#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 -#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F - -#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */ -#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ -/* mask of address bits that overflow into the "EEPROM chip address" */ -#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07 -#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 /* The Catalyst CAT24WC08 has */ - /* 16 byte page write mode using*/ - /* last 4 bits of the address */ -#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ - -/* - * Init Memory Controller: - * - * BR0/1 and OR0/1 (FLASH) - */ - -#define FLASH_BASE0_PRELIM 0xFF800000 /* FLASH bank #0 */ -#define FLASH_BASE1_PRELIM 0xFFC00000 /* FLASH bank #1 */ - -/*----------------------------------------------------------------------- - * External Bus Controller (EBC) Setup - */ - -/* Memory Bank 0 (Flash Bank 0) initialization */ -#define CONFIG_SYS_EBC_PB0AP 0x92015480 -#define CONFIG_SYS_EBC_PB0CR 0xFFC5A000 /* BAS=0xFFC,BS=4MB,BU=R/W,BW=16bit */ - -/* Memory Bank 1 (Flash Bank 1) initialization */ -#define CONFIG_SYS_EBC_PB1AP 0x92015480 -#define CONFIG_SYS_EBC_PB1CR 0xFF85A000 /* BAS=0xFF8,BS=4MB,BU=R/W,BW=16bit */ - -/* Memory Bank 2 (PLD - FPGA-boot) initialization */ -#define CONFIG_SYS_EBC_PB2AP 0x02015480 /* BME=0x0,TWT=0x04,CSN=0x0,OEN=0x1 */ - /* WBN=0x1,WBF=0x1,TH=0x2,RE=0x0,SOR=0x1,BEM=0x0,PEN=0x0*/ -#define CONFIG_SYS_EBC_PB2CR 0xF0018000 /* BAS=0xF00,BS=1MB,BU=R/W,BW=8bit */ - -/* Memory Bank 3 (PLD - OSL) initialization */ -#define CONFIG_SYS_EBC_PB3AP 0x02015480 /* BME=0x0,TWT=0x04,CSN=0x0,OEN=0x1 */ - /* WBN=0x1,WBF=0x1,TH=0x2,RE=0x0,SOR=0x1,BEM=0x0,PEN=0x0*/ -#define CONFIG_SYS_EBC_PB3CR 0xF0118000 /* BAS=0xF01,BS=1MB,BU=R/W,BW=8bit */ - -/* Memory Bank 4 (Spartan2 1) initialization */ -#define CONFIG_SYS_EBC_PB4AP 0x02015580 /* BME=0x0,TWT=0x04,CSN=0x0,OEN=0x1 */ - /* WBN=0x1,WBF=0x1,TH=0x2,RE=0x1,SOR=0x1,BEM=0x0,PEN=0x0*/ -#define CONFIG_SYS_EBC_PB4CR 0xF209C000 /* BAS=0xF20,BS=16MB,BU=R/W,BW=32bit*/ - -/* Memory Bank 5 (Spartan2 2) initialization */ -#define CONFIG_SYS_EBC_PB5AP 0x02015580 /* BME=0x0,TWT=0x04,CSN=0x0,OEN=0x1 */ - /* WBN=0x1,WBF=0x1,TH=0x2,RE=0x1,SOR=0x1,BEM=0x0,PEN=0x0*/ -#define CONFIG_SYS_EBC_PB5CR 0xF309C000 /* BAS=0xF30,BS=16MB,BU=R/W,BW=32bit*/ - -/* Memory Bank 6 (Virtex 1) initialization */ -#define CONFIG_SYS_EBC_PB6AP 0x02015580 /* BME=0x0,TWT=0x04,CSN=0x0,OEN=0x1 */ - /* WBN=0x1,WBF=0x1,TH=0x2,RE=0x1,SOR=0x1,BEM=0x0,PEN=0x0*/ -#define CONFIG_SYS_EBC_PB6CR 0xF409A000 /* BAS=0xF40,BS=16MB,BU=R/W,BW=16bit*/ - -/* Memory Bank 7 (Virtex 2) initialization */ -#define CONFIG_SYS_EBC_PB7AP 0x02015580 /* BME=0x0,TWT=0x04,CSN=0x0,OEN=0x1 */ - /* WBN=0x1,WBF=0x1,TH=0x2,RE=0x1,SOR=0x1,BEM=0x0,PEN=0x0*/ -#define CONFIG_SYS_EBC_PB7CR 0xF509A000 /* BAS=0xF50,BS=16MB,BU=R/W,BW=16bit*/ - - -#define CONFIG_SYS_VXWORKS_MAC_PTR 0x00000000 /* Pass Ethernet MAC to VxWorks */ - -/*----------------------------------------------------------------------- - * Definitions for initial stack pointer and data area (in DPRAM) - */ - -/* use on chip memory ( OCM ) for temperary stack until sdram is tested */ -#define CONFIG_SYS_TEMP_STACK_OCM 1 - -/* On Chip Memory location */ -#define CONFIG_SYS_OCM_DATA_ADDR 0xF8000000 -#define CONFIG_SYS_OCM_DATA_SIZE 0x1000 - -#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_OCM_DATA_ADDR /* inside of SDRAM */ -#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_OCM_DATA_SIZE /* Size of used area in RAM */ -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET - -#endif /* __CONFIG_H */ diff --git a/include/configs/mpq101.h b/include/configs/mpq101.h deleted file mode 100644 index 4cac8ee46a..0000000000 --- a/include/configs/mpq101.h +++ /dev/null @@ -1,359 +0,0 @@ -/* - * Copyright 2011 Alex Dubov - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -/* - * Merury Computers MPQ101 board configuration file - * - */ -#ifndef __CONFIG_H -#define __CONFIG_H - -#ifdef CONFIG_36BIT -# define CONFIG_PHYS_64BIT -#endif - -/* High Level Configuration Options */ -#define CONFIG_BOOKE /* BOOKE */ -#define CONFIG_E500 /* BOOKE e500 family */ -#define CONFIG_MPC85xx /* MPC8540/60/55/41/48 */ -#define CONFIG_MPC8548 /* MPC8548 specific */ -#define CONFIG_MPQ101 /* MPQ101 board specific */ - -#define CONFIG_SYS_SRIO /* enable serial RapidIO */ -#define CONFIG_TSEC_ENET /* tsec ethernet support */ -#define CONFIG_INTERRUPTS /* enable pci, srio, ddr interrupts */ -#define CONFIG_FSL_LAW /* Use common FSL init code */ - -/* - * These can be toggled for performance analysis, otherwise use default. - */ -#define CONFIG_L2_CACHE /* toggle L2 cache */ -#define CONFIG_BTB /* toggle branch predition */ - -#define CONFIG_PANIC_HANG - -/* - * Only possible on E500 Version 2 or newer cores. - */ -#define CONFIG_ENABLE_36BIT_PHYS - -#ifdef CONFIG_PHYS_64BIT -# define CONFIG_ADDR_MAP -# define CONFIG_SYS_NUM_ADDR_MAP 16 /* number of TLB1 entries */ -#endif - - -#define CONFIG_SYS_CLK_FREQ 33000000 /* sysclk for MPC85xx */ - -#define CONFIG_SYS_CCSRBAR 0xe0000000 -#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR - -/* DDR Setup */ -#define CONFIG_SYS_FSL_DDR2 - -#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */ - -#define CONFIG_MEM_INIT_VALUE 0xDeadBeef -#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 /* DDR is system memory*/ -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE - -#define CONFIG_NUM_DDR_CONTROLLERS 1 -#define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) - -/* Fixed 512MB DDR2 parameters */ -#define CONFIG_SYS_SDRAM_SIZE_LOG 29 /* DDR is 512MB */ -#define CONFIG_SYS_DDR_CS0_BNDS 0x0000001f -#define CONFIG_SYS_DDR_CS0_CONFIG 0x80014102 -#define CONFIG_SYS_DDR_TIMING_3 0x00010000 -#define CONFIG_SYS_DDR_TIMING_0 0x00260802 -#define CONFIG_SYS_DDR_TIMING_1 0x5c47a432 -#define CONFIG_SYS_DDR_TIMING_1_PERF 0x49352322 -#define CONFIG_SYS_DDR_TIMING_2 0x03984cce -#define CONFIG_SYS_DDR_TIMING_2_PERF 0x14904cca -#define CONFIG_SYS_DDR_MODE_1 0x00400442 -#define CONFIG_SYS_DDR_MODE_1_PERF 0x00480432 -#define CONFIG_SYS_DDR_MODE_2 0x00000000 -#define CONFIG_SYS_DDR_MODE_2_PERF 0x00000000 -#define CONFIG_SYS_DDR_INTERVAL 0x08200100 -#define CONFIG_SYS_DDR_INTERVAL_PERF 0x06180100 -#define CONFIG_SYS_DDR_CLK_CTRL 0x03800000 -#define CONFIG_SYS_DDR_CONTROL 0xc3008000 /* Type = DDR2 */ -#define CONFIG_SYS_DDR_CONTROL2 0x04400000 - -#define CONFIG_SYS_ALT_MEMTEST -#define CONFIG_SYS_MEMTEST_START 0x0ff00000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x0ffffffc - -/* - * RAM definitions - */ -#define CONFIG_SYS_INIT_RAM_LOCK -#define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ -#define CONFIG_SYS_INIT_RAM_SIZE 0x4000 /* Size of used area in RAM */ - -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE \ - - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET - -#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */ -#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserved for malloc */ - -/* - * Local Bus Definitions - */ -#define CONFIG_SYS_LBC_LCRR 0x00000004 /* LB clock ratio reg */ -#define CONFIG_SYS_LBC_LBCR 0x00000000 /* LB config reg */ - - -/* - * FLASH on the Local Bus - * One bank, 128M, using the CFI driver. - */ -#define CONFIG_SYS_BOOT_BLOCK 0xf8000000 /* boot TLB block */ -#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_BOOT_BLOCK /* start of FLASH 128M */ - -#ifdef CONFIG_PHYS_64BIT -# define CONFIG_SYS_FLASH_BASE_PHYS 0xff8000000ull -#else -# define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE -#endif - -/* 0xf8001801 */ -#define CONFIG_SYS_BR0_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) \ - | BR_PS_32 | BR_V) - -/* 0xf8006ff7 */ -#define CONFIG_SYS_OR0_PRELIM (MEG_TO_AM(128) | OR_GPCM_XAM | OR_GPCM_CSNT \ - | OR_GPCM_ACS_DIV2 | OR_GPCM_XACS \ - | OR_GPCM_SCY_15 | OR_GPCM_TRLX \ - | OR_GPCM_EHTR | OR_GPCM_EAD) - -#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS} -#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ - -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */ -#define CONFIG_SYS_MAX_FLASH_SECT 512 /* sectors per device */ - -#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ -#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ - -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_EMPTY_INFO -#define CONFIG_SYS_FLASH_AMD_CHECK_DQ7 -/* - * When initializing flash, if we cannot find the manufacturer ID, - * assume this is the AMD flash. - */ -#define CONFIG_ASSUME_AMD_FLASH - -/* - * Environment parameters - */ -#define CONFIG_ENV_IS_IN_FLASH -#define CONFIG_ENV_OVERWRITE -#define CONFIG_SYS_USE_PPCENV -#define ENV_IS_EMBEDDED -#define CONFIG_ENV_SECT_SIZE 0x40000 /* 256K */ -#define CONFIG_ENV_SIZE 0x800 - -/* Environment at the start of flash sector, before text. */ -#define CONFIG_ENV_ADDR (CONFIG_SYS_TEXT_BASE - CONFIG_ENV_SIZE) -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ -#define CONFIG_SYS_TEXT_BASE 0xfffc0800 -#define CONFIG_SYS_LDSCRIPT "board/mercury/mpq101/u-boot.lds" - -/* - * Cypress CY7C67200 USB controller on the Local Bus. - * Not supported by u-boot at present. - */ -#define CONFIG_SYS_LBC_OPTION_BASE 0xf0000000 - -#ifdef CONFIG_PHYS_64BIT -# define CONFIG_SYS_LBC_OPTION_BASE_PHYS 0xff0000000ull -#else -# define CONFIG_SYS_LBC_OPTION_BASE_PHYS CONFIG_SYS_LBC_OPTION_BASE -#endif - -/* 0xf0001001 */ -#define CONFIG_SYS_BR1_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_LBC_OPTION_BASE_PHYS) \ - | BR_PS_16 | BR_V) - -/* fffff002 */ -#define CONFIG_SYS_OR1_PRELIM (P2SZ_TO_AM(0x8000) | OR_GPCM_XAM \ - | OR_GPCM_BCTLD | OR_GPCM_EHTR) - -/* - * Serial Ports - */ -#define CONFIG_CONS_INDEX 2 -#define CONFIG_SYS_NS16550 -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE 1 -#define CONFIG_SYS_NS16550_CLK get_bus_freq(0) - -#define CONFIG_SYS_BAUDRATE_TABLE {300, 600, 1200, 2400, 4800, 9600, \ - 19200, 38400, 115200} - -#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500) -#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600) - -/* - * I2C buses and peripherals - */ -#define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_FSL -#define CONFIG_SYS_FSL_I2C_SPEED 400000 -#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F -#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 -#define CONFIG_SYS_FSL_I2C2_SPEED 400000 -#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F -#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100 -#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} } - -/* I2C RTC - M41T81 */ -#define CONFIG_RTC_M41T62 -#define CONFIG_SYS_I2C_RTC_ADDR 0x68 -#define CONFIG_SYS_M41T11_BASE_YEAR 2000 - -/* I2C EEPROM - 24C256 */ -#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 -#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 -#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 12 -#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 -#define CONFIG_SYS_EEPROM_BUS_NUM 1 - -/* - * RapidIO MMU - */ -#ifdef CONFIG_SYS_SRIO -# define CONFIG_SRIO1 -# define CONFIG_SYS_SRIO1_MEM_VIRT 0xc0000000 -# define CONFIG_SYS_SRIO1_MEM_SIZE 0x20000000 /* 512M */ - -# ifdef CONFIG_PHYS_64BIT -# define CONFIG_SYS_SRIO1_MEM_PHYS 0xfc0000000ull -# else -# define CONFIG_SYS_SRIO1_MEM_PHYS CONFIG_SYS_SRIO1_MEM_VIRT -# endif -#endif - -/* - * Ethernet - */ -#ifdef CONFIG_TSEC_ENET - -# define CONFIG_MII /* MII PHY management */ -# define CONFIG_MII_DEFAULT_TSEC 1 /* Allow unregistered phys */ - -# define CONFIG_TSEC1 -# define CONFIG_TSEC1_NAME "eTSEC0" -# define TSEC1_PHY_ADDR 0x10 -# define TSEC1_PHYIDX 0 -# define TSEC1_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) - -# define CONFIG_TSEC2 -# define CONFIG_TSEC2_NAME "eTSEC1" -# define TSEC2_PHY_ADDR 0x11 -# define TSEC2_PHYIDX 0 -# define TSEC2_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) - -# define CONFIG_TSEC3 -# define CONFIG_TSEC3_NAME "eTSEC2" -# define TSEC3_PHY_ADDR 0x12 -# define TSEC3_PHYIDX 0 -# define TSEC3_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) - -# define CONFIG_TSEC4 -# define CONFIG_TSEC4_NAME "eTSEC3" -# define TSEC4_PHY_ADDR 0x13 -# define TSEC4_PHYIDX 0 -# define TSEC4_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) - -/* Options are: eTSEC[0-3] */ -# define CONFIG_ETHPRIME "eTSEC0" -# define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */ -#endif - -/* - * Command line configuration. - */ -#include - -#define CONFIG_CMD_DATE -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_PING -#define CONFIG_CMD_SNTP -#define CONFIG_CMD_I2C -#define CONFIG_CMD_EEPROM -#define CONFIG_CMD_MII -#define CONFIG_CMD_ELF -#define CONFIG_CMD_IRQ -#define CONFIG_CMD_SETEXPR -#define CONFIG_CMD_JFFS2 - -/* - * Miscellaneous configurable options - */ - -/* pass open firmware flat tree */ -#define CONFIG_OF_LIBFDT -#define CONFIG_OF_BOARD_SETUP -#define CONFIG_OF_STDOUT_VIA_ALIAS - -#define CONFIG_FIT /* new uImage format support */ -#define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */ - -/* Use the HUSH parser */ -#define CONFIG_SYS_HUSH_PARSER - - -#define CONFIG_LOADS_ECHO /* echo on for serial download */ -#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */ - -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_CMDLINE_EDITING /* Command-line editing */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ - -#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ -#define CONFIG_SYS_PROMPT "MPQ-101=> " /* Monitor Command Prompt */ - -/* Console I/O Buffer Size */ -#ifdef CONFIG_CMD_KGDB -# define CONFIG_SYS_CBSIZE 1024 -#else -# define CONFIG_SYS_CBSIZE 256 -#endif - -/* Print Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT)+16) - -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ - -/* - * For booting Linux, the board info and command line data - * have to be in the first 16 MB of memory, since this is - * the maximum mapped by the Linux kernel during initialization. - */ -#define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/ -#define CONFIG_SYS_BOOTM_LEN (16 << 20) /* Increase max gunzip size */ - -#ifdef CONFIG_CMD_KGDB -# define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#endif - -/* - * Basic Environment Configuration - */ -#define CONFIG_BAUDRATE 115200 -#define CONFIG_BOOTDELAY 5 /* -1 disables auto-boot */ - -/*default location for tftp and bootm*/ -#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR - -#endif /* __CONFIG_H */ diff --git a/include/configs/tb0229.h b/include/configs/tb0229.h deleted file mode 100644 index 2901ed1eeb..0000000000 --- a/include/configs/tb0229.h +++ /dev/null @@ -1,175 +0,0 @@ -/* - * (C) Copyright 2003 - * Masami Komiya - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -/* - * Config header file for TANBAC TB0229 board using an VR4131 CPU module - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#define CONFIG_MIPS32 1 /* MIPS 4Kc CPU core */ -#define CONFIG_TB0229 1 /* on a TB0229 Board */ - -#ifndef CPU_CLOCK_RATE -#define CPU_CLOCK_RATE 200000000 /* 200 MHz clock for the MIPS core */ -#endif -#define CPU_TCLOCK_RATE 16588800 /* 16.5888 MHz for TClock */ - -#define CONFIG_CONS_INDEX 1 -#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ - -#define CONFIG_BAUDRATE 115200 - -#define CONFIG_TIMESTAMP /* Print image info with timestamp */ - -#define CONFIG_PREBOOT "echo;" \ - "echo Type \\\"boot\\\" for the network boot using DHCP, TFTP and NFS;" \ - "echo Type \\\"run netboot_initrd\\\" for the network boot with initrd;" \ - "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \ - "echo Type \\\"run flash_local\\\" to mount local root filesystem;" \ - "echo" - -#undef CONFIG_BOOTARGS - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "netboot=dhcp;tftp;run netargs; bootm\0" \ - "nfsargs=setenv bootargs root=/dev/nfs ip=dhcp\0" \ - "localargs=setenv bootargs root=1F02 ip=dhcp\0" \ - "addmisc=setenv bootargs ${bootargs} " \ - "console=ttyS0,${baudrate} " \ - "read-only=readonly\0" \ - "netargs=run nfsargs addmisc\0" \ - "flash_nfs=run nfsargs addmisc;" \ - "bootm ${kernel_addr}\0" \ - "flash_local=run localargs addmisc;" \ - "bootm ${kernel_addr}\0" \ - "netboot_initrd=dhcp;tftp;tftp 80600000 initrd;" \ - "setenv bootargs root=/dev/ram ramdisk_size=8192 ip=dhcp;"\ - "run addmisc;" \ - "bootm 80400000 80600000\0" \ - "rootpath=/export/miniroot-mipsel\0" \ - "autoload=no\0" \ - "kernel_addr=BFC60000\0" \ - "ramdisk_addr=B0100000\0" \ - "u-boot=u-boot.bin\0" \ - "bootfile=uImage\0" \ - "load=dhcp;tftp 80400000 ${u-boot}\0" \ - "load_kernel=dhcp;tftp 80400000 ${bootfile}\0" \ - "update_uboot=run load;" \ - "protect off BFC00000 BFC3FFFF;" \ - "erase BFC00000 BFC3FFFF;" \ - "cp.b 80400000 BFC00000 ${filesize}\0" \ - "update_kernel=run load_kernel;" \ - "erase BFC60000 BFD5FFFF;" \ - "cp.b 80400000 BFC60000 ${filesize}\0" \ - "initenv=erase bfc40000 bfc5ffff\0" \ - "" -/*#define CONFIG_BOOTCOMMAND "run flash_local" */ -#define CONFIG_BOOTCOMMAND "run netboot" - - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - - -/* - * Command line configuration. - */ -#include - -#define CONFIG_CMD_ASKENV -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_PING -#define CONFIG_CMD_PCI -#define CONFIG_CMD_ELF - - -/* - * Miscellaneous configurable options - */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_PROMPT "# " /* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ -#define CONFIG_SYS_MAXARGS 16 /* max number of command args*/ - -#define CONFIG_SYS_MALLOC_LEN 128*1024 - -#define CONFIG_SYS_BOOTPARAMS_LEN 128*1024 - -#define CONFIG_SYS_MIPS_TIMER_FREQ (CPU_TCLOCK_RATE/4) - -#define CONFIG_SYS_SDRAM_BASE 0x80000000 - -#define CONFIG_SYS_LOAD_ADDR 0x80400000 /* default load address */ - -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END 0x80800000 - -/*----------------------------------------------------------------------- - * FLASH and environment organization - */ -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ -#define CONFIG_SYS_MAX_FLASH_SECT (128) /* max number of sectors on one chip */ - -#define PHYS_FLASH_1 0xbfc00000 /* Flash Bank #1 */ - -/* The following #defines are needed to get flash environment right */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_MONITOR_LEN (192 << 10) - -#define CONFIG_SYS_INIT_SP_OFFSET 0x400000 - -#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 - -/* timeout values are in ticks */ -#define CONFIG_SYS_FLASH_ERASE_TOUT (20 * CONFIG_SYS_HZ) /* Timeout for Flash Erase */ -#define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Write */ - -#define CONFIG_ENV_IS_IN_FLASH 1 - -/* Address and size of Primary Environment Sector */ -#define CONFIG_ENV_ADDR 0xBFC40000 -#define CONFIG_ENV_SIZE 0x20000 - -#define CONFIG_SYS_DIRECT_FLASH_TFTP - -#define CONFIG_NR_DRAM_BANKS 1 - -/*----------------------------------------------------------------------- - * Cache Configuration - */ -#define CONFIG_SYS_DCACHE_SIZE 16384 -#define CONFIG_SYS_ICACHE_SIZE 16384 -#define CONFIG_SYS_CACHELINE_SIZE 16 - -/*----------------------------------------------------------------------- - * Serial Configuration - */ -#define CONFIG_SYS_NS16550 -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE 1 -#define CONFIG_SYS_NS16550_CLK 18432000 -#define CONFIG_SYS_NS16550_COM1 0xaf000800 - -/*----------------------------------------------------------------------- - * PCI stuff - */ -#define CONFIG_PCI -#define CONFIG_PCI_PNP -#define CONFIG_EEPRO100 -#define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */ - -#define CONFIG_RTL8139 - -#endif /* __CONFIG_H */ diff --git a/include/cramfs/cramfs_fs_sb.h b/include/cramfs/cramfs_fs_sb.h deleted file mode 100644 index bc23f94b94..0000000000 --- a/include/cramfs/cramfs_fs_sb.h +++ /dev/null @@ -1,19 +0,0 @@ -#ifndef _CRAMFS_FS_SB -#define _CRAMFS_FS_SB - -/* - * cramfs super-block data in memory - */ -struct cramfs_sb_info { - unsigned long magic; - unsigned long size; - unsigned long blocks; - unsigned long files; - unsigned long flags; -#ifdef CONFIG_CRAMFS_LINEAR - unsigned long linear_phys_addr; - char * linear_virt_addr; -#endif -}; - -#endif diff --git a/include/da9030.h b/include/da9030.h deleted file mode 100644 index 275d6813b0..0000000000 --- a/include/da9030.h +++ /dev/null @@ -1,102 +0,0 @@ -/* - * (C) Copyright 2006 DENX Software Engineering - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -/* DA9030 register definitions */ -#define CID 0x00 -#define EVENT_A 0x01 -#define EVENT_B 0x02 -#define EVENT_C 0x03 -#define STATUS 0x04 -#define IRQ_MASK_A 0x05 -#define IRQ_MASK_B 0x06 -#define IRQ_MASK_C 0x07 -#define SYS_CONTROL_A 0x08 -#define SYS_CONTROL_B 0x09 -#define FAULT_LOG 0x0A -#define LDO_10_11 0x10 -#define LDO_15 0x11 -#define LDO_14_16 0x12 -#define LDO_18_19 0x13 -#define LDO_17_SIMCP0 0x14 -#define BUCK2_DVC1 0x15 -#define BUCK2_DVC2 0x16 -#define REG_CONTROL_1_17 0x17 -#define REG_CONTROL_2_18 0x18 -#define USBPUMP 0x19 -#define SLEEP_CONTROL 0x1A -#define STARTUP_CONTROL 0x1B -#define LED1_CONTROL 0x20 -#define LED2_CONTROL 0x21 -#define LED3_CONTROL 0x22 -#define LED4_CONTROL 0x23 -#define LEDPC_CONTROL 0x24 -#define WLED_CONTROL 0x25 -#define MISC_CONTROLA 0x26 -#define MISC_CONTROLB 0x27 -#define CHARGE_CONTROL 0x28 -#define CCTR_CONTROL 0x29 -#define TCTR_CONTROL 0x2A -#define CHARGE_PULSE 0x2B - -/* ... some missing ...*/ - -#define LDO1 0x90 -#define LDO2_3 0x91 -#define LDO4_5 0x92 -#define LDO6_SIMCP 0x93 -#define LDO7_8 0x94 -#define LDO9_12 0x95 -#define BUCK 0x96 -#define REG_CONTROL_1_97 0x97 -#define REG_CONTROL_2_98 0x98 -#define REG_SLEEP_CONTROL1 0x99 -#define REG_SLEEP_CONTROL2 0x9A -#define REG_SLEEP_CONTROL3 0x9B -#define ADC_MAN_CONTROL 0xA0 -#define ADC_AUTO_CONTROL 0xA1 -#define VBATMON 0xA2 -#define VBATMONTXMON 0xA3 -#define TBATHIGHP 0xA4 -#define TBATHIGHN 0xA5 -#define TBATLOW 0xA6 -#define MAN_RES 0xB0 -#define VBAT_RES 0xB1 -#define VBATMIN_RES 0xB2 -#define VBATMINTXON_RES 0xB3 -#define ICHMAX_RES 0xB4 -#define ICHMIN_RES 0xB5 -#define ICHAVERAGE_RES 0xB6 -#define VCHMAX_RES 0xB7 -#define VCHMIN_RES 0xB8 -#define TBAT_RES 0xB9 -#define ADC_IN4_RES 0xBA - -#define STATUS_ONKEY_N 0x1 /* current ONKEY_N value */ -#define STATUS_PWREN1 (1<<1) /* PWREN1 value */ -#define STATUS_EXTON (1<<2) /* EXTON value */ -#define STATUS_CHDET (1<<3) /* Charger detection status */ -#define STATUS_TBAT (1<<4) /* Battery over/under temperature status */ -#define STATUS_VBATMON (1<<5) /* VBATMON comparison status */ -#define STATUS_VBATMONTXON (1<<6) /* VBATMONTXON comparison status */ -#define STATUS_CHIOVER (1<<7) /* Charge overcurrent */ - -#define SYS_CONTROL_A_SLEEP_N_PIN_ENABLE 0x1 -#define SYS_CONTROL_A_SHUT_DOWN (1<<1) -#define SYS_CONTROL_A_HWRES_ENABLE (1<<2) -#define SYS_CONTROL_A_WDOG_ACTION (1<<3) -#define SYS_CONTROL_A_WATCHDOG (1<<7) - -#define MISC_CONTROLB_USB_INT_RISING (1<<2) -#define MISC_CONTROLB_SESSION_VALID_EN (1<<3) - -#define USB_PUMP_USBVE (1<<0) -#define USB_PUMP_USBVEP (1<<1) -#define USB_PUMP_SRP_DETECT (1<<2) -#define USB_PUMP_SESSION_VALID (1<<3) -#define USB_PUMP_VBUS_VALID_4_0 (1<<4) -#define USB_PUMP_VBUS_VALID_4_4 (1<<5) -#define USB_PUMP_EN_USBVE (1<<6) -#define USB_PUMP_EN_USBVEP (1<<7) diff --git a/include/dm9161.h b/include/dm9161.h deleted file mode 100644 index bd85e4287e..0000000000 --- a/include/dm9161.h +++ /dev/null @@ -1,127 +0,0 @@ -/* - * NOTE: DAVICOM ethernet Physical layer - * - * Version: @(#)DM9161.h 1.0.0 01/10/2001 - * - * Authors: ATMEL Rousset - * - * - * SPDX-License-Identifier: GPL-2.0+ - */ - - -/* DAVICOM PHYSICAL LAYER TRANSCEIVER DM9161 */ - -#define DM9161_BMCR 0 /* Basic Mode Control Register */ -#define DM9161_BMSR 1 /* Basic Mode Status Register */ -#define DM9161_PHYID1 2 /* PHY Idendifier Register 1 */ -#define DM9161_PHYID2 3 /* PHY Idendifier Register 2 */ -#define DM9161_ANAR 4 /* Auto_Negotiation Advertisement Register */ -#define DM9161_ANLPAR 5 /* Auto_negotiation Link Partner Ability Register */ -#define DM9161_ANER 6 /* Auto-negotiation Expansion Register */ -#define DM9161_DSCR 16 /* Specified Configuration Register */ -#define DM9161_DSCSR 17 /* Specified Configuration and Status Register */ -#define DM9161_10BTCSR 18 /* 10BASE-T Configuration and Satus Register */ -#define DM9161_MDINTR 21 /* Specified Interrupt Register */ -#define DM9161_RECR 22 /* Specified Receive Error Counter Register */ -#define DM9161_DISCR 23 /* Specified Disconnect Counter Register */ -#define DM9161_RLSR 24 /* Hardware Reset Latch State Register */ - - -/* --Bit definitions: DM9161_BMCR */ -#define DM9161_RESET (1 << 15) /* 1= Software Reset; 0=Normal Operation */ -#define DM9161_LOOPBACK (1 << 14) /* 1=loopback Enabled; 0=Normal Operation */ -#define DM9161_SPEED_SELECT (1 << 13) /* 1=100Mbps; 0=10Mbps */ -#define DM9161_AUTONEG (1 << 12) -#define DM9161_POWER_DOWN (1 << 11) -#define DM9161_ISOLATE (1 << 10) -#define DM9161_RESTART_AUTONEG (1 << 9) -#define DM9161_DUPLEX_MODE (1 << 8) -#define DM9161_COLLISION_TEST (1 << 7) - -/*--Bit definitions: DM9161_BMSR */ -#define DM9161_100BASE_TX (1 << 15) -#define DM9161_100BASE_TX_FD (1 << 14) -#define DM9161_100BASE_TX_HD (1 << 13) -#define DM9161_10BASE_T_FD (1 << 12) -#define DM9161_10BASE_T_HD (1 << 11) -#define DM9161_MF_PREAMB_SUPPR (1 << 6) -#define DM9161_AUTONEG_COMP (1 << 5) -#define DM9161_REMOTE_FAULT (1 << 4) -#define DM9161_AUTONEG_ABILITY (1 << 3) -#define DM9161_LINK_STATUS (1 << 2) -#define DM9161_JABBER_DETECT (1 << 1) -#define DM9161_EXTEND_CAPAB (1 << 0) - -/*--definitions: DM9161_PHYID1 */ -#define DM9161_PHYID1_OUI 0x606E -#define DM9161_LSB_MASK 0x3F - -/*--Bit definitions: DM9161_ANAR, DM9161_ANLPAR */ -#define DM9161_NP (1 << 15) -#define DM9161_ACK (1 << 14) -#define DM9161_RF (1 << 13) -#define DM9161_FCS (1 << 10) -#define DM9161_T4 (1 << 9) -#define DM9161_TX_FDX (1 << 8) -#define DM9161_TX_HDX (1 << 7) -#define DM9161_10_FDX (1 << 6) -#define DM9161_10_HDX (1 << 5) -#define DM9161_AN_IEEE_802_3 0x0001 - -/*--Bit definitions: DM9161_ANER */ -#define DM9161_PDF (1 << 4) -#define DM9161_LP_NP_ABLE (1 << 3) -#define DM9161_NP_ABLE (1 << 2) -#define DM9161_PAGE_RX (1 << 1) -#define DM9161_LP_AN_ABLE (1 << 0) - -/*--Bit definitions: DM9161_DSCR */ -#define DM9161_BP4B5B (1 << 15) -#define DM9161_BP_SCR (1 << 14) -#define DM9161_BP_ALIGN (1 << 13) -#define DM9161_BP_ADPOK (1 << 12) -#define DM9161_REPEATER (1 << 11) -#define DM9161_TX (1 << 10) -#define DM9161_RMII_ENABLE (1 << 8) -#define DM9161_F_LINK_100 (1 << 7) -#define DM9161_SPLED_CTL (1 << 6) -#define DM9161_COLLED_CTL (1 << 5) -#define DM9161_RPDCTR_EN (1 << 4) -#define DM9161_SM_RST (1 << 3) -#define DM9161_MFP SC (1 << 2) -#define DM9161_SLEEP (1 << 1) -#define DM9161_RLOUT (1 << 0) - -/*--Bit definitions: DM9161_DSCSR */ -#define DM9161_100FDX (1 << 15) -#define DM9161_100HDX (1 << 14) -#define DM9161_10FDX (1 << 13) -#define DM9161_10HDX (1 << 12) - -/*--Bit definitions: DM9161_10BTCSR */ -#define DM9161_LP_EN (1 << 14) -#define DM9161_HBE (1 << 13) -#define DM9161_SQUELCH (1 << 12) -#define DM9161_JABEN (1 << 11) -#define DM9161_10BT_SER (1 << 10) -#define DM9161_POLR (1 << 0) - - -/*--Bit definitions: DM9161_MDINTR */ -#define DM9161_INTR_PEND (1 << 15) -#define DM9161_FDX_MASK (1 << 11) -#define DM9161_SPD_MASK (1 << 10) -#define DM9161_LINK_MASK (1 << 9) -#define DM9161_INTR_MASK (1 << 8) -#define DM9161_FDX_CHANGE (1 << 4) -#define DM9161_SPD_CHANGE (1 << 3) -#define DM9161_LINK_CHANGE (1 << 2) -#define DM9161_INTR_STATUS (1 << 0) - - -/****************** function prototypes **********************/ -unsigned int dm9161_IsPhyConnected(AT91PS_EMAC p_mac); -unsigned char dm9161_GetLinkSpeed(AT91PS_EMAC p_mac); -unsigned char dm9161_AutoNegotiate(AT91PS_EMAC p_mac, int *status); -unsigned char dm9161_InitPhy(AT91PS_EMAC p_mac); diff --git a/include/faraday/ftsdc021.h b/include/faraday/ftsdc021.h deleted file mode 100644 index de8e250839..0000000000 --- a/include/faraday/ftsdc021.h +++ /dev/null @@ -1,13 +0,0 @@ -/* - * (C) Copyright 2013 Faraday Technology - * Dante Su - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __FTSDC021_H -#define __FTSDC021_H - -int ftsdc021_sdhci_init(u32 regbase); - -#endif /* __FTSDC021_H */ diff --git a/include/ks8721.h b/include/ks8721.h deleted file mode 100644 index 90ed178087..0000000000 --- a/include/ks8721.h +++ /dev/null @@ -1,75 +0,0 @@ -/* - * NOTE: MICREL ethernet Physical layer - * - * Version: KS8721.h - * - * Authors: Eric Benard (based on dm9161.h) - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -/* MICREL PHYSICAL LAYER TRANSCEIVER KS8721 */ - -#define KS8721_BMCR 0 -#define KS8721_BMSR 1 -#define KS8721_PHYID1 2 -#define KS8721_PHYID2 3 -#define KS8721_ANAR 4 -#define KS8721_ANLPAR 5 -#define KS8721_ANER 6 -#define KS8721_RECR 15 -#define KS8721_MDINTR 27 -#define KS8721_100BT 31 - -/* --Bit definitions: KS8721_BMCR */ -#define KS8721_RESET (1 << 15) -#define KS8721_LOOPBACK (1 << 14) -#define KS8721_SPEED_SELECT (1 << 13) -#define KS8721_AUTONEG (1 << 12) -#define KS8721_POWER_DOWN (1 << 11) -#define KS8721_ISOLATE (1 << 10) -#define KS8721_RESTART_AUTONEG (1 << 9) -#define KS8721_DUPLEX_MODE (1 << 8) -#define KS8721_COLLISION_TEST (1 << 7) -#define KS8721_DISABLE (1 << 0) - -/*--Bit definitions: KS8721_BMSR */ -#define KS8721_100BASE_T4 (1 << 15) -#define KS8721_100BASE_TX_FD (1 << 14) -#define KS8721_100BASE_T4_HD (1 << 13) -#define KS8721_10BASE_T_FD (1 << 12) -#define KS8721_10BASE_T_HD (1 << 11) -#define KS8721_MF_PREAMB_SUPPR (1 << 6) -#define KS8721_AUTONEG_COMP (1 << 5) -#define KS8721_REMOTE_FAULT (1 << 4) -#define KS8721_AUTONEG_ABILITY (1 << 3) -#define KS8721_LINK_STATUS (1 << 2) -#define KS8721_JABBER_DETECT (1 << 1) -#define KS8721_EXTEND_CAPAB (1 << 0) - -/*--Bit definitions: KS8721_PHYID */ -#define KS8721_PHYID_OUI 0x0885 -#define KS8721_LSB_MASK 0x3F - -#define KS8721BL_MODEL 0x21 -#define KS8721_MODELMASK 0x3F0 -#define KS8721BL_REV 0x9 -#define KS8721_REVMASK 0xF - -/*--Bit definitions: KS8721_ANAR, KS8721_ANLPAR */ -#define KS8721_NP (1 << 15) -#define KS8721_ACK (1 << 14) -#define KS8721_RF (1 << 13) -#define KS8721_PAUSE (1 << 10) -#define KS8721_T4 (1 << 9) -#define KS8721_TX_FDX (1 << 8) -#define KS8721_TX_HDX (1 << 7) -#define KS8721_10_FDX (1 << 6) -#define KS8721_10_HDX (1 << 5) -#define KS8721_AN_IEEE_802_3 0x0001 - -/****************** function prototypes **********************/ -unsigned int ks8721_isphyconnected(AT91PS_EMAC p_mac); -unsigned char ks8721_getlinkspeed(AT91PS_EMAC p_mac); -unsigned char ks8721_autonegotiate(AT91PS_EMAC p_mac, int *status); -unsigned char ks8721_initphy(AT91PS_EMAC p_mac); diff --git a/include/linux/mtd/inftl-user.h b/include/linux/mtd/inftl-user.h deleted file mode 100644 index 45220ed76f..0000000000 --- a/include/linux/mtd/inftl-user.h +++ /dev/null @@ -1,89 +0,0 @@ -/* - * $Id: inftl-user.h,v 1.2 2005/11/07 11:14:56 gleixner Exp $ - * - * Parts of INFTL headers shared with userspace - * - */ - -#ifndef __MTD_INFTL_USER_H__ -#define __MTD_INFTL_USER_H__ - -#define OSAK_VERSION 0x5120 -#define PERCENTUSED 98 - -#define SECTORSIZE 512 - -/* Block Control Information */ - -struct inftl_bci { - uint8_t ECCsig[6]; - uint8_t Status; - uint8_t Status1; -} __attribute__((packed)); - -struct inftl_unithead1 { - uint16_t virtualUnitNo; - uint16_t prevUnitNo; - uint8_t ANAC; - uint8_t NACs; - uint8_t parityPerField; - uint8_t discarded; -} __attribute__((packed)); - -struct inftl_unithead2 { - uint8_t parityPerField; - uint8_t ANAC; - uint16_t prevUnitNo; - uint16_t virtualUnitNo; - uint8_t NACs; - uint8_t discarded; -} __attribute__((packed)); - -struct inftl_unittail { - uint8_t Reserved[4]; - uint16_t EraseMark; - uint16_t EraseMark1; -} __attribute__((packed)); - -union inftl_uci { - struct inftl_unithead1 a; - struct inftl_unithead2 b; - struct inftl_unittail c; -}; - -struct inftl_oob { - struct inftl_bci b; - union inftl_uci u; -}; - - -/* INFTL Media Header */ - -struct INFTLPartition { - __u32 virtualUnits; - __u32 firstUnit; - __u32 lastUnit; - __u32 flags; - __u32 spareUnits; - __u32 Reserved0; - __u32 Reserved1; -} __attribute__((packed)); - -struct INFTLMediaHeader { - char bootRecordID[8]; - __u32 NoOfBootImageBlocks; - __u32 NoOfBinaryPartitions; - __u32 NoOfBDTLPartitions; - __u32 BlockMultiplierBits; - __u32 FormatFlags; - __u32 OsakVersion; - __u32 PercentUsed; - struct INFTLPartition Partitions[4]; -} __attribute__((packed)); - -/* Partition flag types */ -#define INFTL_BINARY 0x20000000 -#define INFTL_BDTL 0x40000000 -#define INFTL_LAST 0x80000000 - -#endif /* __MTD_INFTL_USER_H__ */ diff --git a/include/linux/mtd/jffs2-user.h b/include/linux/mtd/jffs2-user.h deleted file mode 100644 index d508ef0ae0..0000000000 --- a/include/linux/mtd/jffs2-user.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * $Id: jffs2-user.h,v 1.1 2004/05/05 11:57:54 dwmw2 Exp $ - * - * JFFS2 definitions for use in user space only - */ - -#ifndef __JFFS2_USER_H__ -#define __JFFS2_USER_H__ - -/* This file is blessed for inclusion by userspace */ -#include -#include -#include - -#undef cpu_to_je16 -#undef cpu_to_je32 -#undef cpu_to_jemode -#undef je16_to_cpu -#undef je32_to_cpu -#undef jemode_to_cpu - -extern int target_endian; - -#define t16(x) ({ uint16_t __b = (x); (target_endian==__BYTE_ORDER)?__b:bswap_16(__b); }) -#define t32(x) ({ uint32_t __b = (x); (target_endian==__BYTE_ORDER)?__b:bswap_32(__b); }) - -#define cpu_to_je16(x) ((jint16_t){t16(x)}) -#define cpu_to_je32(x) ((jint32_t){t32(x)}) -#define cpu_to_jemode(x) ((jmode_t){t32(x)}) - -#define je16_to_cpu(x) (t16((x).v16)) -#define je32_to_cpu(x) (t32((x).v32)) -#define jemode_to_cpu(x) (t32((x).m)) - -#endif /* __JFFS2_USER_H__ */ diff --git a/include/smiLynxEM.h b/include/smiLynxEM.h deleted file mode 100644 index c020115f86..0000000000 --- a/include/smiLynxEM.h +++ /dev/null @@ -1,163 +0,0 @@ -/* - * (C) Copyright 1997-2002 ELTEC Elektronik AG - * Frank Gottschling - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -/* - * smiLynxEM.h - * Silicon Motion graphic interface for sm810/sm710/sm712 accelerator - * - * - * modification history - * -------------------- - * 04-18-2002 Rewritten for U-Boot . - */ - -#ifndef _SMI_LYNX_EM_H_ -#define _SMI_LYNX_EM_H_ - -/* - * SMI 710/712 have 4MB internal RAM; SMI 810 2MB internal + 2MB external - */ -#define VIDEO_MEM_SIZE 0x400000 - -/* - * Supported video modes for SMI Lynx E/EM/EM+ - */ -#define VIDEO_MODES 7 -#define DUAL_800_600 0 /* SMI710:VGA1:75Hz (pitch=1600) */ - /* VGA2:60/120Hz (pitch=1600) */ - /* SMI810:VGA1:75Hz (pitch=1600) */ - /* VGA2:75Hz (pitch=1600) */ -#define DUAL_1024_768 1 /* VGA1:75Hz VGA2:73Hz (pitch=2048) */ -#define SINGLE_800_600 2 /* VGA1:75Hz (pitch=800) */ -#define SINGLE_1024_768 3 /* VGA1:75Hz (pitch=1024) */ -#define SINGLE_1280_1024 4 /* VGA1:75Hz (pitch=1280) */ -#define TV_MODE_CCIR 5 /* VGA1:50Hz (h=720;v=576;pitch=720) */ -#define TV_MODE_EIA 6 /* VGA1:60Hz (h=720;v=484;pitch=720) */ - - -/* - * ISA mapped regs - */ -#define SMI_INDX_C4 (pGD->isaBase + 0x03c4) /* index reg */ -#define SMI_DATA_C5 (pGD->isaBase + 0x03c5) /* data reg */ -#define SMI_INDX_D4 (pGD->isaBase + 0x03d4) /* index reg */ -#define SMI_DATA_D5 (pGD->isaBase + 0x03d5) /* data reg */ -#define SMI_INDX_CE (pGD->isaBase + 0x03ce) /* index reg */ -#define SMI_DATA_CF (pGD->isaBase + 0x03cf) /* data reg */ -#define SMI_LOCK_REG (pGD->isaBase + 0x03c3) /* unlock/lock ext crt reg */ -#define SMI_MISC_REG (pGD->isaBase + 0x03c2) /* misc reg */ -#define SMI_LUT_MASK (pGD->isaBase + 0x03c6) /* lut mask reg */ -#define SMI_LUT_START (pGD->isaBase + 0x03c8) /* lut start index */ -#define SMI_LUT_RGB (pGD->isaBase + 0x03c9) /* lut colors auto incr.*/ - - -/* - * Video processor control - */ -typedef struct { - unsigned int control; - unsigned int colorKey; - unsigned int colorKeyMask; - unsigned int start; - unsigned short offset; - unsigned short width; - unsigned int fifoPrio; - unsigned int fifoERL; - unsigned int YUVtoRGB; -} SmiVideoProc; - -/* - * Video window control - */ -typedef struct { - unsigned short top; - unsigned short left; - unsigned short bottom; - unsigned short right; - unsigned int srcStart; - unsigned short width; - unsigned short offset; - unsigned char hStretch; - unsigned char vStretch; -} SmiVideoWin; - -/* - * Capture port control - */ -typedef struct { - unsigned int control; - unsigned short topClip; - unsigned short leftClip; - unsigned short srcHeight; - unsigned short srcWidth; - unsigned int srcBufStart1; - unsigned int srcBufStart2; - unsigned short srcOffset; - unsigned short fifoControl; -} SmiCapturePort; - - -/******************************************************************************/ -/* Export Graphic Driver Control */ -/******************************************************************************/ - -typedef struct { - unsigned int isaBase; - unsigned int pciBase; - unsigned int dprBase; - unsigned int vprBase; - unsigned int cprBase; - unsigned int frameAdrs; - unsigned int memSize; - unsigned int mode; - unsigned int gdfIndex; - unsigned int gdfBytesPP; - unsigned int fg; - unsigned int bg; - unsigned int plnSizeX; - unsigned int plnSizeY; - unsigned int winSizeX; - unsigned int winSizeY; - char modeIdent[80]; -} GraphicDevice; - -extern GraphicDevice smi; - - -/******************************************************************************/ -/* Export Graphic Functions */ -/******************************************************************************/ - -void *video_hw_init (void); /* returns GraphicDevice struct or NULL */ - -void video_hw_bitblt ( - unsigned int bpp, /* bytes per pixel */ - unsigned int src_x, /* source pos x */ - unsigned int src_y, /* source pos y */ - unsigned int dst_x, /* dest pos x */ - unsigned int dst_y, /* dest pos y */ - unsigned int dim_x, /* frame width */ - unsigned int dim_y /* frame height */ - ); - -void video_hw_rectfill ( - unsigned int bpp, /* bytes per pixel */ - unsigned int dst_x, /* dest pos x */ - unsigned int dst_y, /* dest pos y */ - unsigned int dim_x, /* frame width */ - unsigned int dim_y, /* frame height */ - unsigned int color /* fill color */ - ); - -void video_set_lut ( - unsigned int index, /* color number */ - unsigned char r, /* red */ - unsigned char g, /* green */ - unsigned char b /* blue */ - ); - -#endif /*_SMI_LYNX_EM_H_ */ -- cgit v1.2.1 From 1a0afe1fad4cc1941cae681e6036ea7a576a833e Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 14 Jan 2014 17:24:35 +0900 Subject: powerpc: ppc4xx: remove redundant CONFIG_4xx definition We do not have to define CONFIG_4xx in board config headers because it is defined in arch/powerpc/cpu/ppc4xx/config.mk. include/configs/JSE.h defines "CONFIG_4x", not "CONFIG_4xx". I believe it is a typo because "CONFIG_4x" is not used at all in other files. So, I also deleted "CONFIG_4x" in include/configs/JSE.h. Signed-off-by: Masahiro Yamada --- include/configs/APC405.h | 1 - include/configs/AR405.h | 1 - include/configs/ASH405.h | 1 - include/configs/CATcenter.h | 1 - include/configs/CMS700.h | 1 - include/configs/CPCI2DP.h | 1 - include/configs/CPCI405.h | 1 - include/configs/CPCI4052.h | 1 - include/configs/CPCI405AB.h | 1 - include/configs/CPCI405DT.h | 1 - include/configs/CPCIISER4.h | 1 - include/configs/CRAYL1.h | 1 - include/configs/DP405.h | 1 - include/configs/DU405.h | 1 - include/configs/DU440.h | 1 - include/configs/G2000.h | 1 - include/configs/HH405.h | 1 - include/configs/HUB405.h | 1 - include/configs/JSE.h | 2 -- include/configs/KAREF.h | 1 - include/configs/METROBOX.h | 1 - include/configs/MIP405.h | 1 - include/configs/OCRTC.h | 1 - include/configs/PCI405.h | 1 - include/configs/PIP405.h | 1 - include/configs/PLU405.h | 1 - include/configs/PMC405.h | 1 - include/configs/PMC405DE.h | 1 - include/configs/PMC440.h | 1 - include/configs/PPChameleonEVB.h | 1 - include/configs/VOH405.h | 1 - include/configs/VOM405.h | 1 - include/configs/W7OLMC.h | 1 - include/configs/W7OLMG.h | 1 - include/configs/WUH405.h | 1 - include/configs/acadia.h | 1 - include/configs/alpr.h | 1 - include/configs/bamboo.h | 1 - include/configs/bluestone.h | 1 - include/configs/bubinga.h | 1 - include/configs/canyonlands.h | 1 - include/configs/csb272.h | 1 - include/configs/csb472.h | 1 - include/configs/dlvision-10g.h | 1 - include/configs/dlvision.h | 1 - include/configs/ebony.h | 1 - include/configs/gdppc440etx.h | 1 - include/configs/icon.h | 1 - include/configs/intip.h | 1 - include/configs/io.h | 1 - include/configs/io64.h | 1 - include/configs/iocon.h | 1 - include/configs/katmai.h | 1 - include/configs/kilauea.h | 1 - include/configs/korat.h | 1 - include/configs/luan.h | 1 - include/configs/lwmon5.h | 1 - include/configs/makalu.h | 1 - include/configs/neo.h | 1 - include/configs/ocotea.h | 1 - include/configs/p3p440.h | 1 - include/configs/pcs440ep.h | 1 - include/configs/quad100hd.h | 1 - include/configs/redwood.h | 1 - include/configs/sbc405.h | 1 - include/configs/sc3.h | 1 - include/configs/sequoia.h | 1 - include/configs/t3corp.h | 1 - include/configs/taihu.h | 1 - include/configs/taishan.h | 1 - include/configs/walnut.h | 1 - include/configs/xilinx-ppc405.h | 1 - include/configs/xilinx-ppc440.h | 1 - include/configs/xpedite1000.h | 1 - include/configs/yosemite.h | 1 - include/configs/yucca.h | 1 - include/configs/zeus.h | 1 - 77 files changed, 78 deletions(-) (limited to 'include') diff --git a/include/configs/APC405.h b/include/configs/APC405.h index afc9ae885f..2678f50bbb 100644 --- a/include/configs/APC405.h +++ b/include/configs/APC405.h @@ -19,7 +19,6 @@ * (easy to change) */ #define CONFIG_405GP 1 /* This is a PPC405 CPU */ -#define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_APCG405 1 /* ...on a APC405 board */ #define CONFIG_SYS_TEXT_BASE 0xFFF80000 diff --git a/include/configs/AR405.h b/include/configs/AR405.h index a4bd4b1d6a..45dd46a41e 100644 --- a/include/configs/AR405.h +++ b/include/configs/AR405.h @@ -18,7 +18,6 @@ */ #define CONFIG_405GP 1 /* This is a PPC405GP CPU */ -#define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_AR405 1 /* ...on a AR405 board */ #define CONFIG_SYS_TEXT_BASE 0xFFFA0000 diff --git a/include/configs/ASH405.h b/include/configs/ASH405.h index 2f5340723d..2ff9b598c5 100644 --- a/include/configs/ASH405.h +++ b/include/configs/ASH405.h @@ -18,7 +18,6 @@ */ #define CONFIG_405EP 1 /* This is a PPC405 CPU */ -#define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_ASH405 1 /* ...on a ASH405 board */ #define CONFIG_SYS_TEXT_BASE 0xFFFC0000 diff --git a/include/configs/CATcenter.h b/include/configs/CATcenter.h index ba5dba55aa..27539d27d7 100644 --- a/include/configs/CATcenter.h +++ b/include/configs/CATcenter.h @@ -59,7 +59,6 @@ */ #define CONFIG_405EP 1 /* This is a PPC405 CPU */ -#define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_PPCHAMELEONEVB 1 /* ...on a PPChameleonEVB board */ #define CONFIG_SYS_TEXT_BASE 0xFFFB0000 /* Reserve 320 kB for Monitor */ diff --git a/include/configs/CMS700.h b/include/configs/CMS700.h index 0bb22be9f3..5b872f61a0 100644 --- a/include/configs/CMS700.h +++ b/include/configs/CMS700.h @@ -18,7 +18,6 @@ */ #define CONFIG_405EP 1 /* This is a PPC405 CPU */ -#define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_VOM405 1 /* ...on a VOM405 board */ #define CONFIG_SYS_TEXT_BASE 0xFFFC8000 diff --git a/include/configs/CPCI2DP.h b/include/configs/CPCI2DP.h index 85720a503c..05106cde90 100644 --- a/include/configs/CPCI2DP.h +++ b/include/configs/CPCI2DP.h @@ -18,7 +18,6 @@ */ #define CONFIG_405GP 1 /* This is a PPC405 CPU */ -#define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_SYS_TEXT_BASE 0xFFFC0000 diff --git a/include/configs/CPCI405.h b/include/configs/CPCI405.h index 793ee752d6..34252d4d3b 100644 --- a/include/configs/CPCI405.h +++ b/include/configs/CPCI405.h @@ -18,7 +18,6 @@ */ #define CONFIG_405GP 1 /* This is a PPC405 CPU */ -#define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_CPCI405 1 /* ...on a CPCI405 board */ #define CONFIG_SYS_TEXT_BASE 0xFFFC0000 diff --git a/include/configs/CPCI4052.h b/include/configs/CPCI4052.h index 53cf498dbe..bf85439802 100644 --- a/include/configs/CPCI4052.h +++ b/include/configs/CPCI4052.h @@ -18,7 +18,6 @@ */ #define CONFIG_405GP 1 /* This is a PPC405 CPU */ -#define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_CPCI405 1 /* ...on a CPCI405 board */ #define CONFIG_CPCI405_VER2 1 /* ...version 2 */ #undef CONFIG_CPCI405_6U /* enable this for 6U boards */ diff --git a/include/configs/CPCI405AB.h b/include/configs/CPCI405AB.h index ce310323f6..7d58e9d13f 100644 --- a/include/configs/CPCI405AB.h +++ b/include/configs/CPCI405AB.h @@ -18,7 +18,6 @@ */ #define CONFIG_405GP 1 /* This is a PPC405 CPU */ -#define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_CPCI405 1 /* ...on a CPCI405 board */ #define CONFIG_CPCI405_VER2 1 /* ...version 2 */ #define CONFIG_CPCI405AB 1 /* ...and special AB version */ diff --git a/include/configs/CPCI405DT.h b/include/configs/CPCI405DT.h index f09fcb0d4b..c2598a3026 100644 --- a/include/configs/CPCI405DT.h +++ b/include/configs/CPCI405DT.h @@ -18,7 +18,6 @@ */ #define CONFIG_405GP 1 /* This is a PPC405 CPU */ -#define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_CPCI405 1 /* ...on a CPCI405 board */ #define CONFIG_CPCI405_VER2 1 /* ...version 2 */ diff --git a/include/configs/CPCIISER4.h b/include/configs/CPCIISER4.h index ae36411dd2..25365f747c 100644 --- a/include/configs/CPCIISER4.h +++ b/include/configs/CPCIISER4.h @@ -18,7 +18,6 @@ */ #define CONFIG_405GP 1 /* This is a PPC405 CPU */ -#define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_CPCIISER4 1 /* ...on a CPCIISER4 board */ #define CONFIG_SYS_TEXT_BASE 0xFFFC0000 diff --git a/include/configs/CRAYL1.h b/include/configs/CRAYL1.h index a4ce6c389f..788fa0f91c 100644 --- a/include/configs/CRAYL1.h +++ b/include/configs/CRAYL1.h @@ -19,7 +19,6 @@ */ #define CONFIG_405GP 1 /* This is a PPC405 CPU */ -#define CONFIG_4xx 1 /* ...member of PPC405 family */ /* * Note: I make an "image" from U-Boot itself, which prefixes 0x40 diff --git a/include/configs/DP405.h b/include/configs/DP405.h index 74e79e23e6..68e4a7f405 100644 --- a/include/configs/DP405.h +++ b/include/configs/DP405.h @@ -18,7 +18,6 @@ */ #define CONFIG_405EP 1 /* This is a PPC405 CPU */ -#define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_DP405 1 /* ...on a DP405 board */ #define CONFIG_SYS_TEXT_BASE 0xFFFD0000 diff --git a/include/configs/DU405.h b/include/configs/DU405.h index 433077d5af..9be2310dbd 100644 --- a/include/configs/DU405.h +++ b/include/configs/DU405.h @@ -17,7 +17,6 @@ * (easy to change) */ #define CONFIG_405GP 1 /* This is a PPC405 CPU */ -#define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_DU405 1 /* ...on a DU405 board */ #define CONFIG_SYS_TEXT_BASE 0xFFFD0000 diff --git a/include/configs/DU440.h b/include/configs/DU440.h index 71be1224f1..be5494b2ec 100644 --- a/include/configs/DU440.h +++ b/include/configs/DU440.h @@ -21,7 +21,6 @@ */ #define CONFIG_DU440 1 /* Board is esd DU440 */ #define CONFIG_440EPX 1 /* Specific PPC440EPx */ -#define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_SYS_CLK_FREQ 33333400 /* external freq to pll */ #ifndef CONFIG_SYS_TEXT_BASE diff --git a/include/configs/G2000.h b/include/configs/G2000.h index 5c537ced94..0c66092e0b 100644 --- a/include/configs/G2000.h +++ b/include/configs/G2000.h @@ -18,7 +18,6 @@ */ #define CONFIG_405EP 1 /* This is a PPC405 CPU */ -#define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_G2000 1 /* ...on a PLU405 board */ #define CONFIG_SYS_TEXT_BASE 0xFFFC0000 diff --git a/include/configs/HH405.h b/include/configs/HH405.h index 26b3bdf4d0..033dcbfe26 100644 --- a/include/configs/HH405.h +++ b/include/configs/HH405.h @@ -24,7 +24,6 @@ */ #define CONFIG_405EP 1 /* This is a PPC405 CPU */ -#define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_HH405 1 /* ...on a HH405 board */ #define CONFIG_SYS_TEXT_BASE 0xFFF80000 diff --git a/include/configs/HUB405.h b/include/configs/HUB405.h index 5e1665374c..1783b9ff15 100644 --- a/include/configs/HUB405.h +++ b/include/configs/HUB405.h @@ -18,7 +18,6 @@ */ #define CONFIG_405EP 1 /* This is a PPC405 CPU */ -#define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_HUB405 1 /* ...on a HUB405 board */ #define CONFIG_SYS_TEXT_BASE 0xFFFC0000 diff --git a/include/configs/JSE.h b/include/configs/JSE.h index 5738ea97ad..5cc25576ae 100644 --- a/include/configs/JSE.h +++ b/include/configs/JSE.h @@ -20,8 +20,6 @@ #define CONFIG_JSE 1 /* JSE has a PPC405GPr */ #define CONFIG_405GP 1 - /* ... which is a 4xxx series */ -#define CONFIG_4x 1 /* ... with a 33MHz OSC. connected to the SysCLK input */ #define CONFIG_SYS_CLK_FREQ 33333333 /* ... with on-chip memory here (4KBytes) */ diff --git a/include/configs/KAREF.h b/include/configs/KAREF.h index 39eb2ef133..546b725317 100644 --- a/include/configs/KAREF.h +++ b/include/configs/KAREF.h @@ -23,7 +23,6 @@ #define CONFIG_KAREF 1 /* Board is Kamino Ref Variant */ #define CONFIG_440GX 1 /* Specifc GX support */ #define CONFIG_440 1 /* ... PPC440 family */ -#define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */ #define CONFIG_MISC_INIT_F 1 /* Call board misc_init_f */ #define CONFIG_MISC_INIT_R 1 /* Call board misc_init_r */ diff --git a/include/configs/METROBOX.h b/include/configs/METROBOX.h index 67154353d3..69ab5bb517 100644 --- a/include/configs/METROBOX.h +++ b/include/configs/METROBOX.h @@ -89,7 +89,6 @@ #define CONFIG_METROBOX 1 /* Board is Metrobox */ #define CONFIG_440GX 1 /* Specifc GX support */ #define CONFIG_440 1 /* ... PPC440 family */ -#define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */ #define CONFIG_MISC_INIT_F 1 /* Call board misc_init_f */ #define CONFIG_MISC_INIT_R 1 /* Call board misc_init_r */ diff --git a/include/configs/MIP405.h b/include/configs/MIP405.h index 6042a1e3c4..68824fd2d4 100644 --- a/include/configs/MIP405.h +++ b/include/configs/MIP405.h @@ -17,7 +17,6 @@ * (easy to change) ***********************************************************/ #define CONFIG_405GP 1 /* This is a PPC405 CPU */ -#define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_MIP405 1 /* ...on a MIP405 board */ #define CONFIG_SYS_TEXT_BASE 0xFFF80000 diff --git a/include/configs/OCRTC.h b/include/configs/OCRTC.h index 7baba93c82..4680afee07 100644 --- a/include/configs/OCRTC.h +++ b/include/configs/OCRTC.h @@ -18,7 +18,6 @@ */ #define CONFIG_405GP 1 /* This is a PPC405 CPU */ -#define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_OCRTC 1 /* ...on a OCRTC board */ #define CONFIG_SYS_TEXT_BASE 0xFFFD0000 diff --git a/include/configs/PCI405.h b/include/configs/PCI405.h index 3b5c73e9f7..0989407fc7 100644 --- a/include/configs/PCI405.h +++ b/include/configs/PCI405.h @@ -20,7 +20,6 @@ * (easy to change) */ #define CONFIG_405GP 1 /* This is a PPC405 CPU */ -#define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_PCI405 1 /* ...on a PCI405 board */ #define CONFIG_SYS_TEXT_BASE 0xFFFD0000 diff --git a/include/configs/PIP405.h b/include/configs/PIP405.h index 29888b4e1c..a6f505aaa9 100644 --- a/include/configs/PIP405.h +++ b/include/configs/PIP405.h @@ -17,7 +17,6 @@ * (easy to change) ***********************************************************/ #define CONFIG_405GP 1 /* This is a PPC405 CPU */ -#define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_PIP405 1 /* ...on a PIP405 board */ #define CONFIG_SYS_TEXT_BASE 0xFFF80000 diff --git a/include/configs/PLU405.h b/include/configs/PLU405.h index 947b3d857a..8705161158 100644 --- a/include/configs/PLU405.h +++ b/include/configs/PLU405.h @@ -18,7 +18,6 @@ */ #define CONFIG_405EP 1 /* This is a PPC405 CPU */ -#define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_PLU405 1 /* ...on a PLU405 board */ #define CONFIG_SYS_TEXT_BASE 0xFFF80000 diff --git a/include/configs/PMC405.h b/include/configs/PMC405.h index 9fab4b2c7d..c68d9a6ec6 100644 --- a/include/configs/PMC405.h +++ b/include/configs/PMC405.h @@ -13,7 +13,6 @@ */ #define CONFIG_405GP 1 /* This is a PPC405 CPU */ -#define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_PMC405 1 /* ...on a PMC405 board */ #define CONFIG_SYS_TEXT_BASE 0xFFF80000 diff --git a/include/configs/PMC405DE.h b/include/configs/PMC405DE.h index 0984095332..94b95475a8 100644 --- a/include/configs/PMC405DE.h +++ b/include/configs/PMC405DE.h @@ -9,7 +9,6 @@ #define __CONFIG_H #define CONFIG_405EP 1 /* This is a PPC405 CPU */ -#define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_PMC405DE 1 /* ...on a PMC405DE board */ #define CONFIG_SYS_TEXT_BASE 0xFFFC0000 diff --git a/include/configs/PMC440.h b/include/configs/PMC440.h index efe69601f3..fd39109daf 100644 --- a/include/configs/PMC440.h +++ b/include/configs/PMC440.h @@ -24,7 +24,6 @@ *----------------------------------------------------------------------*/ #define CONFIG_440EPX 1 /* Specific PPC440EPx */ #define CONFIG_440 1 /* ... PPC440 family */ -#define CONFIG_4xx 1 /* ... PPC4xx family */ #ifndef CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_TEXT_BASE 0xFFF90000 diff --git a/include/configs/PPChameleonEVB.h b/include/configs/PPChameleonEVB.h index 1b17afa61a..e277d0d933 100644 --- a/include/configs/PPChameleonEVB.h +++ b/include/configs/PPChameleonEVB.h @@ -59,7 +59,6 @@ */ #define CONFIG_405EP 1 /* This is a PPC405 CPU */ -#define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_PPCHAMELEONEVB 1 /* ...on a PPChameleonEVB board */ #define CONFIG_SYS_TEXT_BASE 0xFFFB0000 /* Reserve 320 kB for Monitor */ diff --git a/include/configs/VOH405.h b/include/configs/VOH405.h index 3d46afe4e8..d4a4b68c80 100644 --- a/include/configs/VOH405.h +++ b/include/configs/VOH405.h @@ -18,7 +18,6 @@ */ #define CONFIG_405EP 1 /* This is a PPC405 CPU */ -#define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_VOH405 1 /* ...on a VOH405 board */ #define CONFIG_SYS_TEXT_BASE 0xFFF80000 diff --git a/include/configs/VOM405.h b/include/configs/VOM405.h index 319a9a227d..c06897b893 100644 --- a/include/configs/VOM405.h +++ b/include/configs/VOM405.h @@ -16,7 +16,6 @@ * (easy to change) */ #define CONFIG_405EP 1 /* This is a PPC405 CPU */ -#define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_VOM405 1 /* ...on a VOM405 board */ #define CONFIG_SYS_TEXT_BASE 0xFFFC8000 diff --git a/include/configs/W7OLMC.h b/include/configs/W7OLMC.h index 00a24ab846..895ad4611b 100644 --- a/include/configs/W7OLMC.h +++ b/include/configs/W7OLMC.h @@ -18,7 +18,6 @@ */ #define CONFIG_405GP 1 /* This is a PPC405GP CPU */ -#define CONFIG_4xx 1 /* ...member of PPC405 family */ #define CONFIG_W7O 1 /* ...on a Wave 7 Optics board */ #define CONFIG_W7OLMC 1 /* ...specifically an LMC */ diff --git a/include/configs/W7OLMG.h b/include/configs/W7OLMG.h index 8ed2fa2d87..2a38116dd1 100644 --- a/include/configs/W7OLMG.h +++ b/include/configs/W7OLMG.h @@ -18,7 +18,6 @@ */ #define CONFIG_405GP 1 /* This is a PPC405GP CPU */ -#define CONFIG_4xx 1 /* ...member of PPC405 family */ #define CONFIG_W7O 1 /* ...on a Wave 7 Optics board */ #define CONFIG_W7OLMG 1 /* ...specifically an LMG */ diff --git a/include/configs/WUH405.h b/include/configs/WUH405.h index d2038e56d0..e4f0d19a41 100644 --- a/include/configs/WUH405.h +++ b/include/configs/WUH405.h @@ -19,7 +19,6 @@ #define CONFIG_IDENT_STRING " $Name: $" #define CONFIG_405EP 1 /* This is a PPC405 CPU */ -#define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_WUH405 1 /* ...on a WUH405 board */ #define CONFIG_SYS_TEXT_BASE 0xFFFC0000 diff --git a/include/configs/acadia.h b/include/configs/acadia.h index f23d549497..5f3b5f936f 100644 --- a/include/configs/acadia.h +++ b/include/configs/acadia.h @@ -16,7 +16,6 @@ * High Level Configuration Options *----------------------------------------------------------------------*/ #define CONFIG_ACADIA 1 /* Board is Acadia */ -#define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_405EZ 1 /* Specifc 405EZ support*/ #ifndef CONFIG_SYS_TEXT_BASE diff --git a/include/configs/alpr.h b/include/configs/alpr.h index 08bba36095..7849b222b0 100644 --- a/include/configs/alpr.h +++ b/include/configs/alpr.h @@ -14,7 +14,6 @@ #define CONFIG_ALPR 1 /* Board is ebony */ #define CONFIG_440GX 1 /* Specifc GX support */ #define CONFIG_440 1 /* ... PPC440 family */ -#define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */ #define CONFIG_LAST_STAGE_INIT 1 /* call last_stage_init() */ diff --git a/include/configs/bamboo.h b/include/configs/bamboo.h index 326e3d6692..97da1e9078 100644 --- a/include/configs/bamboo.h +++ b/include/configs/bamboo.h @@ -17,7 +17,6 @@ #define CONFIG_BAMBOO 1 /* Board is BAMBOO */ #define CONFIG_440EP 1 /* Specific PPC440EP support */ #define CONFIG_440 1 /* ... PPC440 family */ -#define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */ #ifndef CONFIG_SYS_TEXT_BASE diff --git a/include/configs/bluestone.h b/include/configs/bluestone.h index 33e04963e6..8bd71c6a15 100644 --- a/include/configs/bluestone.h +++ b/include/configs/bluestone.h @@ -16,7 +16,6 @@ #define CONFIG_APM821XX 1 /* APM821XX series */ #define CONFIG_HOSTNAME bluestone -#define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_440 1 #ifndef CONFIG_SYS_TEXT_BASE diff --git a/include/configs/bubinga.h b/include/configs/bubinga.h index 2b9c1c96e4..ea7b104729 100644 --- a/include/configs/bubinga.h +++ b/include/configs/bubinga.h @@ -18,7 +18,6 @@ */ #define CONFIG_405EP 1 /* This is a PPC405 CPU */ -#define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_BUBINGA 1 /* ...on a BUBINGA board */ #define CONFIG_SYS_TEXT_BASE 0xFFFC0000 diff --git a/include/configs/canyonlands.h b/include/configs/canyonlands.h index f6faeec06c..620a0f5c57 100644 --- a/include/configs/canyonlands.h +++ b/include/configs/canyonlands.h @@ -33,7 +33,6 @@ #endif #define CONFIG_440 1 -#define CONFIG_4xx 1 /* ... PPC4xx family */ #ifndef CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_TEXT_BASE 0xFFF80000 diff --git a/include/configs/csb272.h b/include/configs/csb272.h index 8a848bea8b..a5c6f8474b 100644 --- a/include/configs/csb272.h +++ b/include/configs/csb272.h @@ -18,7 +18,6 @@ */ #define CONFIG_405GP 1 /* This is a PPC405GP CPU */ -#define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_CSB272 1 /* on a Cogent CSB272 board */ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f() */ #define CONFIG_LAST_STAGE_INIT 1 /* Call last_stage_init() */ diff --git a/include/configs/csb472.h b/include/configs/csb472.h index 5c034175ce..6aa98efd4e 100644 --- a/include/configs/csb472.h +++ b/include/configs/csb472.h @@ -18,7 +18,6 @@ */ #define CONFIG_405GP 1 /* This is a PPC405GP CPU */ -#define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_CSB472 1 /* on a Cogent CSB472 board */ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f() */ #define CONFIG_LAST_STAGE_INIT 1 /* Call last_stage_init() */ diff --git a/include/configs/dlvision-10g.h b/include/configs/dlvision-10g.h index c527be4909..31fc65d196 100644 --- a/include/configs/dlvision-10g.h +++ b/include/configs/dlvision-10g.h @@ -9,7 +9,6 @@ #define __CONFIG_H #define CONFIG_405EP 1 /* this is a PPC405 CPU */ -#define CONFIG_4xx 1 /* member of PPC4xx family */ #define CONFIG_DLVISION_10G 1 /* on a DLVision-10G board */ #define CONFIG_SYS_TEXT_BASE 0xFFFC0000 diff --git a/include/configs/dlvision.h b/include/configs/dlvision.h index c97963a3f8..1e86c556ab 100644 --- a/include/configs/dlvision.h +++ b/include/configs/dlvision.h @@ -9,7 +9,6 @@ #define __CONFIG_H #define CONFIG_405EP 1 /* this is a PPC405 CPU */ -#define CONFIG_4xx 1 /* member of PPC4xx family */ #define CONFIG_DLVISION 1 /* on a Neo board */ #define CONFIG_SYS_TEXT_BASE 0xFFFC0000 diff --git a/include/configs/ebony.h b/include/configs/ebony.h index 8dc654ea50..3f0ad69738 100644 --- a/include/configs/ebony.h +++ b/include/configs/ebony.h @@ -17,7 +17,6 @@ #define CONFIG_EBONY 1 /* Board is ebony */ #define CONFIG_440GP 1 /* Specifc GP support */ #define CONFIG_440 1 /* ... PPC440 family */ -#define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ #define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */ diff --git a/include/configs/gdppc440etx.h b/include/configs/gdppc440etx.h index a6f1afff97..6810b3befc 100644 --- a/include/configs/gdppc440etx.h +++ b/include/configs/gdppc440etx.h @@ -21,7 +21,6 @@ #define CONFIG_440GR 1 /* Specific PPC440GR support */ #define CONFIG_HOSTNAME gdppc440etx #define CONFIG_440 1 /* ... PPC440 family */ -#define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_SYS_CLK_FREQ 66666666 /* external freq to pll */ #define CONFIG_SYS_TEXT_BASE 0xFFF80000 diff --git a/include/configs/icon.h b/include/configs/icon.h index eafcf5aeaf..bbe9b59b53 100644 --- a/include/configs/icon.h +++ b/include/configs/icon.h @@ -16,7 +16,6 @@ * High Level Configuration Options */ #define CONFIG_ICON 1 /* Board is icon */ -#define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_440 1 /* ... PPC440 family */ #define CONFIG_440SPE 1 /* Specifc SPe support */ diff --git a/include/configs/intip.h b/include/configs/intip.h index d3d7a441b6..b56b3aa340 100644 --- a/include/configs/intip.h +++ b/include/configs/intip.h @@ -30,7 +30,6 @@ #define CONFIG_IDENT_STRING " intip 0.06" #endif #define CONFIG_440 1 -#define CONFIG_4xx 1 /* ... PPC4xx family */ #ifndef CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_TEXT_BASE 0xFFFA0000 diff --git a/include/configs/io.h b/include/configs/io.h index 2d67cfc66a..7f86767e94 100644 --- a/include/configs/io.h +++ b/include/configs/io.h @@ -9,7 +9,6 @@ #define __CONFIG_H #define CONFIG_405EP 1 /* this is a PPC405 CPU */ -#define CONFIG_4xx 1 /* member of PPC4xx family */ #define CONFIG_IO 1 /* on a Io board */ #define CONFIG_SYS_TEXT_BASE 0xFFFC0000 diff --git a/include/configs/io64.h b/include/configs/io64.h index 39ed2850d2..6915b2071c 100644 --- a/include/configs/io64.h +++ b/include/configs/io64.h @@ -20,7 +20,6 @@ * High Level Configuration Options *----------------------------------------------------------------------*/ #define CONFIG_IO64 1 /* Board is Io64 */ -#define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_405EX 1 /* Specifc 405EX support*/ #define CONFIG_SYS_CLK_FREQ 33333333 /* ext frequency to pll */ diff --git a/include/configs/iocon.h b/include/configs/iocon.h index 788c715a2f..d34b91dfde 100644 --- a/include/configs/iocon.h +++ b/include/configs/iocon.h @@ -9,7 +9,6 @@ #define __CONFIG_H #define CONFIG_405EP 1 /* this is a PPC405 CPU */ -#define CONFIG_4xx 1 /* member of PPC4xx family */ #define CONFIG_IOCON 1 /* on a IoCon board */ #define CONFIG_SYS_TEXT_BASE 0xFFFC0000 diff --git a/include/configs/katmai.h b/include/configs/katmai.h index ca0df2d0ce..fa72eb02f3 100644 --- a/include/configs/katmai.h +++ b/include/configs/katmai.h @@ -18,7 +18,6 @@ * High Level Configuration Options *----------------------------------------------------------------------*/ #define CONFIG_KATMAI 1 /* Board is Katmai */ -#define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_440 1 /* ... PPC440 family */ #define CONFIG_440SPE 1 /* Specifc SPe support */ #define CONFIG_440SPE_REVA 1 /* Support old Rev A. */ diff --git a/include/configs/kilauea.h b/include/configs/kilauea.h index d2acc281cd..0695d2d37b 100644 --- a/include/configs/kilauea.h +++ b/include/configs/kilauea.h @@ -19,7 +19,6 @@ * High Level Configuration Options *----------------------------------------------------------------------*/ #define CONFIG_KILAUEA 1 /* Board is Kilauea */ -#define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_405EX 1 /* Specifc 405EX support*/ #define CONFIG_SYS_CLK_FREQ 33333333 /* ext frequency to pll */ diff --git a/include/configs/korat.h b/include/configs/korat.h index 811ff995e2..5494a6007d 100644 --- a/include/configs/korat.h +++ b/include/configs/korat.h @@ -22,7 +22,6 @@ * High Level Configuration Options */ #define CONFIG_440EPX 1 /* Specific PPC440EPx */ -#define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_SYS_CLK_FREQ 33333333 #ifdef CONFIG_KORAT_PERMANENT diff --git a/include/configs/luan.h b/include/configs/luan.h index 67f75c79a1..15e4a7e5c8 100644 --- a/include/configs/luan.h +++ b/include/configs/luan.h @@ -17,7 +17,6 @@ *----------------------------------------------------------------------*/ #define CONFIG_LUAN 1 /* Board is Luan */ #define CONFIG_440SP 1 /* Specific PPC440SP support */ -#define CONFIG_4xx 1 /* PPC4xx family */ #define CONFIG_440 1 #define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */ diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h index e9c8d8fd55..07ddfc4014 100644 --- a/include/configs/lwmon5.h +++ b/include/configs/lwmon5.h @@ -22,7 +22,6 @@ #define CONFIG_LWMON5 1 /* Board is lwmon5 */ #define CONFIG_440EPX 1 /* Specific PPC440EPx */ #define CONFIG_440 1 /* ... PPC440 family */ -#define CONFIG_4xx 1 /* ... PPC4xx family */ #ifdef CONFIG_LCD4_LWMON5 #define CONFIG_SYS_TEXT_BASE 0x01000000 /* SPL U-Boot TEXT_BASE */ diff --git a/include/configs/makalu.h b/include/configs/makalu.h index d6207eb11f..fd4c26eb94 100644 --- a/include/configs/makalu.h +++ b/include/configs/makalu.h @@ -19,7 +19,6 @@ * High Level Configuration Options *----------------------------------------------------------------------*/ #define CONFIG_MAKALU 1 /* Board is Makalu */ -#define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_405EX 1 /* Specifc 405EX support*/ #define CONFIG_SYS_CLK_FREQ 33330000 /* ext frequency to pll */ diff --git a/include/configs/neo.h b/include/configs/neo.h index 62ea8eca86..d549985886 100644 --- a/include/configs/neo.h +++ b/include/configs/neo.h @@ -10,7 +10,6 @@ #define CONFIG_405EP 1 /* this is a PPC405 CPU */ -#define CONFIG_4xx 1 /* member of PPC4xx family */ #define CONFIG_NEO 1 /* on a Neo board */ #define CONFIG_SYS_TEXT_BASE 0xFFFC0000 diff --git a/include/configs/ocotea.h b/include/configs/ocotea.h index f3fb5852f9..4ff2f05c88 100644 --- a/include/configs/ocotea.h +++ b/include/configs/ocotea.h @@ -26,7 +26,6 @@ #define CONFIG_OCOTEA 1 /* Board is ebony */ #define CONFIG_440GX 1 /* Specifc GX support */ #define CONFIG_440 1 /* ... PPC440 family */ -#define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */ #define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */ diff --git a/include/configs/p3p440.h b/include/configs/p3p440.h index 1fdd602f5b..225567bd90 100644 --- a/include/configs/p3p440.h +++ b/include/configs/p3p440.h @@ -20,7 +20,6 @@ #define CONFIG_P3P440 1 /* Board is P3P440 */ #define CONFIG_440GP 1 /* Specifc GP support */ #define CONFIG_440 1 /* ... PPC440 family */ -#define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ #define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */ diff --git a/include/configs/pcs440ep.h b/include/configs/pcs440ep.h index 5a5fe7ff00..e6e06f2d2e 100644 --- a/include/configs/pcs440ep.h +++ b/include/configs/pcs440ep.h @@ -23,7 +23,6 @@ #define CONFIG_PCS440EP 1 /* Board is PCS440EP */ #define CONFIG_440EP 1 /* Specific PPC440EP support */ #define CONFIG_440 1 /* ... PPC440 family */ -#define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_SYS_TEXT_BASE 0xFFFA0000 diff --git a/include/configs/quad100hd.h b/include/configs/quad100hd.h index 20d6178dc1..e91e805bb9 100644 --- a/include/configs/quad100hd.h +++ b/include/configs/quad100hd.h @@ -15,7 +15,6 @@ * High Level Configuration Options *----------------------------------------------------------------------*/ #define CONFIG_QUAD100HD 1 /* Board is Quad100hd */ -#define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_405EP 1 /* Specifc 405EP support*/ #define CONFIG_SYS_TEXT_BASE 0xFFFC0000 diff --git a/include/configs/redwood.h b/include/configs/redwood.h index c8bd02e710..84d1e584a0 100644 --- a/include/configs/redwood.h +++ b/include/configs/redwood.h @@ -12,7 +12,6 @@ /*----------------------------------------------------------------------- * High Level Configuration Options *----------------------------------------------------------------------*/ -#define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_440 1 /* ... PPC460 family */ #define CONFIG_460SX 1 /* ... PPC460 family */ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */ diff --git a/include/configs/sbc405.h b/include/configs/sbc405.h index 2fd1dc48e4..69dc210917 100644 --- a/include/configs/sbc405.h +++ b/include/configs/sbc405.h @@ -17,7 +17,6 @@ */ #define CONFIG_405GP 1 /* This is a PPC405 CPU */ -#define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_SBC405 1 /* ...on a WR SBC405 board */ #define CONFIG_SYS_TEXT_BASE 0xFFFC0000 diff --git a/include/configs/sc3.h b/include/configs/sc3.h index 9a11150592..14e033dd80 100644 --- a/include/configs/sc3.h +++ b/include/configs/sc3.h @@ -43,7 +43,6 @@ */ #define CONFIG_SC3 1 -#define CONFIG_4xx 1 #define CONFIG_405GP 1 #define CONFIG_SYS_TEXT_BASE 0xFFFA0000 diff --git a/include/configs/sequoia.h b/include/configs/sequoia.h index d2dedac4ed..0e21ee3dc0 100644 --- a/include/configs/sequoia.h +++ b/include/configs/sequoia.h @@ -27,7 +27,6 @@ #define CONFIG_HOSTNAME rainier #endif #define CONFIG_440 1 /* ... PPC440 family */ -#define CONFIG_4xx 1 /* ... PPC4xx family */ #ifndef CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_TEXT_BASE 0xFFF80000 diff --git a/include/configs/t3corp.h b/include/configs/t3corp.h index 9ab99244cf..502e795976 100644 --- a/include/configs/t3corp.h +++ b/include/configs/t3corp.h @@ -16,7 +16,6 @@ */ #define CONFIG_460GT 1 /* Specific PPC460GT */ #define CONFIG_440 1 -#define CONFIG_4xx 1 /* ... PPC4xx family */ #ifndef CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_TEXT_BASE 0xFFFA0000 diff --git a/include/configs/taihu.h b/include/configs/taihu.h index 4ebaf2e2a5..5c0ce7a2e4 100644 --- a/include/configs/taihu.h +++ b/include/configs/taihu.h @@ -13,7 +13,6 @@ #define CONFIG_405EP 1 /* this is a PPC405 CPU */ -#define CONFIG_4xx 1 /* member of PPC4xx family */ #define CONFIG_TAIHU 1 /* on a taihu board */ #define CONFIG_SYS_TEXT_BASE 0xFFFC0000 diff --git a/include/configs/taishan.h b/include/configs/taishan.h index 3dbfc6ad1d..3d5c351b1a 100644 --- a/include/configs/taishan.h +++ b/include/configs/taishan.h @@ -18,7 +18,6 @@ #define CONFIG_TAISHAN 1 /* Board is taishan */ #define CONFIG_440GX 1 /* Specifc GX support */ #define CONFIG_440 1 /* ... PPC440 family */ -#define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */ #define CONFIG_SYS_TEXT_BASE 0xFFFC0000 diff --git a/include/configs/walnut.h b/include/configs/walnut.h index a5691825ee..8b803a2ee0 100644 --- a/include/configs/walnut.h +++ b/include/configs/walnut.h @@ -18,7 +18,6 @@ */ #define CONFIG_405GP 1 /* This is a PPC405 CPU */ -#define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_WALNUT 1 /* ...on a WALNUT board */ /* ...or on a SYCAMORE board */ diff --git a/include/configs/xilinx-ppc405.h b/include/configs/xilinx-ppc405.h index 431e331f5c..a0151fe8f4 100644 --- a/include/configs/xilinx-ppc405.h +++ b/include/configs/xilinx-ppc405.h @@ -15,7 +15,6 @@ /* cpu parameter */ #define CONFIG_405 1 -#define CONFIG_4xx 1 #define CONFIG_XILINX_405 1 #include diff --git a/include/configs/xilinx-ppc440.h b/include/configs/xilinx-ppc440.h index 2ec3dd18dd..f45700878e 100644 --- a/include/configs/xilinx-ppc440.h +++ b/include/configs/xilinx-ppc440.h @@ -9,7 +9,6 @@ #define __CONFIG_GEN_H /*CPU*/ -#define CONFIG_4xx 1 #define CONFIG_440 1 #define CONFIG_XILINX_440 1 diff --git a/include/configs/xpedite1000.h b/include/configs/xpedite1000.h index eb193f8673..ca322b2e82 100644 --- a/include/configs/xpedite1000.h +++ b/include/configs/xpedite1000.h @@ -18,7 +18,6 @@ #define CONFIG_XPEDITE1000 1 #define CONFIG_SYS_BOARD_NAME "XPedite1000" #define CONFIG_SYS_FORM_PMC 1 -#define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_440 1 #define CONFIG_440GX 1 /* 440 GX */ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */ diff --git a/include/configs/yosemite.h b/include/configs/yosemite.h index 2dd742e327..8508a8029e 100644 --- a/include/configs/yosemite.h +++ b/include/configs/yosemite.h @@ -23,7 +23,6 @@ #define CONFIG_HOSTNAME yellowstone #endif #define CONFIG_440 1 /* ... PPC440 family */ -#define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_SYS_CLK_FREQ 66666666 /* external freq to pll */ #define CONFIG_SYS_TEXT_BASE 0xFFF80000 diff --git a/include/configs/yucca.h b/include/configs/yucca.h index 5d584fbad4..76717e4579 100644 --- a/include/configs/yucca.h +++ b/include/configs/yucca.h @@ -18,7 +18,6 @@ /*----------------------------------------------------------------------- * High Level Configuration Options *----------------------------------------------------------------------*/ -#define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_440 1 /* ... PPC440 family */ #define CONFIG_440SPE 1 /* Specifc SPe support */ #define CONFIG_440SPE_REVA 1 /* Support old Rev A. */ diff --git a/include/configs/zeus.h b/include/configs/zeus.h index d8aeb3794e..4d7a7fc755 100644 --- a/include/configs/zeus.h +++ b/include/configs/zeus.h @@ -15,7 +15,6 @@ * High Level Configuration Options *----------------------------------------------------------------------*/ #define CONFIG_ZEUS 1 /* Board is Zeus */ -#define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_405EP 1 /* Specifc 405EP support*/ #define CONFIG_SYS_TEXT_BASE 0xFFFC0000 -- cgit v1.2.1 From 53a79fe3a2414072246d54569f80488f56ab3589 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 14 Jan 2014 17:26:17 +0900 Subject: powerpc: mpc83xx: remove redundant CONFIG_MPC83xx definition We do not have to define CONFIG_MPC83xx in board config headers because it is defined in arch/powerpc/cpu/mpc83xx/config.mk. Signed-off-by: Masahiro Yamada --- include/configs/MERGERBOX.h | 1 - include/configs/MPC8308RDB.h | 1 - include/configs/MPC8313ERDB.h | 1 - include/configs/MPC8315ERDB.h | 1 - include/configs/MPC8323ERDB.h | 1 - include/configs/MPC832XEMDS.h | 1 - include/configs/MPC8349EMDS.h | 1 - include/configs/MPC8349ITX.h | 1 - include/configs/MPC8360EMDS.h | 1 - include/configs/MPC8360ERDK.h | 1 - include/configs/MPC837XEMDS.h | 1 - include/configs/MPC837XERDB.h | 1 - include/configs/MVBLM7.h | 1 - include/configs/SIMPC8313.h | 1 - include/configs/TQM834x.h | 1 - include/configs/km/km8309-common.h | 1 - include/configs/mpc8308_p1m.h | 1 - include/configs/sbc8349.h | 1 - include/configs/ve8313.h | 1 - include/configs/vme8349.h | 1 - 20 files changed, 20 deletions(-) (limited to 'include') diff --git a/include/configs/MERGERBOX.h b/include/configs/MERGERBOX.h index 8a40029809..3dcea0b595 100644 --- a/include/configs/MERGERBOX.h +++ b/include/configs/MERGERBOX.h @@ -16,7 +16,6 @@ * High Level Configuration Options */ #define CONFIG_E300 1 -#define CONFIG_MPC83xx 1 #define CONFIG_MPC837x 1 #define CONFIG_MPC8377 1 diff --git a/include/configs/MPC8308RDB.h b/include/configs/MPC8308RDB.h index 0131b9c6d4..bf974fd461 100644 --- a/include/configs/MPC8308RDB.h +++ b/include/configs/MPC8308RDB.h @@ -13,7 +13,6 @@ * High Level Configuration Options */ #define CONFIG_E300 1 /* E300 family */ -#define CONFIG_MPC83xx 1 /* MPC83xx family */ #define CONFIG_MPC830x 1 /* MPC830x family */ #define CONFIG_MPC8308 1 /* MPC8308 CPU specific */ #define CONFIG_MPC8308RDB 1 /* MPC8308RDB board specific */ diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h index 07719e9265..69b2cb1970 100644 --- a/include/configs/MPC8313ERDB.h +++ b/include/configs/MPC8313ERDB.h @@ -14,7 +14,6 @@ * High Level Configuration Options */ #define CONFIG_E300 1 -#define CONFIG_MPC83xx 1 #define CONFIG_MPC831x 1 #define CONFIG_MPC8313 1 #define CONFIG_MPC8313ERDB 1 diff --git a/include/configs/MPC8315ERDB.h b/include/configs/MPC8315ERDB.h index aedb529f86..3dd52ce30f 100644 --- a/include/configs/MPC8315ERDB.h +++ b/include/configs/MPC8315ERDB.h @@ -35,7 +35,6 @@ * High Level Configuration Options */ #define CONFIG_E300 1 /* E300 family */ -#define CONFIG_MPC83xx 1 /* MPC83xx family */ #define CONFIG_MPC831x 1 /* MPC831x CPU family */ #define CONFIG_MPC8315 1 /* MPC8315 CPU specific */ #define CONFIG_MPC8315ERDB 1 /* MPC8315ERDB board specific */ diff --git a/include/configs/MPC8323ERDB.h b/include/configs/MPC8323ERDB.h index c4c771b502..65a63e2b7f 100644 --- a/include/configs/MPC8323ERDB.h +++ b/include/configs/MPC8323ERDB.h @@ -14,7 +14,6 @@ */ #define CONFIG_E300 1 /* E300 family */ #define CONFIG_QE 1 /* Has QE */ -#define CONFIG_MPC83xx 1 /* MPC83xx family */ #define CONFIG_MPC832x 1 /* MPC832x CPU specific */ #define CONFIG_SYS_TEXT_BASE 0xFE000000 diff --git a/include/configs/MPC832XEMDS.h b/include/configs/MPC832XEMDS.h index f5b62025d6..1735b3c521 100644 --- a/include/configs/MPC832XEMDS.h +++ b/include/configs/MPC832XEMDS.h @@ -12,7 +12,6 @@ */ #define CONFIG_E300 1 /* E300 family */ #define CONFIG_QE 1 /* Has QE */ -#define CONFIG_MPC83xx 1 /* MPC83xx family */ #define CONFIG_MPC832x 1 /* MPC832x CPU specific */ #define CONFIG_MPC832XEMDS 1 /* MPC832XEMDS board specific */ diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h index 7640d06ee7..6b7d648944 100644 --- a/include/configs/MPC8349EMDS.h +++ b/include/configs/MPC8349EMDS.h @@ -17,7 +17,6 @@ * High Level Configuration Options */ #define CONFIG_E300 1 /* E300 Family */ -#define CONFIG_MPC83xx 1 /* MPC83xx family */ #define CONFIG_MPC834x 1 /* MPC834x family */ #define CONFIG_MPC8349 1 /* MPC8349 specific */ #define CONFIG_MPC8349EMDS 1 /* MPC8349EMDS board specific */ diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h index ffb9a158ae..398918a940 100644 --- a/include/configs/MPC8349ITX.h +++ b/include/configs/MPC8349ITX.h @@ -47,7 +47,6 @@ /* * High Level Configuration Options */ -#define CONFIG_MPC83xx 1 #define CONFIG_MPC834x /* MPC834x family (8343, 8347, 8349) */ #define CONFIG_MPC8349 /* MPC8349 specific */ diff --git a/include/configs/MPC8360EMDS.h b/include/configs/MPC8360EMDS.h index d4c82cd669..aefde74fc5 100644 --- a/include/configs/MPC8360EMDS.h +++ b/include/configs/MPC8360EMDS.h @@ -14,7 +14,6 @@ */ #define CONFIG_E300 1 /* E300 family */ #define CONFIG_QE 1 /* Has QE */ -#define CONFIG_MPC83xx 1 /* MPC83xx family */ #define CONFIG_MPC8360 1 /* MPC8360 CPU specific */ #define CONFIG_MPC8360EMDS 1 /* MPC8360EMDS board specific */ diff --git a/include/configs/MPC8360ERDK.h b/include/configs/MPC8360ERDK.h index 01e7ac7681..1b8bad179b 100644 --- a/include/configs/MPC8360ERDK.h +++ b/include/configs/MPC8360ERDK.h @@ -19,7 +19,6 @@ */ #define CONFIG_E300 1 /* E300 family */ #define CONFIG_QE 1 /* Has QE */ -#define CONFIG_MPC83xx 1 /* MPC83xx family */ #define CONFIG_MPC8360 1 /* MPC8360 CPU specific */ #define CONFIG_MPC8360ERDK 1 /* MPC8360ERDK board specific */ diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h index f52e77a3a7..695e47bf07 100644 --- a/include/configs/MPC837XEMDS.h +++ b/include/configs/MPC837XEMDS.h @@ -12,7 +12,6 @@ * High Level Configuration Options */ #define CONFIG_E300 1 /* E300 family */ -#define CONFIG_MPC83xx 1 /* MPC83xx family */ #define CONFIG_MPC837x 1 /* MPC837x CPU specific */ #define CONFIG_MPC837XEMDS 1 /* MPC837XEMDS board specific */ diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index 938f7ab3c4..1d1f4c0e22 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -13,7 +13,6 @@ * High Level Configuration Options */ #define CONFIG_E300 1 /* E300 family */ -#define CONFIG_MPC83xx 1 /* MPC83xx family */ #define CONFIG_MPC837x 1 /* MPC837x CPU specific */ #define CONFIG_MPC837XERDB 1 diff --git a/include/configs/MVBLM7.h b/include/configs/MVBLM7.h index efdf1aa670..30af691c5a 100644 --- a/include/configs/MVBLM7.h +++ b/include/configs/MVBLM7.h @@ -17,7 +17,6 @@ * High Level Configuration Options */ #define CONFIG_E300 1 -#define CONFIG_MPC83xx 1 #define CONFIG_MPC834x 1 #define CONFIG_MPC8343 1 diff --git a/include/configs/SIMPC8313.h b/include/configs/SIMPC8313.h index 40fb63d14f..46157ccc40 100644 --- a/include/configs/SIMPC8313.h +++ b/include/configs/SIMPC8313.h @@ -16,7 +16,6 @@ #define CONFIG_NAND_U_BOOT #define CONFIG_E300 1 -#define CONFIG_MPC83xx 1 #define CONFIG_MPC831x 1 #define CONFIG_MPC8313 1 diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h index 15cf2bd793..6762e3a57e 100644 --- a/include/configs/TQM834x.h +++ b/include/configs/TQM834x.h @@ -16,7 +16,6 @@ * High Level Configuration Options */ #define CONFIG_E300 1 /* E300 Family */ -#define CONFIG_MPC83xx 1 /* MPC83xx family */ #define CONFIG_MPC834x 1 /* MPC834x specific */ #define CONFIG_MPC8349 1 /* MPC8349 specific */ #define CONFIG_TQM834X 1 /* TQM834X board specific */ diff --git a/include/configs/km/km8309-common.h b/include/configs/km/km8309-common.h index 47355abed9..29c6f60971 100644 --- a/include/configs/km/km8309-common.h +++ b/include/configs/km/km8309-common.h @@ -15,7 +15,6 @@ */ #define CONFIG_E300 1 /* E300 family */ #define CONFIG_QE 1 /* Has QE */ -#define CONFIG_MPC83xx 1 /* MPC83xx family */ #define CONFIG_MPC830x 1 /* MPC830x family */ #define CONFIG_MPC8309 1 /* MPC8309 CPU specific */ diff --git a/include/configs/mpc8308_p1m.h b/include/configs/mpc8308_p1m.h index de7a53a8c2..4ae9afd4e5 100644 --- a/include/configs/mpc8308_p1m.h +++ b/include/configs/mpc8308_p1m.h @@ -13,7 +13,6 @@ * High Level Configuration Options */ #define CONFIG_E300 1 /* E300 family */ -#define CONFIG_MPC83xx 1 /* MPC83xx family */ #define CONFIG_MPC830x 1 /* MPC830x family */ #define CONFIG_MPC8308 1 /* MPC8308 CPU specific */ #define CONFIG_MPC8308_P1M 1 /* mpc8308_p1m board specific */ diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h index b7f83e0105..2516a3e97e 100644 --- a/include/configs/sbc8349.h +++ b/include/configs/sbc8349.h @@ -19,7 +19,6 @@ * High Level Configuration Options */ #define CONFIG_E300 1 /* E300 Family */ -#define CONFIG_MPC83xx 1 /* MPC83xx family */ #define CONFIG_MPC834x 1 /* MPC834x family */ #define CONFIG_MPC8349 1 /* MPC8349 specific */ #define CONFIG_SBC8349 1 /* WRS SBC8349 board specific */ diff --git a/include/configs/ve8313.h b/include/configs/ve8313.h index 5cf4ae5be8..00787bbb28 100644 --- a/include/configs/ve8313.h +++ b/include/configs/ve8313.h @@ -17,7 +17,6 @@ * High Level Configuration Options */ #define CONFIG_E300 1 -#define CONFIG_MPC83xx 1 #define CONFIG_MPC831x 1 #define CONFIG_MPC8313 1 #define CONFIG_VE8313 1 diff --git a/include/configs/vme8349.h b/include/configs/vme8349.h index 7ecbafe2e5..175311cad9 100644 --- a/include/configs/vme8349.h +++ b/include/configs/vme8349.h @@ -29,7 +29,6 @@ * High Level Configuration Options */ #define CONFIG_E300 1 /* E300 Family */ -#define CONFIG_MPC83xx 1 /* MPC83xx family */ #define CONFIG_MPC834x 1 /* MPC834x family */ #define CONFIG_MPC8349 1 /* MPC8349 specific */ #define CONFIG_VME8349 1 /* ESD VME8349 board specific */ -- cgit v1.2.1 From bf7aac97262419e991e4187528f2113961fb6ecf Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Wed, 15 Jan 2014 10:11:28 +0900 Subject: powerpc: mpc512x: remove redundant CONFIG_MPC512X definition We do not have to define CONFIG_MPC512X in board config headers because it is defined in arch/powerpc/cpu/mpc512x/config.mk. Signed-off-by: Masahiro Yamada --- include/configs/ac14xx.h | 1 - include/configs/aria.h | 1 - include/configs/mecp5123.h | 1 - include/configs/mpc5121ads.h | 1 - include/configs/pdm360ng.h | 1 - 5 files changed, 5 deletions(-) (limited to 'include') diff --git a/include/configs/ac14xx.h b/include/configs/ac14xx.h index d6cef888c6..aa584b7768 100644 --- a/include/configs/ac14xx.h +++ b/include/configs/ac14xx.h @@ -27,7 +27,6 @@ * High Level Configuration Options */ #define CONFIG_E300 1 /* E300 Family */ -#define CONFIG_MPC512X 1 /* MPC512X family */ #define CONFIG_SYS_TEXT_BASE 0xFFF00000 diff --git a/include/configs/aria.h b/include/configs/aria.h index b8d955abd0..c36cf33f07 100644 --- a/include/configs/aria.h +++ b/include/configs/aria.h @@ -31,7 +31,6 @@ * High Level Configuration Options */ #define CONFIG_E300 1 /* E300 Family */ -#define CONFIG_MPC512X 1 /* MPC512X family */ #define CONFIG_FSL_DIU_FB 1 /* FSL DIU */ #define CONFIG_SYS_TEXT_BASE 0xFFF00000 diff --git a/include/configs/mecp5123.h b/include/configs/mecp5123.h index d415ecdb5a..6c19817f86 100644 --- a/include/configs/mecp5123.h +++ b/include/configs/mecp5123.h @@ -29,7 +29,6 @@ * High Level Configuration Options */ #define CONFIG_E300 1 /* E300 Family */ -#define CONFIG_MPC512X 1 /* MPC512X family */ #define CONFIG_SYS_TEXT_BASE 0xFFF00000 diff --git a/include/configs/mpc5121ads.h b/include/configs/mpc5121ads.h index 38337b4564..7de245b33c 100644 --- a/include/configs/mpc5121ads.h +++ b/include/configs/mpc5121ads.h @@ -29,7 +29,6 @@ * High Level Configuration Options */ #define CONFIG_E300 1 /* E300 Family */ -#define CONFIG_MPC512X 1 /* MPC512X family */ #define CONFIG_SYS_TEXT_BASE 0xFFF00000 diff --git a/include/configs/pdm360ng.h b/include/configs/pdm360ng.h index 2a54e5cea0..553eb8f967 100644 --- a/include/configs/pdm360ng.h +++ b/include/configs/pdm360ng.h @@ -30,7 +30,6 @@ * High Level Configuration Options */ #define CONFIG_E300 1 /* E300 Family */ -#define CONFIG_MPC512X 1 /* MPC512X family */ #define CONFIG_FSL_DIU_FB 1 /* FSL DIU */ #define CONFIG_SYS_TEXT_BASE 0xF0000000 -- cgit v1.2.1 From 52de0e49dfdc6f1dd55f31e312a3f050be75b69e Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Wed, 15 Jan 2014 10:13:49 +0900 Subject: powerpc: mpc824x: remove redundant CONFIG_MPC824X definition We do not have to define CONFIG_MPC824X in board config headers because it is defined in arch/powerpc/cpu/mpc824x/config.mk. Signed-off-by: Masahiro Yamada --- include/configs/A3000.h | 1 - include/configs/CPC45.h | 1 - include/configs/CU824.h | 1 - include/configs/HIDDEN_DRAGON.h | 1 - include/configs/MOUSSE.h | 1 - include/configs/MUSENKI.h | 1 - include/configs/MVBLUE.h | 1 - include/configs/Sandpoint8240.h | 1 - include/configs/Sandpoint8245.h | 1 - include/configs/debris.h | 1 - include/configs/eXalion.h | 1 - include/configs/kvme080.h | 1 - include/configs/utx8245.h | 1 - 13 files changed, 13 deletions(-) (limited to 'include') diff --git a/include/configs/A3000.h b/include/configs/A3000.h index 8f3a672cd5..35e3e6fa8b 100644 --- a/include/configs/A3000.h +++ b/include/configs/A3000.h @@ -25,7 +25,6 @@ * (easy to change) */ -#define CONFIG_MPC824X 1 #define CONFIG_MPC8245 1 #define CONFIG_A3000 1 diff --git a/include/configs/CPC45.h b/include/configs/CPC45.h index 764ca2215f..a75c52f2c7 100644 --- a/include/configs/CPC45.h +++ b/include/configs/CPC45.h @@ -25,7 +25,6 @@ * (easy to change) */ -#define CONFIG_MPC824X 1 #define CONFIG_MPC8245 1 #define CONFIG_CPC45 1 diff --git a/include/configs/CU824.h b/include/configs/CU824.h index 686402762f..dc98a560c8 100644 --- a/include/configs/CU824.h +++ b/include/configs/CU824.h @@ -25,7 +25,6 @@ * (easy to change) */ -#define CONFIG_MPC824X 1 #define CONFIG_MPC8240 1 #define CONFIG_CU824 1 diff --git a/include/configs/HIDDEN_DRAGON.h b/include/configs/HIDDEN_DRAGON.h index 62a7f93fc7..e0a233b28a 100644 --- a/include/configs/HIDDEN_DRAGON.h +++ b/include/configs/HIDDEN_DRAGON.h @@ -22,7 +22,6 @@ * (easy to change) */ -#define CONFIG_MPC824X 1 #define CONFIG_MPC8245 1 #define CONFIG_HIDDEN_DRAGON 1 diff --git a/include/configs/MOUSSE.h b/include/configs/MOUSSE.h index 1bf1bf8c41..e84d12f3f8 100644 --- a/include/configs/MOUSSE.h +++ b/include/configs/MOUSSE.h @@ -29,7 +29,6 @@ * (easy to change) */ -#define CONFIG_MPC824X 1 #define CONFIG_MPC8240 1 #define CONFIG_MOUSSE 1 diff --git a/include/configs/MUSENKI.h b/include/configs/MUSENKI.h index b24f6eea2f..c5c929002d 100644 --- a/include/configs/MUSENKI.h +++ b/include/configs/MUSENKI.h @@ -25,7 +25,6 @@ * (easy to change) */ -#define CONFIG_MPC824X 1 #define CONFIG_MPC8245 1 #define CONFIG_MUSENKI 1 diff --git a/include/configs/MVBLUE.h b/include/configs/MVBLUE.h index 4100b85497..aa2d9c02de 100644 --- a/include/configs/MVBLUE.h +++ b/include/configs/MVBLUE.h @@ -40,7 +40,6 @@ #define ERR_LED(code) #endif -#define CONFIG_MPC824X 1 #define CONFIG_MPC8245 1 #define CONFIG_MVBLUE 1 diff --git a/include/configs/Sandpoint8240.h b/include/configs/Sandpoint8240.h index 8a689b3573..2c0cb89afa 100644 --- a/include/configs/Sandpoint8240.h +++ b/include/configs/Sandpoint8240.h @@ -19,7 +19,6 @@ * (easy to change) */ -#define CONFIG_MPC824X 1 #define CONFIG_MPC8240 1 #define CONFIG_SANDPOINT 1 diff --git a/include/configs/Sandpoint8245.h b/include/configs/Sandpoint8245.h index a17f5ad860..2664d5b169 100644 --- a/include/configs/Sandpoint8245.h +++ b/include/configs/Sandpoint8245.h @@ -19,7 +19,6 @@ * (easy to change) */ -#define CONFIG_MPC824X 1 #define CONFIG_MPC8245 1 #define CONFIG_SANDPOINT 1 diff --git a/include/configs/debris.h b/include/configs/debris.h index 621f895011..4631b8621a 100644 --- a/include/configs/debris.h +++ b/include/configs/debris.h @@ -94,7 +94,6 @@ * (easy to change) */ -#define CONFIG_MPC824X 1 #define CONFIG_MPC8245 1 #define CONFIG_DEBRIS 1 diff --git a/include/configs/eXalion.h b/include/configs/eXalion.h index ca9792c451..940be1f5d0 100644 --- a/include/configs/eXalion.h +++ b/include/configs/eXalion.h @@ -19,7 +19,6 @@ * (easy to change) */ -#define CONFIG_MPC824X 1 /* #define CONFIG_MPC8240 1 */ #define CONFIG_MPC8245 1 #define CONFIG_EXALION 1 diff --git a/include/configs/kvme080.h b/include/configs/kvme080.h index 251327a227..c352a1c804 100644 --- a/include/configs/kvme080.h +++ b/include/configs/kvme080.h @@ -8,7 +8,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_MPC824X 1 #define CONFIG_MPC8245 1 #define CONFIG_KVME080 1 diff --git a/include/configs/utx8245.h b/include/configs/utx8245.h index 8e6e246460..5be62ecb2d 100644 --- a/include/configs/utx8245.h +++ b/include/configs/utx8245.h @@ -30,7 +30,6 @@ * (easy to change) */ -#define CONFIG_MPC824X 1 #define CONFIG_MPC8245 1 #define CONFIG_UTX8245 1 -- cgit v1.2.1 From d40ddae4b3c24d4c9f06a91e6f8d4e6b9dac4c9e Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Wed, 15 Jan 2014 10:14:07 +0900 Subject: powerpc: mpc85xx: move CONFIG_MPC85xx definition to CPU config.mk Define CONFIG_MPC85xx in arch/powerpc/cpu/mpc85xx/config.mk because all target boards with mpc85xx cpu define it. Signed-off-by: Masahiro Yamada --- include/configs/B4860QDS.h | 1 - include/configs/BSC9131RDB.h | 1 - include/configs/BSC9132QDS.h | 1 - include/configs/C29XPCIE.h | 1 - include/configs/HWW1U1A.h | 1 - include/configs/MPC8536DS.h | 1 - include/configs/MPC8540ADS.h | 1 - include/configs/MPC8541CDS.h | 1 - include/configs/MPC8544DS.h | 1 - include/configs/MPC8548CDS.h | 1 - include/configs/MPC8555CDS.h | 1 - include/configs/MPC8560ADS.h | 1 - include/configs/MPC8568MDS.h | 1 - include/configs/MPC8569MDS.h | 1 - include/configs/MPC8572DS.h | 1 - include/configs/P1010RDB.h | 1 - include/configs/P1022DS.h | 1 - include/configs/P1023RDB.h | 1 - include/configs/P1023RDS.h | 1 - include/configs/P1_P2_RDB.h | 1 - include/configs/P2020COME.h | 1 - include/configs/P2020DS.h | 1 - include/configs/P2041RDB.h | 1 - include/configs/T1040QDS.h | 1 - include/configs/T1040RDB.h | 1 - include/configs/T1042RDB_PI.h | 1 - include/configs/T2080QDS.h | 1 - include/configs/controlcenterd.h | 1 - include/configs/corenet_ds.h | 1 - include/configs/km/kmp204x-common.h | 1 - include/configs/p1_p2_rdb_pc.h | 1 - include/configs/p1_twr.h | 1 - include/configs/sbc8548.h | 1 - include/configs/socrates.h | 1 - include/configs/stxgp3.h | 1 - include/configs/stxssa.h | 1 - include/configs/t4qds.h | 1 - include/configs/xpedite520x.h | 1 - include/configs/xpedite537x.h | 1 - include/configs/xpedite550x.h | 1 - 40 files changed, 40 deletions(-) (limited to 'include') diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index 39c0b6d8c7..64acc88b7a 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -34,7 +34,6 @@ #define CONFIG_E500 /* BOOKE e500 family */ #define CONFIG_E500MC /* BOOKE e500mc family */ #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ -#define CONFIG_MPC85xx /* MPC85xx/PQ3 platform */ #define CONFIG_MP /* support multiple processors */ #ifndef CONFIG_SYS_TEXT_BASE diff --git a/include/configs/BSC9131RDB.h b/include/configs/BSC9131RDB.h index fa89d13944..a163e3d8f1 100644 --- a/include/configs/BSC9131RDB.h +++ b/include/configs/BSC9131RDB.h @@ -55,7 +55,6 @@ /* High Level Configuration Options */ #define CONFIG_BOOKE /* BOOKE */ #define CONFIG_E500 /* BOOKE e500 family */ -#define CONFIG_MPC85xx /* MPC8540/60/55/41/48/P1020/P2020/P1010,etc*/ #define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_FSL_LAW /* Use common FSL init code */ diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h index a973a49147..052a0f1103 100644 --- a/include/configs/BSC9132QDS.h +++ b/include/configs/BSC9132QDS.h @@ -71,7 +71,6 @@ /* High Level Configuration Options */ #define CONFIG_BOOKE /* BOOKE */ #define CONFIG_E500 /* BOOKE e500 family */ -#define CONFIG_MPC85xx #define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_SYS_HAS_SERDES /* common SERDES init code */ diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h index 69ca0a13e4..92913c8e79 100644 --- a/include/configs/C29XPCIE.h +++ b/include/configs/C29XPCIE.h @@ -87,7 +87,6 @@ /* High Level Configuration Options */ #define CONFIG_BOOKE /* BOOKE */ #define CONFIG_E500 /* BOOKE e500 family */ -#define CONFIG_MPC85xx #define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_SYS_HAS_SERDES /* common SERDES init code */ diff --git a/include/configs/HWW1U1A.h b/include/configs/HWW1U1A.h index bbfee7d308..6a3a11cb7f 100644 --- a/include/configs/HWW1U1A.h +++ b/include/configs/HWW1U1A.h @@ -13,7 +13,6 @@ /* High-level system configuration options */ #define CONFIG_BOOKE /* Power/PowerPC Book-E */ #define CONFIG_E500 /* e500 (Power ISA v2.03 with SPE) */ -#define CONFIG_MPC85xx /* MPC8540/60/55/41/48 family */ #define CONFIG_FSL_ELBC /* FreeScale Enhanced LocalBus Cntlr */ #define CONFIG_FSL_LAW /* FreeScale Local Access Window */ #define CONFIG_P2020 /* FreeScale P2020 */ diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index 9b7cc6474c..57bf04ff81 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -56,7 +56,6 @@ /* High Level Configuration Options */ #define CONFIG_BOOKE 1 /* BOOKE */ #define CONFIG_E500 1 /* BOOKE e500 family */ -#define CONFIG_MPC85xx 1 /* MPC8540/60/55/41/48 */ #define CONFIG_MPC8536 1 #define CONFIG_MPC8536DS 1 diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h index 2d42b25121..37c2b9415a 100644 --- a/include/configs/MPC8540ADS.h +++ b/include/configs/MPC8540ADS.h @@ -21,7 +21,6 @@ /* High Level Configuration Options */ #define CONFIG_BOOKE 1 /* BOOKE */ #define CONFIG_E500 1 /* BOOKE e500 family */ -#define CONFIG_MPC85xx 1 /* MPC8540/MPC8560 */ #define CONFIG_MPC8540 1 /* MPC8540 specific */ #define CONFIG_MPC8540ADS 1 /* MPC8540ADS board specific */ diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h index b9ad034225..5d229a0d20 100644 --- a/include/configs/MPC8541CDS.h +++ b/include/configs/MPC8541CDS.h @@ -16,7 +16,6 @@ /* High Level Configuration Options */ #define CONFIG_BOOKE 1 /* BOOKE */ #define CONFIG_E500 1 /* BOOKE e500 family */ -#define CONFIG_MPC85xx 1 /* MPC8540/60/55/41 */ #define CONFIG_CPM2 1 /* has CPM2 */ #define CONFIG_MPC8541 1 /* MPC8541 specific */ #define CONFIG_MPC8541CDS 1 /* MPC8541CDS board specific */ diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index 90fc2da34b..dade6d3b89 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -14,7 +14,6 @@ /* High Level Configuration Options */ #define CONFIG_BOOKE 1 /* BOOKE */ #define CONFIG_E500 1 /* BOOKE e500 family */ -#define CONFIG_MPC85xx 1 /* MPC8540/60/55/41/48 */ #define CONFIG_MPC8544 1 #define CONFIG_MPC8544DS 1 diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 5fff1e2cac..190c668303 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -20,7 +20,6 @@ /* High Level Configuration Options */ #define CONFIG_BOOKE 1 /* BOOKE */ #define CONFIG_E500 1 /* BOOKE e500 family */ -#define CONFIG_MPC85xx 1 /* MPC8540/60/55/41/48 */ #define CONFIG_MPC8548 1 /* MPC8548 specific */ #define CONFIG_MPC8548CDS 1 /* MPC8548CDS board specific */ diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h index 23c6b07c35..5263ffcc8d 100644 --- a/include/configs/MPC8555CDS.h +++ b/include/configs/MPC8555CDS.h @@ -16,7 +16,6 @@ /* High Level Configuration Options */ #define CONFIG_BOOKE 1 /* BOOKE */ #define CONFIG_E500 1 /* BOOKE e500 family */ -#define CONFIG_MPC85xx 1 /* MPC8540/60/55/41 */ #define CONFIG_CPM2 1 /* has CPM2 */ #define CONFIG_MPC8555 1 /* MPC8555 specific */ #define CONFIG_MPC8555CDS 1 /* MPC8555CDS board specific */ diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h index 44b767919e..ac78d481d6 100644 --- a/include/configs/MPC8560ADS.h +++ b/include/configs/MPC8560ADS.h @@ -21,7 +21,6 @@ /* High Level Configuration Options */ #define CONFIG_BOOKE 1 /* BOOKE */ #define CONFIG_E500 1 /* BOOKE e500 family */ -#define CONFIG_MPC85xx 1 /* MPC8540/MPC8560 */ #define CONFIG_CPM2 1 /* has CPM2 */ #define CONFIG_MPC8560ADS 1 /* MPC8560ADS board specific */ #define CONFIG_MPC8560 1 diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h index 4f438a8075..02a5acf38e 100644 --- a/include/configs/MPC8568MDS.h +++ b/include/configs/MPC8568MDS.h @@ -13,7 +13,6 @@ /* High Level Configuration Options */ #define CONFIG_BOOKE 1 /* BOOKE */ #define CONFIG_E500 1 /* BOOKE e500 family */ -#define CONFIG_MPC85xx 1 /* MPC8540/60/55/41/48/68 */ #define CONFIG_MPC8568 1 /* MPC8568 specific */ #define CONFIG_MPC8568MDS 1 /* MPC8568MDS board specific */ diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h index d877e8bbd1..33cadb93dd 100644 --- a/include/configs/MPC8569MDS.h +++ b/include/configs/MPC8569MDS.h @@ -13,7 +13,6 @@ /* High Level Configuration Options */ #define CONFIG_BOOKE 1 /* BOOKE */ #define CONFIG_E500 1 /* BOOKE e500 family */ -#define CONFIG_MPC85xx 1 /* MPC8540/60/55/41/48/68 */ #define CONFIG_MPC8569 1 /* MPC8569 specific */ #define CONFIG_MPC8569MDS 1 /* MPC8569MDS board specific */ diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index 44d83a236e..f457719bf4 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -44,7 +44,6 @@ /* High Level Configuration Options */ #define CONFIG_BOOKE 1 /* BOOKE */ #define CONFIG_E500 1 /* BOOKE e500 family */ -#define CONFIG_MPC85xx 1 /* MPC8540/60/55/41/48 */ #define CONFIG_MPC8572 1 #define CONFIG_MPC8572DS 1 #define CONFIG_MP 1 /* support multiple processors */ diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 62d7a84f4c..f82fbca77c 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -77,7 +77,6 @@ /* High Level Configuration Options */ #define CONFIG_BOOKE /* BOOKE */ #define CONFIG_E500 /* BOOKE e500 family */ -#define CONFIG_MPC85xx #define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_SYS_HAS_SERDES /* common SERDES init code */ diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index 9c9d72b605..6255b0ae4e 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -122,7 +122,6 @@ /* High Level Configuration Options */ #define CONFIG_BOOKE /* BOOKE */ #define CONFIG_E500 /* BOOKE e500 family */ -#define CONFIG_MPC85xx /* MPC8540/60/55/41/48 */ #define CONFIG_P1022 #define CONFIG_P1022DS #define CONFIG_MP /* support multiple processors */ diff --git a/include/configs/P1023RDB.h b/include/configs/P1023RDB.h index 78a0aa2a7b..b41cb4a13e 100644 --- a/include/configs/P1023RDB.h +++ b/include/configs/P1023RDB.h @@ -25,7 +25,6 @@ /* High Level Configuration Options */ #define CONFIG_BOOKE /* BOOKE */ #define CONFIG_E500 /* BOOKE e500 family */ -#define CONFIG_MPC85xx #define CONFIG_P1023 #define CONFIG_MP /* support multiple processors */ diff --git a/include/configs/P1023RDS.h b/include/configs/P1023RDS.h index d2aaf98113..b51354525a 100644 --- a/include/configs/P1023RDS.h +++ b/include/configs/P1023RDS.h @@ -46,7 +46,6 @@ /* High Level Configuration Options */ #define CONFIG_BOOKE /* BOOKE */ #define CONFIG_E500 /* BOOKE e500 family */ -#define CONFIG_MPC85xx #define CONFIG_P1023 #define CONFIG_P1023RDS #define CONFIG_MP /* support multiple processors */ diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h index 726014a563..32ed0c2714 100644 --- a/include/configs/P1_P2_RDB.h +++ b/include/configs/P1_P2_RDB.h @@ -70,7 +70,6 @@ /* High Level Configuration Options */ #define CONFIG_BOOKE 1 /* BOOKE */ #define CONFIG_E500 1 /* BOOKE e500 family */ -#define CONFIG_MPC85xx 1 /* MPC8540/60/55/41/48/P1020/P2020,etc*/ #define CONFIG_FSL_ELBC 1 /* Enable eLBC Support */ #define CONFIG_PCI 1 /* Enable PCI/PCIE */ diff --git a/include/configs/P2020COME.h b/include/configs/P2020COME.h index ce3c762559..d414b84dd2 100644 --- a/include/configs/P2020COME.h +++ b/include/configs/P2020COME.h @@ -29,7 +29,6 @@ /* High Level Configuration Options */ #define CONFIG_BOOKE 1 /* BOOKE */ #define CONFIG_E500 1 /* BOOKE e500 family */ -#define CONFIG_MPC85xx 1 /* MPC8540/60/55/41/48/P1020/P2020,etc*/ #define CONFIG_P2020 1 #define CONFIG_P2020COME 1 #define CONFIG_FSL_ELBC 1 /* Enable eLBC Support */ diff --git a/include/configs/P2020DS.h b/include/configs/P2020DS.h index 7ef165e152..3d0b5c2fbe 100644 --- a/include/configs/P2020DS.h +++ b/include/configs/P2020DS.h @@ -34,7 +34,6 @@ /* High Level Configuration Options */ #define CONFIG_BOOKE 1 /* BOOKE */ #define CONFIG_E500 1 /* BOOKE e500 family */ -#define CONFIG_MPC85xx 1 /* MPC8540/60/55/41/48 */ #define CONFIG_P2020 1 #define CONFIG_P2020DS 1 #define CONFIG_MP 1 /* support multiple processors */ diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 6934c616bb..47c638422f 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -37,7 +37,6 @@ #define CONFIG_E500 /* BOOKE e500 family */ #define CONFIG_E500MC /* BOOKE e500mc family */ #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ -#define CONFIG_MPC85xx /* MPC85xx/PQ3 platform */ #define CONFIG_MP /* support multiple processors */ #ifndef CONFIG_SYS_TEXT_BASE diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index 91b511bf5e..8234a828dd 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -41,7 +41,6 @@ #define CONFIG_E500 /* BOOKE e500 family */ #define CONFIG_E500MC /* BOOKE e500mc family */ #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ -#define CONFIG_MPC85xx /* MPC85xx/PQ3 platform */ #define CONFIG_MP /* support multiple processors */ #ifndef CONFIG_SYS_TEXT_BASE diff --git a/include/configs/T1040RDB.h b/include/configs/T1040RDB.h index 65b4b26a09..5e988c254c 100644 --- a/include/configs/T1040RDB.h +++ b/include/configs/T1040RDB.h @@ -40,7 +40,6 @@ #define CONFIG_E500 /* BOOKE e500 family */ #define CONFIG_E500MC /* BOOKE e500mc family */ #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ -#define CONFIG_MPC85xx /* MPC85xx/PQ3 platform */ #define CONFIG_MP /* support multiple processors */ #ifndef CONFIG_SYS_TEXT_BASE diff --git a/include/configs/T1042RDB_PI.h b/include/configs/T1042RDB_PI.h index 104bb929ef..aafa8139b1 100644 --- a/include/configs/T1042RDB_PI.h +++ b/include/configs/T1042RDB_PI.h @@ -40,7 +40,6 @@ #define CONFIG_E500 /* BOOKE e500 family */ #define CONFIG_E500MC /* BOOKE e500mc family */ #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ -#define CONFIG_MPC85xx /* MPC85xx/PQ3 platform */ #define CONFIG_MP /* support multiple processors */ #ifndef CONFIG_SYS_TEXT_BASE diff --git a/include/configs/T2080QDS.h b/include/configs/T2080QDS.h index d6d1f93684..9bd0fe2382 100644 --- a/include/configs/T2080QDS.h +++ b/include/configs/T2080QDS.h @@ -27,7 +27,6 @@ #define CONFIG_E500 /* BOOKE e500 family */ #define CONFIG_E500MC /* BOOKE e500mc family */ #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ -#define CONFIG_MPC85xx /* MPC85xx/PQ3 platform */ #define CONFIG_MP /* support multiple processors */ #define CONFIG_ENABLE_36BIT_PHYS diff --git a/include/configs/controlcenterd.h b/include/configs/controlcenterd.h index 46d4f9865f..868813f29b 100644 --- a/include/configs/controlcenterd.h +++ b/include/configs/controlcenterd.h @@ -41,7 +41,6 @@ /* High Level Configuration Options */ #define CONFIG_BOOKE /* BOOKE */ #define CONFIG_E500 /* BOOKE e500 family */ -#define CONFIG_MPC85xx /* MPC8540/60/55/41/48 */ #define CONFIG_P1022 #define CONFIG_CONTROLCENTERD #define CONFIG_MP /* support multiple processors */ diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index fa748f71cb..72432e4bde 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -45,7 +45,6 @@ #define CONFIG_E500 /* BOOKE e500 family */ #define CONFIG_E500MC /* BOOKE e500mc family */ #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ -#define CONFIG_MPC85xx /* MPC85xx/PQ3 platform */ #define CONFIG_MP /* support multiple processors */ #ifndef CONFIG_SYS_TEXT_BASE diff --git a/include/configs/km/kmp204x-common.h b/include/configs/km/kmp204x-common.h index 0463fcbac7..2466649b15 100644 --- a/include/configs/km/kmp204x-common.h +++ b/include/configs/km/kmp204x-common.h @@ -32,7 +32,6 @@ #define CONFIG_E500 /* BOOKE e500 family */ #define CONFIG_E500MC /* BOOKE e500mc family */ #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ -#define CONFIG_MPC85xx /* MPC85xx/PQ3 platform */ #define CONFIG_FSL_CORENET /* Freescale CoreNet platform */ #define CONFIG_MP /* support multiple processors */ diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 95e23ac585..117484da87 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -265,7 +265,6 @@ /* High Level Configuration Options */ #define CONFIG_BOOKE #define CONFIG_E500 -#define CONFIG_MPC85xx #define CONFIG_MP diff --git a/include/configs/p1_twr.h b/include/configs/p1_twr.h index a7fe90ff3b..601bac72e0 100644 --- a/include/configs/p1_twr.h +++ b/include/configs/p1_twr.h @@ -42,7 +42,6 @@ /* High Level Configuration Options */ #define CONFIG_BOOKE #define CONFIG_E500 -#define CONFIG_MPC85xx #define CONFIG_MP diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h index 4912d69dcf..f28f350fcc 100644 --- a/include/configs/sbc8548.h +++ b/include/configs/sbc8548.h @@ -38,7 +38,6 @@ */ #define CONFIG_BOOKE 1 /* BOOKE */ #define CONFIG_E500 1 /* BOOKE e500 family */ -#define CONFIG_MPC85xx 1 /* MPC8540/60/55/41/48 */ #define CONFIG_MPC8548 1 /* MPC8548 specific */ #define CONFIG_SBC8548 1 /* SBC8548 board specific */ diff --git a/include/configs/socrates.h b/include/configs/socrates.h index fd590e4e12..c654a0e4eb 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -25,7 +25,6 @@ /* High Level Configuration Options */ #define CONFIG_BOOKE 1 /* BOOKE */ #define CONFIG_E500 1 /* BOOKE e500 family */ -#define CONFIG_MPC85xx 1 /* MPC8540/60/55/41 */ #define CONFIG_MPC8544 1 #define CONFIG_SOCRATES 1 diff --git a/include/configs/stxgp3.h b/include/configs/stxgp3.h index 2a9c9a349c..5fb40ebf8b 100644 --- a/include/configs/stxgp3.h +++ b/include/configs/stxgp3.h @@ -22,7 +22,6 @@ /* High Level Configuration Options */ #define CONFIG_BOOKE 1 /* BOOKE */ #define CONFIG_E500 1 /* BOOKE e500 family */ -#define CONFIG_MPC85xx 1 /* MPC8540/MPC8560 */ #define CONFIG_CPM2 1 /* has CPM2 */ #define CONFIG_STXGP3 1 /* Silicon Tx GPPP board specific*/ #define CONFIG_MPC8560 1 diff --git a/include/configs/stxssa.h b/include/configs/stxssa.h index d0cb68a0ed..914d821905 100644 --- a/include/configs/stxssa.h +++ b/include/configs/stxssa.h @@ -22,7 +22,6 @@ /* High Level Configuration Options */ #define CONFIG_BOOKE 1 /* BOOKE */ #define CONFIG_E500 1 /* BOOKE e500 family */ -#define CONFIG_MPC85xx 1 /* MPC8540/MPC8560 */ #define CONFIG_CPM2 1 /* has CPM2 */ #define CONFIG_STXSSA 1 /* Silicon Tx GPPP SSA board specific*/ #define CONFIG_MPC8560 1 diff --git a/include/configs/t4qds.h b/include/configs/t4qds.h index 74fef67f23..bd324ba2fa 100644 --- a/include/configs/t4qds.h +++ b/include/configs/t4qds.h @@ -17,7 +17,6 @@ #define CONFIG_E500 /* BOOKE e500 family */ #define CONFIG_E500MC /* BOOKE e500mc family */ #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ -#define CONFIG_MPC85xx /* MPC85xx/PQ3 platform */ #define CONFIG_MP /* support multiple processors */ #ifndef CONFIG_SYS_TEXT_BASE diff --git a/include/configs/xpedite520x.h b/include/configs/xpedite520x.h index f39d6f9105..baa30395aa 100644 --- a/include/configs/xpedite520x.h +++ b/include/configs/xpedite520x.h @@ -16,7 +16,6 @@ */ #define CONFIG_BOOKE 1 /* BOOKE */ #define CONFIG_E500 1 /* BOOKE e500 family */ -#define CONFIG_MPC85xx 1 /* MPC8540/60/55/41/48 */ #define CONFIG_MPC8548 1 #define CONFIG_XPEDITE5200 1 #define CONFIG_SYS_BOARD_NAME "XPedite5200" diff --git a/include/configs/xpedite537x.h b/include/configs/xpedite537x.h index e1bdf90de4..bdf55763d5 100644 --- a/include/configs/xpedite537x.h +++ b/include/configs/xpedite537x.h @@ -16,7 +16,6 @@ */ #define CONFIG_BOOKE 1 /* BOOKE */ #define CONFIG_E500 1 /* BOOKE e500 family */ -#define CONFIG_MPC85xx 1 /* MPC8540/60/55/41/48 */ #define CONFIG_MPC8572 1 #define CONFIG_XPEDITE5370 1 #define CONFIG_SYS_BOARD_NAME "XPedite5370" diff --git a/include/configs/xpedite550x.h b/include/configs/xpedite550x.h index 2328c7a62e..0b24f3e8d7 100644 --- a/include/configs/xpedite550x.h +++ b/include/configs/xpedite550x.h @@ -16,7 +16,6 @@ */ #define CONFIG_BOOKE 1 /* BOOKE */ #define CONFIG_E500 1 /* BOOKE e500 family */ -#define CONFIG_MPC85xx 1 /* MPC8540/60/55/41/48 */ #define CONFIG_P2020 1 #define CONFIG_XPEDITE550X 1 #define CONFIG_SYS_BOARD_NAME "XPedite5500" -- cgit v1.2.1 From 84acd1e1794cc86e8c13a2cd7b88cb199d3e526e Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Wed, 15 Jan 2014 10:14:21 +0900 Subject: powerpc: mpc86xx: move CONFIG_MPC86xx definition to CPU config.mk Define CONFIG_MPC86xx in arch/powerpc/cpu/mpc86xx/config.mk because all target boards with mpc86xx cpu define it. Signed-off-by: Masahiro Yamada --- include/configs/MPC8610HPCD.h | 1 - include/configs/MPC8641HPCN.h | 1 - include/configs/sbc8641d.h | 1 - include/configs/xpedite517x.h | 1 - 4 files changed, 4 deletions(-) (limited to 'include') diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h index f930fcde34..e6d570a6af 100644 --- a/include/configs/MPC8610HPCD.h +++ b/include/configs/MPC8610HPCD.h @@ -14,7 +14,6 @@ #define __CONFIG_H /* High Level Configuration Options */ -#define CONFIG_MPC86xx 1 /* MPC86xx */ #define CONFIG_MPC8610 1 /* MPC8610 specific */ #define CONFIG_MPC8610HPCD 1 /* MPC8610HPCD board specific */ #define CONFIG_LINUX_RESET_VEC 0x100 /* Reset vector used by Linux */ diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h index 65d61c28d1..7443acec80 100644 --- a/include/configs/MPC8641HPCN.h +++ b/include/configs/MPC8641HPCN.h @@ -17,7 +17,6 @@ #define __CONFIG_H /* High Level Configuration Options */ -#define CONFIG_MPC86xx 1 /* MPC86xx */ #define CONFIG_MPC8641 1 /* MPC8641 specific */ #define CONFIG_MPC8641HPCN 1 /* MPC8641HPCN board specific */ #define CONFIG_MP 1 /* support multiple processors */ diff --git a/include/configs/sbc8641d.h b/include/configs/sbc8641d.h index 78f8219c5f..8eb7276618 100644 --- a/include/configs/sbc8641d.h +++ b/include/configs/sbc8641d.h @@ -21,7 +21,6 @@ #define __CONFIG_H /* High Level Configuration Options */ -#define CONFIG_MPC86xx 1 /* MPC86xx */ #define CONFIG_MPC8641 1 /* MPC8641 specific */ #define CONFIG_SBC8641D 1 /* SBC8641D board specific */ #define CONFIG_MP 1 /* support multiple processors */ diff --git a/include/configs/xpedite517x.h b/include/configs/xpedite517x.h index 88d7f88cc0..cbf4b8e0f7 100644 --- a/include/configs/xpedite517x.h +++ b/include/configs/xpedite517x.h @@ -14,7 +14,6 @@ /* * High Level Configuration Options */ -#define CONFIG_MPC86xx 1 /* MPC86xx */ #define CONFIG_MPC8641 1 /* MPC8641 specific */ #define CONFIG_XPEDITE5140 1 /* MPC8641HPCN board specific */ #define CONFIG_SYS_BOARD_NAME "XPedite5170" -- cgit v1.2.1 From 347d06dec43e2e6ca50f975d5472072a977c528f Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Wed, 15 Jan 2014 13:06:41 +0900 Subject: sandbox: fix the return type of os_free() function The function os_free() returns nothing. Its return type should be "void" rather than "void *". Signed-off-by: Masahiro Yamada --- include/os.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/os.h b/include/os.h index b65fba4301..d6d6e5794e 100644 --- a/include/os.h +++ b/include/os.h @@ -113,7 +113,7 @@ void *os_malloc(size_t length); * * \param ptr Pointer to memory block to free */ -void *os_free(void *ptr); +void os_free(void *ptr); /** * Reallocate previously-allocated memory to increase/decrease space -- cgit v1.2.1 From b2a6dfe4f8d263b9aa45929f1a40cd1143775a81 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Thu, 16 Jan 2014 11:03:07 +0900 Subject: powerpc: mpc5xxx: remove redundant CONFIG_MPC5xxx definition We do not have to define CONFIG_MPC5xxx in board config headers (and start.S) because it is defined in arch/powerpc/cpu/mpc5xxx/config.mk. Signed-off-by: Masahiro Yamada --- include/configs/BC3450.h | 3 +-- include/configs/IceCube.h | 3 +-- include/configs/MVBC_P.h | 1 - include/configs/MVSMR.h | 1 - include/configs/PM520.h | 3 +-- include/configs/TB5200.h | 3 +-- include/configs/TOP5200.h | 3 +-- include/configs/TQM5200.h | 3 +-- include/configs/Total5200.h | 3 +-- include/configs/a3m071.h | 3 +-- include/configs/a4m072.h | 3 +-- include/configs/aev.h | 3 +-- include/configs/canmb.h | 3 +-- include/configs/cm5200.h | 3 +-- include/configs/cpci5200.h | 3 +-- include/configs/digsy_mtc.h | 3 +-- include/configs/galaxy5200.h | 3 +-- include/configs/hmi1001.h | 5 ++--- include/configs/inka4x0.h | 5 ++--- include/configs/ipek01.h | 5 ++--- include/configs/jupiter.h | 3 +-- include/configs/manroland/mpc5200-common.h | 3 +-- include/configs/mcc200.h | 3 +-- include/configs/mecp5200.h | 3 +-- include/configs/motionpro.h | 3 +-- include/configs/munices.h | 3 +-- include/configs/o2dnt-common.h | 1 - include/configs/pcm030.h | 3 +-- include/configs/pf5200.h | 3 +-- include/configs/v38b.h | 1 - 30 files changed, 29 insertions(+), 59 deletions(-) (limited to 'include') diff --git a/include/configs/BC3450.h b/include/configs/BC3450.h index 377db7be9a..802e9cce1f 100644 --- a/include/configs/BC3450.h +++ b/include/configs/BC3450.h @@ -22,8 +22,7 @@ /* * High Level Configuration Options */ -#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ -#define CONFIG_MPC5200 1 /* (more precisely a MPC5200 CPU) */ +#define CONFIG_MPC5200 1 /* This is a MPC5200 CPU */ #define CONFIG_TQM5200 1 /* ... on a TQM5200 module */ #define CONFIG_BC3450 1 /* ... on a BC3450 mainboard */ diff --git a/include/configs/IceCube.h b/include/configs/IceCube.h index 52368f8ea0..1861aa86d9 100644 --- a/include/configs/IceCube.h +++ b/include/configs/IceCube.h @@ -13,8 +13,7 @@ * (easy to change) */ -#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ -#define CONFIG_MPC5200 1 /* (more precisely a MPC5200 CPU) */ +#define CONFIG_MPC5200 1 /* This is a MPC5200 CPU */ #define CONFIG_ICECUBE 1 /* ... on IceCube board */ /* diff --git a/include/configs/MVBC_P.h b/include/configs/MVBC_P.h index 9d49de7c61..99e4e9051f 100644 --- a/include/configs/MVBC_P.h +++ b/include/configs/MVBC_P.h @@ -13,7 +13,6 @@ #include -#define CONFIG_MPC5xxx 1 #define CONFIG_MPC5200 1 #ifndef CONFIG_SYS_TEXT_BASE diff --git a/include/configs/MVSMR.h b/include/configs/MVSMR.h index f69b9a856c..bb565b602e 100644 --- a/include/configs/MVSMR.h +++ b/include/configs/MVSMR.h @@ -13,7 +13,6 @@ #include -#define CONFIG_MPC5xxx 1 #define CONFIG_MPC5200 1 #ifndef CONFIG_SYS_TEXT_BASE diff --git a/include/configs/PM520.h b/include/configs/PM520.h index 557a8bad7e..de46216422 100644 --- a/include/configs/PM520.h +++ b/include/configs/PM520.h @@ -14,8 +14,7 @@ */ #define CONFIG_MPC5200 -#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ -#define CONFIG_PM520 1 /* ... on PM520 board */ +#define CONFIG_PM520 1 /* PM520 board */ #define CONFIG_SYS_TEXT_BASE 0xfff00000 diff --git a/include/configs/TB5200.h b/include/configs/TB5200.h index 90f7fc4d79..b4daedceea 100644 --- a/include/configs/TB5200.h +++ b/include/configs/TB5200.h @@ -16,8 +16,7 @@ * (easy to change) */ -#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ -#define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */ +#define CONFIG_MPC5200 1 /* This is an MPC5200 CPU */ #define CONFIG_TQM5200 1 /* ... on TQM5200 module */ #define CONFIG_TB5200 1 /* ... on a TB5200 base board */ diff --git a/include/configs/TOP5200.h b/include/configs/TOP5200.h index 7aba00914d..92128b9588 100644 --- a/include/configs/TOP5200.h +++ b/include/configs/TOP5200.h @@ -25,8 +25,7 @@ * (easy to change) */ -#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ -#define CONFIG_MPC5200 1 /* More exactly a MPC5200 */ +#define CONFIG_MPC5200 1 /* This is a MPC5200 CPU */ #define CONFIG_TOP5200 1 /* ... on TOP5200 board - we need this for FEC.C */ /* diff --git a/include/configs/TQM5200.h b/include/configs/TQM5200.h index 13500ee139..69c0336cae 100644 --- a/include/configs/TQM5200.h +++ b/include/configs/TQM5200.h @@ -16,8 +16,7 @@ * (easy to change) */ -#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ -#define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */ +#define CONFIG_MPC5200 1 /* This is an MPC5200 CPU */ #define CONFIG_TQM5200 1 /* ... on TQM5200 module */ #undef CONFIG_TQM5200_REV100 /* define for revision 100 modules */ diff --git a/include/configs/Total5200.h b/include/configs/Total5200.h index acc4fdc668..a58eecab84 100644 --- a/include/configs/Total5200.h +++ b/include/configs/Total5200.h @@ -24,8 +24,7 @@ * (easy to change) */ -#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ -#define CONFIG_MPC5200 1 /* (more precisely a MPC5200 CPU) */ +#define CONFIG_MPC5200 1 /* This is a MPC5200 CPU */ #define CONFIG_TOTAL5200 1 /* ... on Total5200 board */ /* diff --git a/include/configs/a3m071.h b/include/configs/a3m071.h index d151869d7b..1e65cd1465 100644 --- a/include/configs/a3m071.h +++ b/include/configs/a3m071.h @@ -13,8 +13,7 @@ */ #define CONFIG_MPC5200 -#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ -#define CONFIG_A3M071 /* ... on A3M071 board */ +#define CONFIG_A3M071 /* A3M071 board */ #define CONFIG_SYS_TEXT_BASE 0x01000000 /* boot low for 32 MiB boards */ diff --git a/include/configs/a4m072.h b/include/configs/a4m072.h index 64737020f5..cc88ac1618 100644 --- a/include/configs/a4m072.h +++ b/include/configs/a4m072.h @@ -16,8 +16,7 @@ * (easy to change) */ -#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ -#define CONFIG_MPC5200 1 /* (more precisely a MPC5200 CPU) */ +#define CONFIG_MPC5200 1 /* This is a MPC5200 CPU */ #define CONFIG_A4M072 1 /* ... on A4M072 board */ #define CONFIG_MPC5200_DDR 1 /* ... use DDR RAM */ diff --git a/include/configs/aev.h b/include/configs/aev.h index 0eafb3ca74..2dffcfbed3 100644 --- a/include/configs/aev.h +++ b/include/configs/aev.h @@ -16,8 +16,7 @@ * (easy to change) */ -#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ -#define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */ +#define CONFIG_MPC5200 1 /* This is an MPC5200 CPU */ #define CONFIG_TQM5200 1 /* ... on TQM5200 module */ #undef CONFIG_TQM5200_REV100 /* define for revision 100 modules */ #define CONFIG_STK52XX 1 /* ... on a STK52XX base board */ diff --git a/include/configs/canmb.h b/include/configs/canmb.h index d929bde8f2..c90179380f 100644 --- a/include/configs/canmb.h +++ b/include/configs/canmb.h @@ -13,8 +13,7 @@ * (easy to change) */ -#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ -#define CONFIG_MPC5200 1 /* More exactly a MPC5200 */ +#define CONFIG_MPC5200 1 /* This is a MPC5200 CPU */ #define CONFIG_CANMB 1 /* ... on canmb board - we need this for FEC.C */ /* diff --git a/include/configs/cm5200.h b/include/configs/cm5200.h index ac3d6bd343..7c693d62d1 100644 --- a/include/configs/cm5200.h +++ b/include/configs/cm5200.h @@ -11,8 +11,7 @@ /* * High Level Configuration Options */ -#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ -#define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */ +#define CONFIG_MPC5200 1 /* This is an MPC5200 CPU */ #define CONFIG_CM5200 1 /* ... on CM5200 platform */ #define CONFIG_SYS_TEXT_BASE 0xfc000000 diff --git a/include/configs/cpci5200.h b/include/configs/cpci5200.h index db5ceadba6..ec926fd22d 100644 --- a/include/configs/cpci5200.h +++ b/include/configs/cpci5200.h @@ -23,8 +23,7 @@ * (easy to change) */ -#define CONFIG_MPC5200 1 /* This is an MPC5xxx CPU */ -#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ +#define CONFIG_MPC5200 1 /* This is an MPC5200 CPU */ #define CONFIG_ICECUBE 1 /* ... on IceCube board */ #define CONFIG_CPCI5200 1 /* ... on CPCI5200 board */ #define CONFIG_MPC5200_DDR 1 /* ... use DDR RAM */ diff --git a/include/configs/digsy_mtc.h b/include/configs/digsy_mtc.h index bc5853eb5c..2a8cb3940b 100644 --- a/include/configs/digsy_mtc.h +++ b/include/configs/digsy_mtc.h @@ -20,8 +20,7 @@ * High Level Configuration Options */ -#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ -#define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */ +#define CONFIG_MPC5200 1 /* This is an MPC5200 CPU */ #define CONFIG_DIGSY_MTC 1 /* ... on InterControl digsyMTC board */ /* diff --git a/include/configs/galaxy5200.h b/include/configs/galaxy5200.h index 560363d237..b555d82ddc 100644 --- a/include/configs/galaxy5200.h +++ b/include/configs/galaxy5200.h @@ -23,8 +23,7 @@ * High Level Configuration Options * (easy to change) */ -#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ -#define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */ +#define CONFIG_MPC5200 1 /* This is an MPC5200 CPU */ #define CONFIG_SYS_MPC5XXX_CLKIN 33333333 /* ... running at 33.333333MHz */ /* diff --git a/include/configs/hmi1001.h b/include/configs/hmi1001.h index 1c74a2e96e..a1a88b5e33 100644 --- a/include/configs/hmi1001.h +++ b/include/configs/hmi1001.h @@ -13,9 +13,8 @@ * (easy to change) */ -#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ -#define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */ -#define CONFIG_HMI1001 1 /* HMI1001 board */ +#define CONFIG_MPC5200 1 /* This is an MPC5200 CPU */ +#define CONFIG_HMI1001 1 /* HMI1001 board */ #ifndef CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_TEXT_BASE 0xFFF00000 diff --git a/include/configs/inka4x0.h b/include/configs/inka4x0.h index 608d7592f1..f321975c47 100644 --- a/include/configs/inka4x0.h +++ b/include/configs/inka4x0.h @@ -16,9 +16,8 @@ * (easy to change) */ -#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ -#define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */ -#define CONFIG_INKA4X0 1 /* INKA4x0 board */ +#define CONFIG_MPC5200 1 /* This is an MPC5200 CPU */ +#define CONFIG_INKA4X0 1 /* INKA4x0 board */ /* * Valid values for CONFIG_SYS_TEXT_BASE are: diff --git a/include/configs/ipek01.h b/include/configs/ipek01.h index 408168b9bc..41ced15c48 100644 --- a/include/configs/ipek01.h +++ b/include/configs/ipek01.h @@ -16,9 +16,8 @@ */ #define CONFIG_MPC5200 -#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ -#define CONFIG_MPX5200 1 /* ... on MPX5200 board */ -#define CONFIG_MPC5200_DDR 1 /* ... use DDR RAM */ +#define CONFIG_MPX5200 1 /* MPX5200 board */ +#define CONFIG_MPC5200_DDR 1 /* use DDR RAM */ #define CONFIG_IPEK01 /* Motherboard is ipek01 */ #define CONFIG_SYS_TEXT_BASE 0xfc000000 diff --git a/include/configs/jupiter.h b/include/configs/jupiter.h index 71e8ececfc..7dfaa221ee 100644 --- a/include/configs/jupiter.h +++ b/include/configs/jupiter.h @@ -13,8 +13,7 @@ * (easy to change) */ -#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ -#define CONFIG_MPC5200 1 /* especially an MPC5200 */ +#define CONFIG_MPC5200 1 /* This is an MPC5200 CPU */ #define CONFIG_JUPITER 1 /* ... on Jupiter board */ /* diff --git a/include/configs/manroland/mpc5200-common.h b/include/configs/manroland/mpc5200-common.h index 21b17f6e2c..60e8716a79 100644 --- a/include/configs/manroland/mpc5200-common.h +++ b/include/configs/manroland/mpc5200-common.h @@ -12,8 +12,7 @@ * High Level Configuration Options * (easy to change) */ -#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ -#define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */ +#define CONFIG_MPC5200 1 /* MPC5200 CPU */ #define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ diff --git a/include/configs/mcc200.h b/include/configs/mcc200.h index 1b9e2d0f90..a317782dbe 100644 --- a/include/configs/mcc200.h +++ b/include/configs/mcc200.h @@ -14,8 +14,7 @@ */ #define CONFIG_MPC5200 -#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ -#define CONFIG_MCC200 1 /* ... on MCC200 board */ +#define CONFIG_MCC200 1 /* MCC200 board */ /* * Valid values for CONFIG_SYS_TEXT_BASE are: diff --git a/include/configs/mecp5200.h b/include/configs/mecp5200.h index 047e171100..b270429dd8 100644 --- a/include/configs/mecp5200.h +++ b/include/configs/mecp5200.h @@ -23,8 +23,7 @@ * (easy to change) */ -#define CONFIG_MPC5200 1 /* This is an MPC5xxx CPU */ -#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ +#define CONFIG_MPC5200 1 /* This is an MPC5200 CPU */ #define CONFIG_ICECUBE 1 /* ... on IceCube board */ #define CONFIG_MECP5200 1 /* ... on MECP5200 board */ #define CONFIG_MPC5200_DDR 1 /* ... use DDR RAM */ diff --git a/include/configs/motionpro.h b/include/configs/motionpro.h index 8071ac3808..e8b05932a1 100644 --- a/include/configs/motionpro.h +++ b/include/configs/motionpro.h @@ -15,8 +15,7 @@ */ /* CPU and board */ -#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ -#define CONFIG_MPC5200 1 /* More exactly a MPC5200 */ +#define CONFIG_MPC5200 1 /* This is a MPC5200 CPU */ #define CONFIG_MOTIONPRO 1 /* ... on Promess Motion-PRO board */ #define CONFIG_HIGH_BATS 1 /* High BATs supported */ diff --git a/include/configs/munices.h b/include/configs/munices.h index 3bda8ebea4..e65a14af23 100644 --- a/include/configs/munices.h +++ b/include/configs/munices.h @@ -11,8 +11,7 @@ * High Level Configuration Options * (easy to change) */ -#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ -#define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */ +#define CONFIG_MPC5200 1 /* This is an MPC5200 CPU */ #define CONFIG_MPC5200_DDR 1 /* (with DDR-SDRAM) */ #define CONFIG_MUNICES 1 /* ... on MUNICes board */ diff --git a/include/configs/o2dnt-common.h b/include/configs/o2dnt-common.h index ce08454994..18714eae1e 100644 --- a/include/configs/o2dnt-common.h +++ b/include/configs/o2dnt-common.h @@ -16,7 +16,6 @@ /* * High Level Configuration Options */ -#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ #define CONFIG_MPC5200 #define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* running at 33.000000MHz */ diff --git a/include/configs/pcm030.h b/include/configs/pcm030.h index 5c6188955d..31a93c87de 100644 --- a/include/configs/pcm030.h +++ b/include/configs/pcm030.h @@ -20,8 +20,7 @@ High Level Configuration Options (easy to change) -----------------------------------------------------------------------------*/ -#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ -#define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */ +#define CONFIG_MPC5200 1 /* This is an MPC5200 CPU */ #define CONFIG_MPC5200_DDR 1 /* (with DDR-SDRAM) */ #define CONFIG_PHYCORE_MPC5200B_TINY 1 /* phyCORE-MPC5200B -> */ /* FEC configuration and IDE */ diff --git a/include/configs/pf5200.h b/include/configs/pf5200.h index 327be3fde9..be76478c30 100644 --- a/include/configs/pf5200.h +++ b/include/configs/pf5200.h @@ -22,8 +22,7 @@ * (easy to change) */ -#define CONFIG_MPC5200 1 /* This is an MPC5xxx CPU */ -#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ +#define CONFIG_MPC5200 1 /* This is an MPC5200 CPU */ #define CONFIG_ICECUBE 1 /* ... on IceCube board */ #define CONFIG_PF5200 1 /* ... on PF5200 board */ #define CONFIG_MPC5200_DDR 1 /* ... use DDR RAM */ diff --git a/include/configs/v38b.h b/include/configs/v38b.h index 0c544350eb..7f6b0c7cb2 100644 --- a/include/configs/v38b.h +++ b/include/configs/v38b.h @@ -12,7 +12,6 @@ * High Level Configuration Options * (easy to change) */ -#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ #define CONFIG_MPC5200 1 /* This is an MPC5200 CPU */ #define CONFIG_V38B 1 /* ...on V38B board */ -- cgit v1.2.1 From 773b5940b5f2fb5d1041c6f4db5796121ccd29c5 Mon Sep 17 00:00:00 2001 From: Dan Murphy Date: Thu, 16 Jan 2014 11:23:29 -0600 Subject: spl: common: Move FAT funcs to a common file Move the FAT functions to a common location for reuse. Signed-off-by: Dan Murphy --- include/spl.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'include') diff --git a/include/spl.h b/include/spl.h index 2bd6e16a0e..cd5cd26501 100644 --- a/include/spl.h +++ b/include/spl.h @@ -11,6 +11,7 @@ #include #include + /* Boot type */ #define MMCSD_MODE_UNDEFINED 0 #define MMCSD_MODE_RAW 1 @@ -60,6 +61,10 @@ void spl_spi_load_image(void); /* Ethernet SPL functions */ void spl_net_load_image(const char *device); +/* SPL FAT image functions */ +int spl_load_image_fat(block_dev_desc_t *block_dev, int partition, const char *filename); +int spl_load_image_fat_os(block_dev_desc_t *block_dev, int partition); + #ifdef CONFIG_SPL_BOARD_INIT void spl_board_init(void); #endif -- cgit v1.2.1 From 8cffe5bd0d601f64eca78d28b8a710ad6ca8edd2 Mon Sep 17 00:00:00 2001 From: Dan Murphy Date: Thu, 16 Jan 2014 11:23:30 -0600 Subject: spl: common: Support for USB MSD FAT image loading Add SPL support to be able to detect a USB Mass Storage device connected to a USB host. Once a USB Mass storage device is detected the SPL will load the u-boot.img from a FAT partition to target address. Signed-off-by: Dan Murphy --- include/spl.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/spl.h b/include/spl.h index cd5cd26501..5e248561f1 100644 --- a/include/spl.h +++ b/include/spl.h @@ -61,6 +61,9 @@ void spl_spi_load_image(void); /* Ethernet SPL functions */ void spl_net_load_image(const char *device); +/* USB SPL functions */ +void spl_usb_load_image(void); + /* SPL FAT image functions */ int spl_load_image_fat(block_dev_desc_t *block_dev, int partition, const char *filename); int spl_load_image_fat_os(block_dev_desc_t *block_dev, int partition); -- cgit v1.2.1 From 2b36fe579c975f0e47761e5fcb602b8ae4537c6e Mon Sep 17 00:00:00 2001 From: Dan Murphy Date: Thu, 16 Jan 2014 11:23:31 -0600 Subject: arm: am43xx: Add USB spl boot support Add the USB host boot support for the am43xx evm Add the macros to boot from a usb drive in uBoot Signed-off-by: Dan Murphy --- include/configs/am43xx_evm.h | 46 ++++++++++++++++++++++++++++++++++++++------ 1 file changed, 40 insertions(+), 6 deletions(-) (limited to 'include') diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h index 4de495a15a..f45deeb351 100644 --- a/include/configs/am43xx_evm.h +++ b/include/configs/am43xx_evm.h @@ -69,6 +69,11 @@ #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" +/* SPL USB Support */ +#define CONFIG_SPL_USB_SUPPORT +#define CONFIG_SPL_USB_HOST_SUPPORT +#define CONFIG_SYS_USB_FAT_BOOT_PARTITION 1 + #define CONFIG_CMD_USB #define CONFIG_USB_HOST #define CONFIG_USB_XHCI @@ -94,26 +99,34 @@ "mmcdev=0\0" \ "mmcroot=/dev/mmcblk0p2 rw\0" \ "mmcrootfstype=ext4 rootwait\0" \ + "usbroot=/dev/sda2 rw\0" \ + "usbrootfstype=ext4 rootwait\0" \ + "usbdev=0\0" \ "ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=${rdaddr},64M\0" \ "ramrootfstype=ext2\0" \ "mmcargs=setenv bootargs console=${console} " \ "${optargs} " \ "root=${mmcroot} " \ "rootfstype=${mmcrootfstype}\0" \ + "usbargs=setenv bootargs console=${console} " \ + "${optargs} " \ + "root=${usbroot} " \ + "rootfstype=${usbrootfstype}\0" \ "bootenv=uEnv.txt\0" \ - "loadbootenv=load mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \ + "loadbootenv=load ${devtype} ${devnum} ${loadaddr} ${bootenv}\0" \ "importbootenv=echo Importing environment from mmc ...; " \ "env import -t $loadaddr $filesize\0" \ "ramargs=setenv bootargs console=${console} " \ "${optargs} " \ "root=${ramroot} " \ "rootfstype=${ramrootfstype}\0" \ - "loadramdisk=load mmc ${mmcdev} ${rdaddr} ramdisk.gz\0" \ - "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \ - "loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \ + "loadramdisk=load ${devtype} ${devnum} ${rdaddr} ramdisk.gz\0" \ + "loadimage=load ${devtype} ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \ + "loadfdt=load ${devtype} ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \ "mmcboot=mmc dev ${mmcdev}; " \ + "setenv devnum ${mmcdev}; " \ "if mmc rescan; then " \ - "echo SD/MMC found on device ${mmcdev};" \ + "echo SD/MMC found on device ${devnum};" \ "if run loadbootenv; then " \ "echo Loaded environment from ${bootenv};" \ "run importbootenv;" \ @@ -129,6 +142,26 @@ "bootz ${loadaddr} - ${fdtaddr}; " \ "fi;" \ "fi;\0" \ + "usbboot=" \ + "setenv devnum ${usbdev}; " \ + "setenv devtype usb; " \ + "usb start ${usbdev}; " \ + "if usb dev ${usbdev}; then " \ + "if run loadbootenv; then " \ + "echo Loaded environment from ${bootenv};" \ + "run importbootenv;" \ + "fi;" \ + "if test -n $uenvcmd; then " \ + "echo Running uenvcmd ...;" \ + "run uenvcmd;" \ + "fi;" \ + "if run loadimage; then " \ + "run loadfdt; " \ + "echo Booting from usb ${usbdev}...; " \ + "run usbargs;" \ + "bootz ${loadaddr} - ${fdtaddr}; " \ + "fi;" \ + "fi\0" \ "findfdt="\ "if test $board_name = AM43EPOS; then " \ "setenv fdtfile am43x-epos-evm.dtb; fi; " \ @@ -139,7 +172,8 @@ #define CONFIG_BOOTCOMMAND \ "run findfdt; " \ - "run mmcboot;" + "run mmcboot;" \ + "run usbboot;" #endif #endif /* __CONFIG_AM43XX_EVM_H */ -- cgit v1.2.1