From a676cca41d52a89d9e3841170880e1234ec45606 Mon Sep 17 00:00:00 2001 From: Jason Liu Date: Wed, 17 Nov 2010 16:01:18 +0800 Subject: mx51evk: savenv or env save command does not work fix saveenv or env save command not work on mx51evk board. with this patch, we can use savenv or env save to store enviroments to mmc card slot 0 Signed-off-by: Jason Liu --- include/configs/mx51evk.h | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index f98438d637..b4e57387af 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -216,8 +216,9 @@ */ #define CONFIG_SYS_NO_FLASH -#define CONFIG_ENV_SECT_SIZE (128 * 1024) -#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE -#define CONFIG_ENV_IS_NOWHERE +#define CONFIG_ENV_OFFSET (6 * 64 * 1024) +#define CONFIG_ENV_SIZE (8 * 1024) +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_SYS_MMC_ENV_DEV 0 #endif -- cgit v1.2.1 From de9b5b12a7524d466c9f75b2dd7fb7f43b3ed2ea Mon Sep 17 00:00:00 2001 From: Semih Hazar Date: Thu, 17 Dec 2009 15:07:22 +0200 Subject: Remove duplicate #defines in atngw100.h and mimc200.h Two configuration include files had duplicate CONFIG_DOS_PARTITION definitions with the same value. This patch does not effect anything, just trims unnecessary text. Signed-off-by: Semih Hazar --- include/configs/atngw100.h | 2 -- include/configs/mimc200.h | 2 -- 2 files changed, 4 deletions(-) (limited to 'include') diff --git a/include/configs/atngw100.h b/include/configs/atngw100.h index 83056b6fd0..92491ca09d 100644 --- a/include/configs/atngw100.h +++ b/include/configs/atngw100.h @@ -104,8 +104,6 @@ #define CONFIG_BOOTP_SUBNETMASK #define CONFIG_BOOTP_GATEWAY -#define CONFIG_DOS_PARTITION 1 - /* * Command line configuration. */ diff --git a/include/configs/mimc200.h b/include/configs/mimc200.h index 6ed9e75bb4..16e2ec62ee 100644 --- a/include/configs/mimc200.h +++ b/include/configs/mimc200.h @@ -109,8 +109,6 @@ #define CONFIG_BOOTP_SUBNETMASK #define CONFIG_BOOTP_GATEWAY -#define CONFIG_DOS_PARTITION 1 - /* * Command line configuration. */ -- cgit v1.2.1 From bb7fc5744dd696552092cee571041d7df3128dbe Mon Sep 17 00:00:00 2001 From: Horst Kronstorfer Date: Tue, 4 May 2010 12:37:36 +0200 Subject: Added PCI_DEVICE_ID_PLX_9030. Added PCI device ID for the PLXTech PCI 9030 bridge. Signed-off-by: Horst Kronstorfer --- include/pci_ids.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/pci_ids.h b/include/pci_ids.h index dcc381d301..cb8398d2c0 100644 --- a/include/pci_ids.h +++ b/include/pci_ids.h @@ -882,6 +882,7 @@ #define PCI_DEVICE_ID_PLX_SPCOM200 0x1103 #define PCI_DEVICE_ID_PLX_DJINN_ITOO 0x1151 #define PCI_DEVICE_ID_PLX_R753 0x1152 +#define PCI_DEVICE_ID_PLX_9030 0x9030 #define PCI_DEVICE_ID_PLX_9050 0x9050 #define PCI_DEVICE_ID_PLX_9060 0x9060 #define PCI_DEVICE_ID_PLX_9060ES 0x906E -- cgit v1.2.1 From 35cf884de2557461df0042f35d3bcc187e629545 Mon Sep 17 00:00:00 2001 From: Dirk Behme Date: Sun, 28 Nov 2010 20:00:12 -0500 Subject: OMAP4: SDP4430: Disable CMD_NFS This patch fixes the SDB4430 build after commit 6d8962e814c15807dd6ac5757904be2a02d187b8 by explicitly disabling CMD_NFS. >From the commit message for "Switch from archive libraries to partial linking": This commit reveals board configurations that exclude some features but include source files that depend these disabled features in the build, resulting in undefined symbols. Known such cases include: - disabling CMD_NET but not CMD_NFS; - enabling CONFIG_OF_LIBFDT but not CONFIG_QE. Signed-off-by: Dirk Behme Signed-off-by: Sandeep Paulraj --- include/configs/omap4_sdp4430.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/omap4_sdp4430.h b/include/configs/omap4_sdp4430.h index ed0bd41f7d..d2883336b9 100644 --- a/include/configs/omap4_sdp4430.h +++ b/include/configs/omap4_sdp4430.h @@ -139,6 +139,7 @@ /* Disabled commands */ #undef CONFIG_CMD_NET +#undef CONFIG_CMD_NFS #undef CONFIG_CMD_FPGA /* FPGA configuration Support */ #undef CONFIG_CMD_IMLS /* List all found images */ -- cgit v1.2.1 From 84c611d33bebd4c37ee0dd8cd1e9468c75a9798b Mon Sep 17 00:00:00 2001 From: Enric Balletbo i Serra Date: Mon, 29 Nov 2010 16:30:47 -0500 Subject: ARMV7: OMAP3: Fix build failure for igep0030 machine Seems that if CONFIG_CMD_NET is undefined we should also undefine CONFIG_CMD_NFS, otherwise build fails with various undefined reference like: net/libnet.o: In function `rpc_req': u-boot/net/nfs.c:193: undefined reference to `NetEthHdrSize' u-boot/net/nfs.c:202: undefined reference to `NetSendUDPPacket' u-boot/net/nfs.c:203: undefined reference to `NetTxPacket' u-boot/net/nfs.c:203: undefined reference to `NetServerEther' This patch adds the undef CONFIG_CMD_NFS in configuration file. Signed-off-by: Enric Balletbo i Serra Signed-off-by: Sandeep Paulraj --- include/configs/igep0030.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/igep0030.h b/include/configs/igep0030.h index d61793c33d..1325bfa017 100644 --- a/include/configs/igep0030.h +++ b/include/configs/igep0030.h @@ -110,6 +110,7 @@ #define CONFIG_MTD_DEVICE #undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ +#undef CONFIG_CMD_NFS /* nfs */ #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ #undef CONFIG_CMD_IMLS /* List all found images */ -- cgit v1.2.1 From f899198a7f7bff6e6b1ec9c3478c35fcede9a588 Mon Sep 17 00:00:00 2001 From: Sanjeev Premi Date: Mon, 29 Nov 2010 16:32:47 -0500 Subject: omap3evm: Use GENERATED_GBL_DATA_SIZE The macro CONFIG_SYS_GBL_DATA_SIZE has been replaced with GENERATED_GBL_DATA_SIZE. Also define macros: CONFIG_SYS_INIT_RAM_ADDR and CONFIG_SYS_INIT_RAM_SIZE. Based on changes for omap3_beagle in the commit: 31bfcf1c5776df3d90286aa15104c45096d53dc6 Signed-off-by: Sanjeev Premi Signed-off-by: Sandeep Paulraj --- include/configs/omap3_evm.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h index 84b29866bc..5bdb3fd9ed 100644 --- a/include/configs/omap3_evm.h +++ b/include/configs/omap3_evm.h @@ -330,7 +330,11 @@ extern unsigned int boot_flash_type; * Support for relocation */ #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_INIT_SP_ADDR (LOW_LEVEL_SRAM_STACK - CONFIG_SYS_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 +#define CONFIG_SYS_INIT_RAM_SIZE 0x800 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) /* * Define the board revision statically -- cgit v1.2.1 From 13acfc6f7f8e61494d8b216e35e52da83cf13236 Mon Sep 17 00:00:00 2001 From: Vaibhav Hiremath Date: Mon, 29 Nov 2010 16:36:04 -0500 Subject: AM3517:Fix for ARM Relocation support Also change the CONFIG_SYS_TEXT_BASE to 0x80008000, required with relocation support. This is the load address for primary boot loader (x-loader). Signed-off-by: Vaibhav Hiremath Signed-off-by: Sandeep Paulraj --- include/configs/am3517_evm.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'include') diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index 9a9ba88907..3dda1e97e9 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -330,4 +330,10 @@ extern unsigned int boot_flash_sec; extern unsigned int boot_flash_type; #endif +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 +#define CONFIG_SYS_INIT_RAM_SIZE 0x800 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) #endif /* __CONFIG_H */ -- cgit v1.2.1 From aa82d5f2a6cf373463270ad5e3160ef906d99175 Mon Sep 17 00:00:00 2001 From: Vaibhav Hiremath Date: Mon, 29 Nov 2010 16:36:07 -0500 Subject: AM3517:Build FIX: undef CONFIG_CMD_NFS support Without CONFIG_CMD_NET support CONFIG_CMD_NFS leads to linking error, so disable CONFIG_CMD_NFS option. Signed-off-by: Vaibhav Hiremath Signed-off-by: Sandeep Paulraj --- include/configs/am3517_evm.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index 3dda1e97e9..70e8f07ba7 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -163,6 +163,7 @@ #define CONFIG_DRIVER_OMAP34XX_I2C 1 #undef CONFIG_CMD_NET +#undef CONFIG_CMD_NFS /* * Board NAND Info. */ -- cgit v1.2.1 From 98877c3c0efacb5c61068280b6441a61e2dc3a24 Mon Sep 17 00:00:00 2001 From: Minkyu Kang Date: Mon, 22 Nov 2010 20:26:46 +0900 Subject: S5P: smdkc100: fix for relocation Signed-off-by: Minkyu Kang Signed-off-by: Kyungmin Park --- include/configs/smdkc100.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h index e36b262a8e..fb8b43c06d 100644 --- a/include/configs/smdkc100.h +++ b/include/configs/smdkc100.h @@ -231,6 +231,8 @@ #define CONFIG_DOS_PARTITION 1 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - 0x1000000) + /* * Ethernet Contoller driver */ -- cgit v1.2.1 From 177feff303538c6cf8caaeb34e5243ca95563e1c Mon Sep 17 00:00:00 2001 From: Minkyu Kang Date: Mon, 22 Nov 2010 20:27:44 +0900 Subject: S5P: goni: fix for relocation Signed-off-by: Minkyu Kang Signed-off-by: Kyungmin Park --- include/configs/s5p_goni.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index 541aec05ff..f53e79810b 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -217,4 +217,6 @@ #define CONFIG_DOS_PARTITION 1 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - 0x1000000) + #endif /* __CONFIG_H */ -- cgit v1.2.1 From e2b5afc1bfa15a2f8a70d454612007755418f534 Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Wed, 24 Nov 2010 14:16:47 +0900 Subject: sh: r7780mp: Remove CONFIG_DRIVER_NE2000 from config Signed-off-by: Nobuhiro Iwamatsu --- include/configs/r7780mp.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/configs/r7780mp.h b/include/configs/r7780mp.h index 3416cb897e..802416f3e0 100644 --- a/include/configs/r7780mp.h +++ b/include/configs/r7780mp.h @@ -154,7 +154,6 @@ #define CONFIG_RTL8169 */ /* AX88796L Support(NE2000 base chip) */ -#define CONFIG_DRIVER_NE2000 #define CONFIG_DRIVER_AX88796L #define CONFIG_DRIVER_NE2000_BASE 0xA4100000 #endif -- cgit v1.2.1 From 5ec789f6cbdf30fccb8355dd78e98712789903db Mon Sep 17 00:00:00 2001 From: Dirk Behme Date: Tue, 30 Nov 2010 11:10:40 -0500 Subject: OMAP3: SDP3430: Fix ARM relocation support Signed-off-by: Dirk Behme Signed-off-by: Sandeep Paulraj --- include/configs/omap3_sdp3430.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'include') diff --git a/include/configs/omap3_sdp3430.h b/include/configs/omap3_sdp3430.h index a5eb6483b6..470898152e 100644 --- a/include/configs/omap3_sdp3430.h +++ b/include/configs/omap3_sdp3430.h @@ -309,6 +309,12 @@ #define CONFIG_STACKSIZE_FIQ (4 << 10) /* FIQ stack */ #endif +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 +#define CONFIG_SYS_INIT_RAM_SIZE 0x800 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) /* * SDRAM Memory Map */ -- cgit v1.2.1 From 25435c6cce5148469e2b8745b5139c8da6eebdbe Mon Sep 17 00:00:00 2001 From: Dirk Behme Date: Tue, 30 Nov 2010 11:10:45 -0500 Subject: OMAP3: Zoom1: Fix ARM relocation support Signed-off-by: Dirk Behme Signed-off-by: Sandeep Paulraj --- include/configs/omap3_zoom1.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'include') diff --git a/include/configs/omap3_zoom1.h b/include/configs/omap3_zoom1.h index d9e8ea010f..f7d06521e3 100644 --- a/include/configs/omap3_zoom1.h +++ b/include/configs/omap3_zoom1.h @@ -236,6 +236,12 @@ #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */ /* load address */ +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 +#define CONFIG_SYS_INIT_RAM_SIZE 0x800 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) /* * OMAP3 has 12 GP timers, they can be driven by the system clock * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). -- cgit v1.2.1 From 998f4caf6fd63fdaa86ab0f91a1a3ed5b9cdfb22 Mon Sep 17 00:00:00 2001 From: Dirk Behme Date: Tue, 30 Nov 2010 11:10:48 -0500 Subject: OMAP3: Zoom2: Fix ARM relocation support Signed-off-by: Dirk Behme Signed-off-by: Sandeep Paulraj --- include/configs/omap3_zoom2.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'include') diff --git a/include/configs/omap3_zoom2.h b/include/configs/omap3_zoom2.h index 41abe044ed..73779331ce 100644 --- a/include/configs/omap3_zoom2.h +++ b/include/configs/omap3_zoom2.h @@ -188,6 +188,12 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "usbtty=cdc_acm\0" \ +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 +#define CONFIG_SYS_INIT_RAM_SIZE 0x800 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) /* * Miscellaneous configurable options */ -- cgit v1.2.1 From 0b72585796d6e08abba56965644ea51748c4b1d2 Mon Sep 17 00:00:00 2001 From: Stefan Popa Date: Fri, 26 Nov 2010 17:09:40 +0000 Subject: mpc83xx: Fix for MPC8360 ATM Quad OC3 External Phys Changed the CS4 and CS5 addresses on Local Bus for matching the PMC0 and PMC1 addresses. Signed-off-by: Stefan Popa Signed-off-by: Kim Phillips --- include/configs/MPC8360EMDS.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/MPC8360EMDS.h b/include/configs/MPC8360EMDS.h index 7b82c43dd2..a9599405dd 100644 --- a/include/configs/MPC8360EMDS.h +++ b/include/configs/MPC8360EMDS.h @@ -296,13 +296,13 @@ /* * CS4 on Local Bus, to PIB */ -#define CONFIG_SYS_BR4_PRELIM 0xf8010801 /* CS4 base address at 0xf8010000 */ +#define CONFIG_SYS_BR4_PRELIM 0xf8008801 /* CS4 base address at 0xf8008000 */ #define CONFIG_SYS_OR4_PRELIM 0xffffe9f7 /* size 32KB, port size 8bit, GPCM */ /* * CS5 on Local Bus, to PIB */ -#define CONFIG_SYS_BR5_PRELIM 0xf8008801 /* CS5 base address at 0xf8008000 */ +#define CONFIG_SYS_BR5_PRELIM 0xf8010801 /* CS5 base address at 0xf8010000 */ #define CONFIG_SYS_OR5_PRELIM 0xffffe9f7 /* size 32KB, port size 8bit, GPCM */ /* -- cgit v1.2.1 From a55bb8340ba8682782f816f0b9b3de13e5512e28 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Mon, 29 Nov 2010 14:32:11 -0600 Subject: powerpc/85xx: Introduce CONFIG_SYS_EXTRA_ENV_RELOC Some systems need to relocate the env_addr pointer early because the location it points to will get invalidated before env_relocate is called. One example is on systems that might use a L2 or L3 cache in SRAM mode and initialize that cache from SRAM mode back to being a cache in cpu_init_r. We set this on the 85xx boards that have support for NAND, SPI, or SDHC/MMC boot support as they use a secondary cache in SRAM mode and need the env_addr pointer relocated since we change from SRAM to normal cache mode in cpu_init_r. Also removed CONFIG_SYS_SPL as its not used anywhere. Signed-off-by: Kumar Gala --- include/configs/MPC8536DS.h | 5 +++-- include/configs/MPC8569MDS.h | 3 ++- include/configs/P1_P2_RDB.h | 5 +++-- 3 files changed, 8 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index 850665a041..5c5be0ce91 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -242,9 +242,10 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#if defined(CONFIG_SYS_SPL) || defined(CONFIG_RAMBOOT_NAND) \ - || defined(CONFIG_RAMBOOT_SDCARD) || defined(CONFIG_RAMBOOT_SPIFLASH) +#if defined(CONFIG_RAMBOOT_NAND) || defined(CONFIG_RAMBOOT_SDCARD) || \ + defined(CONFIG_RAMBOOT_SPIFLASH) #define CONFIG_SYS_RAMBOOT +#define CONFIG_SYS_EXTRA_ENV_RELOC #else #undef CONFIG_SYS_RAMBOOT #endif diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h index c7973b46a2..9620fd0012 100644 --- a/include/configs/MPC8569MDS.h +++ b/include/configs/MPC8569MDS.h @@ -203,8 +203,9 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#if defined(CONFIG_SYS_SPL) || defined(CONFIG_RAMBOOT_NAND) +#if defined(CONFIG_RAMBOOT_NAND) #define CONFIG_SYS_RAMBOOT +#define CONFIG_SYS_EXTRA_ENV_RELOC #else #undef CONFIG_SYS_RAMBOOT #endif diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h index 610f3ed299..a21afb7ac7 100644 --- a/include/configs/P1_P2_RDB.h +++ b/include/configs/P1_P2_RDB.h @@ -201,9 +201,10 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#if defined(CONFIG_SYS_SPL) || defined(CONFIG_RAMBOOT_NAND) \ - || defined(CONFIG_RAMBOOT_SDCARD) || defined(CONFIG_RAMBOOT_SPIFLASH) +#if defined(CONFIG_RAMBOOT_NAND) || defined(CONFIG_RAMBOOT_SDCARD) || \ + defined(CONFIG_RAMBOOT_SPIFLASH) #define CONFIG_SYS_RAMBOOT +#define CONFIG_SYS_EXTRA_ENV_RELOC #else #undef CONFIG_SYS_RAMBOOT #endif -- cgit v1.2.1 From 9de0aa74471c0bd7f8b3b0e6f400df5e6c3b92c9 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Wed, 1 Dec 2010 06:42:04 -0600 Subject: powerpc/8xxx: Fix _POST_WORD_ADDR on 85xx & 86xx systems We intended to use the PIC TFRR register however we where missing adding in the PIC register base offset from IMMR when we defined _POST_WORD_ADDR. Signed-off-by: Kumar Gala --- include/post.h | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/post.h b/include/post.h index 957ce3b161..519cef1612 100644 --- a/include/post.h +++ b/include/post.h @@ -58,11 +58,13 @@ #elif defined (CONFIG_MPC85xx) #include -#define _POST_WORD_ADDR (CONFIG_SYS_IMMR + offsetof(ccsr_pic_t, tfrr)) +#define _POST_WORD_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PIC_OFFSET + \ + offsetof(ccsr_pic_t, tfrr)) #elif defined (CONFIG_MPC86xx) #include -#define _POST_WORD_ADDR (CONFIG_SYS_IMMR + offsetof(ccsr_pic_t, tfrr)) +#define _POST_WORD_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_MPC86xx_PIC_OFFSET + \ + offsetof(ccsr_pic_t, tfrr)) #elif defined (CONFIG_4xx) #define _POST_WORD_ADDR \ -- cgit v1.2.1 From 558710b98bd71bc31a0447a28fab79cf4649aa69 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Fri, 19 Nov 2010 08:53:25 -0600 Subject: powerpc/85xx: Enable HWCONFIG on MPC8572DS We need HWCONFIG to allow configuration of DDR params Signed-off-by: Kumar Gala --- include/configs/MPC8572DS.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index 692c8115e1..1ee95aed28 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -202,6 +202,7 @@ #define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r function */ +#define CONFIG_HWCONFIG /* enable hwconfig */ #define CONFIG_FSL_PIXIS 1 /* use common PIXIS code */ #define PIXIS_BASE 0xffdf0000 /* PIXIS registers */ #ifdef CONFIG_PHYS_64BIT -- cgit v1.2.1 From f550c521e123f2c35d742599f19f4aea2db85951 Mon Sep 17 00:00:00 2001 From: Anatolij Gustschin Date: Mon, 29 Nov 2010 22:36:39 +0100 Subject: mpc512x: aria: cleanup board config file CONFIG_FSL_DIU_LOGO_BMP has been removed while refactoring MPC8610 and MPC5121 DIU code, so remove it. Signed-off-by: Anatolij Gustschin --- include/configs/aria.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/configs/aria.h b/include/configs/aria.h index b3ca8d23f8..3a60de0d47 100644 --- a/include/configs/aria.h +++ b/include/configs/aria.h @@ -49,7 +49,6 @@ #define CONFIG_E300 1 /* E300 Family */ #define CONFIG_MPC512X 1 /* MPC512X family */ #define CONFIG_FSL_DIU_FB 1 /* FSL DIU */ -#define CONFIG_FSL_DIU_LOGO_BMP 1 /* Don't include FSL DIU binary bmp */ #define CONFIG_SYS_TEXT_BASE 0xFFF00000 -- cgit v1.2.1 From d55c5c3f81bf93a411529d8266bc271c8e06b4f1 Mon Sep 17 00:00:00 2001 From: Reinhard Meyer Date: Sat, 30 Oct 2010 23:09:58 +0000 Subject: AT91: add TOP9000 support Adds support for the EMK TOP9000 CPU Module which is based on ATMELs ARM926EJS AT91SAM9XE SoC. Signed-off-by: Reinhard Meyer --- include/configs/top9000.h | 314 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 314 insertions(+) create mode 100644 include/configs/top9000.h (limited to 'include') diff --git a/include/configs/top9000.h b/include/configs/top9000.h new file mode 100644 index 0000000000..ff3933b19c --- /dev/null +++ b/include/configs/top9000.h @@ -0,0 +1,314 @@ +/* + * (C) Copyright 2010 + * Reinhard Meyer, EMK Elektronik, reinhard.meyer@emk-elektronik.de + * + * Configuation settings for the TOP9000 CPU module with AT91SAM9XE. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +/* + * top9000 with at91sam9xe256 or at91sam9xe512 + * + * Initial Bootloader is in embedded flash. + * Vital Product Data, U-Boot Environment are in I2C-EEPROM. + * U-Boot is in embedded flash, a backup U-Boot can be in NAND flash. + * kernel and file system are either in NAND flash or on a micro SD card. + * NAND flash is optional. + * I2C EEPROM is never optional. + * SPI FRAM is optional. + * SPI ENC28J60 is optional. + * 16 or 32 bit wide SDRAM. + */ +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * Warning: changing CONFIG_SYS_TEXT_BASE requires + * adapting the initial boot program + */ +#define CONFIG_SYS_TEXT_BASE 0x21f00000 /* 31 MB into RAM */ + +/* Command line configuration */ +#include +#undef CONFIG_CMD_FPGA +#undef CONFIG_CMD_SETGETDCR +#undef CONFIG_CMD_XIMG +#define CONFIG_CMD_ASKENV +#define CONFIG_SYS_CBSIZE 256 +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_PBSIZE \ + (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_PROMPT "TOP9000> " +#define CONFIG_SYS_LONGHELP +#define CONFIG_CMDLINE_EDITING +#define CONFIG_CMD_BDI +#define CONFIG_CMD_CACHE + +/* ARM asynchronous clock */ +#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432 MHz xtal */ +#define CONFIG_SYS_HZ 1000 + +/* SoC */ +#define CONFIG_ARM926EJS /* ARM926EJS Core */ +#define CONFIG_AT91FAMILY /* it's a member of AT91 */ +#define CONFIG_AT91SAM9260 /* Atmel AT91SAM9260 based SoC */ +#define CONFIG_AT91SAM9XE + +/* Misc CPU related */ +#define CONFIG_AT91_LEGACY +#define CONFIG_ARCH_CPU_INIT +#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ +#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_AT91RESET_EXTRST /* assert external reset */ + +/* general purpose I/O */ +#define CONFIG_AT91_GPIO +#define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */ + +/* serial console */ +#define CONFIG_ATMEL_USART +#define CONFIG_USART3 /* USART 3 is DBGU !!! */ +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } + +/* SD/MMC card */ +#define CONFIG_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_GENERIC_ATMEL_MCI +#define CONFIG_SYS_MMC_CD_PIN AT91_PIN_PC9 +#define CONFIG_CMD_MMC + +/* Ethernet */ +#define CONFIG_MACB +#define CONFIG_SYS_PHY_ID 1 +#define CONFIG_RMII +#define CONFIG_NET_MULTI +#define CONFIG_NET_RETRY_COUNT 20 + +/* real time clock */ +#define CONFIG_RTC_AT91SAM9_RTT +#define CONFIG_CMD_DATE + +#if defined(CONFIG_AT91SAM9XE) +/* + * NOR flash - use embedded flash of SAM9XE256/512 + * U-Boot will not fit into 128K ! + * 2010.09 will not fit into 256K with all options enabled ! + * + * Layout: + * 16kB 1st Bootloader + * Rest U-Boot + * the first sector (16kB) of EFLASH cannot be unprotected + * with u-boot commands + */ +# define CONFIG_AT91_EFLASH +# define CONFIG_SYS_FLASH_BASE 0x200000 +# define CONFIG_SYS_MAX_FLASH_SECT 32 +# define CONFIG_SYS_MAX_FLASH_BANKS 1 +# define CONFIG_SYS_FLASH_PROTECTION +# define CONFIG_EFLASH_PROTSECTORS 1 /* protect first sector */ +#endif + +/* SPI */ +#define CONFIG_ATMEL_SPI +#define CONFIG_CMD_SPI + +/* RAMTRON FRAM */ +#define CONFIG_CMD_SF +#define CONFIG_ATMEL_SPI0 /* SPI used for FRAM is SPI0 */ +#define FRAM_SPI_BUS 0 +#define FRAM_CS_NUM 0 +#define CONFIG_SPI_FLASH /* RAMTRON FRAM on SPI bus */ +#define CONFIG_SPI_FRAM_RAMTRON +#define CONFIG_SF_DEFAULT_SPEED 1000000 /* be conservative here... */ +#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 +#define CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC "FM25H20" + +/* Microchip ENC28J60 (second LAN) */ +#if defined(CONFIG_EVAL9000) +# define CONFIG_ENC28J60 +# define CONFIG_ATMEL_SPI1 /* SPI used for ENC28J60 is SPI1 */ +# define ENC_SPI_BUS 1 +# define ENC_CS_NUM 0 +# define ENC_SPI_CLOCK 1000000 +#endif /* CONFIG_EVAL9000 */ + +/* + * SDRAM: 1 bank, min 32, max 128 MB + * Initialized before u-boot gets started. + */ +#define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_SYS_SDRAM_BASE 0x20000000 +#define CONFIG_SYS_SDRAM_SIZE 0x08000000 +#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE +#define CONFIG_SYS_MEMTEST_END 0x21e00000 +#define CONFIG_SYS_LOAD_ADDR \ + (CONFIG_SYS_SDRAM_BASE + 0x01000000) +/* + * Initial stack pointer: 16k - GENERATED_GBL_DATA_SIZE in internal SRAM, + * leaving the correct space for initial global data structure above + * that address while providing maximum stack area below. + */ +#define CONFIG_SYS_INIT_SP_ADDR \ + (0x00300000 + 0x4000 - GENERATED_GBL_DATA_SIZE) + +/* + * NAND flash: 256 MB (optional) + * + * Layout: + * 640kB: u-boot (includes space for spare sectors, handled by + * initial loader) + * 2MB: kernel + * rest: file system + */ +#define CONFIG_NAND_ATMEL +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE 0x40000000 +#define CONFIG_SYS_NAND_DBW_8 +#define CONFIG_SYS_NAND_MASK_ALE (1 << 21) +#define CONFIG_SYS_NAND_MASK_CLE (1 << 22) +#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 +#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 +#define CONFIG_CMD_NAND + +/* USB */ +#define CONFIG_USB_ATMEL +#define CONFIG_USB_OHCI_NEW +#define CONFIG_DOS_PARTITION +#define CONFIG_SYS_USB_OHCI_CPU_INIT +#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 +#define CONFIG_SYS_USB_OHCI_SLOT_NAME "top9000" +#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 +#define CONFIG_USB_STORAGE +#define CONFIG_CMD_USB + +/* I2C support must always be enabled */ +#define CONFIG_SOFT_I2C +#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C_SPEED 400000 +#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_I2C_MULTI_BUS +#define I2C0_PORT AT91_PIO_PORTA +#define SDA0_PIN 23 +#define SCL0_PIN 24 +#define I2C1_PORT AT91_PIO_PORTB +#define SDA1_PIN 12 +#define SCL1_PIN 13 +#define I2C_SOFT_DECLARATIONS void iic_init(void);\ + int iic_read(void);\ + void iic_sda(int);\ + void iic_scl(int); +#define I2C_ACTIVE +#define I2C_TRISTATE +#define I2C_INIT iic_init() +#define I2C_READ iic_read() +#define I2C_SDA(bit) iic_sda(bit) +#define I2C_SCL(bit) iic_scl(bit) +#define I2C_DELAY udelay(3) +/* EEPROM configuration */ +#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 +#define CONFIG_SYS_EEPROM_SIZE 0x2000 +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57 +/* later: #define CONFIG_I2C_ENV_EEPROM_BUS 0 */ +/* ENV is always in I2C-EEPROM */ +#define CONFIG_ENV_IS_IN_EEPROM +#define CONFIG_ENV_OFFSET 0x1000 +#define CONFIG_ENV_SIZE 0x0f00 +/* VPD settings */ +#define CONFIG_SYS_I2C_FACT_ADDR 0x57 +#define CONFIG_SYS_FACT_OFFSET 0x1F00 +#define CONFIG_SYS_FACT_SIZE 0x0100 +/* later: #define CONFIG_MISC_INIT_R */ +/* define the next only if you want to allow users to enter VPD data */ +#define CONFIG_SYS_FACT_ENTRY +#ifndef __ASSEMBLY__ +extern void read_factory_r(void); +#endif + +/* + * Only interrupt autoboot if is pressed. Otherwise, garbage + * data on the serial line may interrupt the boot sequence. + */ +#define CONFIG_BOOTDELAY 1 +#define CONFIG_AUTOBOOT +#define CONFIG_AUTOBOOT_KEYED +#define CONFIG_AUTOBOOT_PROMPT \ + "Press SPACE to abort autoboot in %d seconds\n", bootdelay +#define CONFIG_AUTOBOOT_DELAY_STR "d" +#define CONFIG_AUTOBOOT_STOP_STR " " + +/* + * add filesystem commands if we have at least 1 storage + * media with filesystem + */ +#if defined(CONFIG_NAND_ATMEL) \ + || defined(CONFIG_USB_ATMEL) \ + || defined(CONFIG_MMC) +# define CONFIG_DOS_PARTITION +# define CONFIG_CMD_FAT +# define CONFIG_CMD_EXT2 +/* later: #define CONFIG_CMD_JFFS2 */ +#endif + +/* add NET commands if we have at least 1 LAN */ +#if defined(CONFIG_MACB) || defined(CONFIG_ENC28J60) +# define CONFIG_CMD_PING +# define CONFIG_CMD_DHCP +# define CONFIG_CMD_MII +/* is this really needed ? */ +# define CONFIG_RESET_PHY_R +/* BOOTP options */ +# define CONFIG_BOOTP_BOOTFILESIZE +# define CONFIG_BOOTP_BOOTPATH +# define CONFIG_BOOTP_GATEWAY +# define CONFIG_BOOTP_HOSTNAME +#endif + +/* linux in NAND flash */ +#define CONFIG_BOOTCOUNT_LIMIT 1 +#define CONFIG_BOOTCOMMAND \ + "nand read 0x21000000 0xA0000 0x200000; bootm" +#define CONFIG_BOOTARGS \ + "console=ttyS0,115200 " \ + "root=/dev/mtdblock2 " \ + "mtdparts=atmel_nand:" \ + "640k(uboot)ro," \ + "2M(linux)," \ + "16M(root)," \ + "-(rest) " \ + "rw "\ + "rootfstype=jffs2" + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN \ + ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) +#define CONFIG_STACKSIZE (32*1024) +#ifdef CONFIG_USE_IRQ +#error CONFIG_USE_IRQ not supported +#endif + +#endif + -- cgit v1.2.1 From 066df1a5d6b889f85aa1dcba0efb012073c5d98f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20Bie=C3=9Fmann?= Date: Sat, 4 Dec 2010 11:31:46 +0000 Subject: at91rm9200ek: fix SDRAM initialistation values MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Andreas Bießmann --- include/configs/at91rm9200ek.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/at91rm9200ek.h b/include/configs/at91rm9200ek.h index 14559f5ccc..337dafc8a1 100644 --- a/include/configs/at91rm9200ek.h +++ b/include/configs/at91rm9200ek.h @@ -90,7 +90,7 @@ #define CONFIG_SYS_EBI_CSA_VAL 0x00000002 /* CS1=CONFIG_SYS_SDRAM */ #define CONFIG_SYS_SDRC_CR_VAL 0x2188c155 /* set up the CONFIG_SYS_SDRAM */ #define CONFIG_SYS_SDRAM CONFIG_SYS_SDRAM_BASE /* address of the SDRAM */ -#define CONFIG_SYS_SDRAM1 CONFIG_SYS_SDRAM_BASE /* address of the SDRAM */ +#define CONFIG_SYS_SDRAM1 (CONFIG_SYS_SDRAM_BASE+0x80) #define CONFIG_SYS_SDRAM_VAL 0x00000000 /* value written to CONFIG_SYS_SDRAM */ #define CONFIG_SYS_SDRC_MR_VAL 0x00000002 /* Precharge All */ #define CONFIG_SYS_SDRC_MR_VAL1 0x00000004 /* refresh */ -- cgit v1.2.1 From 3a4ff8b3cd719372cb3b3a8432e68015d84f1fc2 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20Bie=C3=9Fmann?= Date: Tue, 30 Nov 2010 09:45:03 +0000 Subject: at91rm9200ek: add configure target for RAM boot MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This patch also removes now unnecessary config.mk in board directory and make usage of new features in boards.cfg. Signed-off-by: Andreas Bießmann --- include/configs/at91rm9200ek.h | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'include') diff --git a/include/configs/at91rm9200ek.h b/include/configs/at91rm9200ek.h index 337dafc8a1..df4413d813 100644 --- a/include/configs/at91rm9200ek.h +++ b/include/configs/at91rm9200ek.h @@ -32,6 +32,20 @@ #include +/* + * set some initial configurations depending on configure target + * + * at91rm9200ek_config -> boot from 0x0 in NOR Flash at CS0 + * at91rm9200ek_ram_config -> continue booting from 0x20100000 in RAM; lowlevel + * initialisation was done by some preloader + */ +#ifdef CONFIG_RAMBOOT +#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_SYS_TEXT_BASE 0x20100000 +#else +#define CONFIG_SYS_TEXT_BASE 0x10000000 +#endif + /* * AT91C_XTAL_CLOCK is the frequency of external xtal in hertz * AT91C_MAIN_CLOCK is the frequency of PLLA output -- cgit v1.2.1 From a429db7e3ce6136f80f22584588247926ba60b05 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20Bie=C3=9Fmann?= Date: Tue, 30 Nov 2010 09:45:06 +0000 Subject: arm920t/at91/timer: replace bss variables by gd MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Reuse the gd->tbl value for timestamp and add gd->lastinc for lastinc bss values in arm920t/at91/timer driver. The usage of bss values in driver before initialisation of bss is forbidden. In that special case some data in .rel.dyn gets corrupted by the arm920t/at91/timer driver. Signed-off-by: Andreas Bießmann --- include/configs/at91rm9200ek.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/configs/at91rm9200ek.h b/include/configs/at91rm9200ek.h index df4413d813..810023a494 100644 --- a/include/configs/at91rm9200ek.h +++ b/include/configs/at91rm9200ek.h @@ -71,6 +71,8 @@ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG +#define CONFIG_AT91FAMILY + /* * Memory Configuration */ -- cgit v1.2.1 From 7ea23555f5d59457f5998b9f61d7b943b2ea6422 Mon Sep 17 00:00:00 2001 From: Macpaul Lin Date: Fri, 3 Dec 2010 13:52:34 +0800 Subject: include/linux/mii.h: update for supporting GE This file has been synced (copy) from Linux source code. This commit was based on kernel 2.6.32. It updates gigabit related phy registers and basic definitions. Signed-off-by: Macpaul Lin --- include/linux/mii.h | 181 +++++++++++++++++++++++++++++++--------------------- 1 file changed, 107 insertions(+), 74 deletions(-) (limited to 'include') diff --git a/include/linux/mii.h b/include/linux/mii.h index 7c63095fd4..6e7ffab301 100644 --- a/include/linux/mii.h +++ b/include/linux/mii.h @@ -10,98 +10,132 @@ /* Generic MII registers. */ -#define MII_BMCR 0x00 /* Basic mode control register */ -#define MII_BMSR 0x01 /* Basic mode status register */ -#define MII_PHYSID1 0x02 /* PHYS ID 1 */ -#define MII_PHYSID2 0x03 /* PHYS ID 2 */ -#define MII_ADVERTISE 0x04 /* Advertisement control reg */ -#define MII_LPA 0x05 /* Link partner ability reg */ -#define MII_EXPANSION 0x06 /* Expansion register */ -#define MII_DCOUNTER 0x12 /* Disconnect counter */ -#define MII_FCSCOUNTER 0x13 /* False carrier counter */ -#define MII_NWAYTEST 0x14 /* N-way auto-neg test reg */ -#define MII_RERRCOUNTER 0x15 /* Receive error counter */ -#define MII_SREVISION 0x16 /* Silicon revision */ -#define MII_RESV1 0x17 /* Reserved... */ -#define MII_LBRERROR 0x18 /* Lpback, rx, bypass error */ -#define MII_PHYADDR 0x19 /* PHY address */ -#define MII_RESV2 0x1a /* Reserved... */ -#define MII_TPISTATUS 0x1b /* TPI status for 10mbps */ -#define MII_NCONFIG 0x1c /* Network interface config */ +#define MII_BMCR 0x00 /* Basic mode control register */ +#define MII_BMSR 0x01 /* Basic mode status register */ +#define MII_PHYSID1 0x02 /* PHYS ID 1 */ +#define MII_PHYSID2 0x03 /* PHYS ID 2 */ +#define MII_ADVERTISE 0x04 /* Advertisement control reg */ +#define MII_LPA 0x05 /* Link partner ability reg */ +#define MII_EXPANSION 0x06 /* Expansion register */ +#define MII_CTRL1000 0x09 /* 1000BASE-T control */ +#define MII_STAT1000 0x0a /* 1000BASE-T status */ +#define MII_ESTATUS 0x0f /* Extended Status */ +#define MII_DCOUNTER 0x12 /* Disconnect counter */ +#define MII_FCSCOUNTER 0x13 /* False carrier counter */ +#define MII_NWAYTEST 0x14 /* N-way auto-neg test reg */ +#define MII_RERRCOUNTER 0x15 /* Receive error counter */ +#define MII_SREVISION 0x16 /* Silicon revision */ +#define MII_RESV1 0x17 /* Reserved... */ +#define MII_LBRERROR 0x18 /* Lpback, rx, bypass error */ +#define MII_PHYADDR 0x19 /* PHY address */ +#define MII_RESV2 0x1a /* Reserved... */ +#define MII_TPISTATUS 0x1b /* TPI status for 10mbps */ +#define MII_NCONFIG 0x1c /* Network interface config */ /* Basic mode control register. */ -#define BMCR_RESV 0x003f /* Unused... */ -#define BMCR_SPEED1000 0x0040 /* MSB of Speed (1000) */ -#define BMCR_CTST 0x0080 /* Collision test */ -#define BMCR_FULLDPLX 0x0100 /* Full duplex */ -#define BMCR_ANRESTART 0x0200 /* Auto negotiation restart */ -#define BMCR_ISOLATE 0x0400 /* Disconnect DP83840 from MII */ -#define BMCR_PDOWN 0x0800 /* Powerdown the DP83840 */ -#define BMCR_ANENABLE 0x1000 /* Enable auto negotiation */ -#define BMCR_SPEED100 0x2000 /* Select 100Mbps */ -#define BMCR_LOOPBACK 0x4000 /* TXD loopback bits */ -#define BMCR_RESET 0x8000 /* Reset the DP83840 */ +#define BMCR_RESV 0x003f /* Unused... */ +#define BMCR_SPEED1000 0x0040 /* MSB of Speed (1000) */ +#define BMCR_CTST 0x0080 /* Collision test */ +#define BMCR_FULLDPLX 0x0100 /* Full duplex */ +#define BMCR_ANRESTART 0x0200 /* Auto negotiation restart */ +#define BMCR_ISOLATE 0x0400 /* Disconnect DP83840 from MII */ +#define BMCR_PDOWN 0x0800 /* Powerdown the DP83840 */ +#define BMCR_ANENABLE 0x1000 /* Enable auto negotiation */ +#define BMCR_SPEED100 0x2000 /* Select 100Mbps */ +#define BMCR_LOOPBACK 0x4000 /* TXD loopback bits */ +#define BMCR_RESET 0x8000 /* Reset the DP83840 */ /* Basic mode status register. */ -#define BMSR_ERCAP 0x0001 /* Ext-reg capability */ -#define BMSR_JCD 0x0002 /* Jabber detected */ -#define BMSR_LSTATUS 0x0004 /* Link status */ -#define BMSR_ANEGCAPABLE 0x0008 /* Able to do auto-negotiation */ -#define BMSR_RFAULT 0x0010 /* Remote fault detected */ -#define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */ -#define BMSR_RESV 0x07c0 /* Unused... */ -#define BMSR_10HALF 0x0800 /* Can do 10mbps, half-duplex */ -#define BMSR_10FULL 0x1000 /* Can do 10mbps, full-duplex */ -#define BMSR_100HALF 0x2000 /* Can do 100mbps, half-duplex */ -#define BMSR_100FULL 0x4000 /* Can do 100mbps, full-duplex */ -#define BMSR_100BASE4 0x8000 /* Can do 100mbps, 4k packets */ +#define BMSR_ERCAP 0x0001 /* Ext-reg capability */ +#define BMSR_JCD 0x0002 /* Jabber detected */ +#define BMSR_LSTATUS 0x0004 /* Link status */ +#define BMSR_ANEGCAPABLE 0x0008 /* Able to do auto-negotiation */ +#define BMSR_RFAULT 0x0010 /* Remote fault detected */ +#define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */ +#define BMSR_RESV 0x00c0 /* Unused... */ +#define BMSR_ESTATEN 0x0100 /* Extended Status in R15 */ +#define BMSR_100HALF2 0x0200 /* Can do 100BASE-T2 HDX */ +#define BMSR_100FULL2 0x0400 /* Can do 100BASE-T2 FDX */ +#define BMSR_10HALF 0x0800 /* Can do 10mbps, half-duplex */ +#define BMSR_10FULL 0x1000 /* Can do 10mbps, full-duplex */ +#define BMSR_100HALF 0x2000 /* Can do 100mbps, half-duplex */ +#define BMSR_100FULL 0x4000 /* Can do 100mbps, full-duplex */ +#define BMSR_100BASE4 0x8000 /* Can do 100mbps, 4k packets */ /* Advertisement control register. */ -#define ADVERTISE_SLCT 0x001f /* Selector bits */ -#define ADVERTISE_CSMA 0x0001 /* Only selector supported */ -#define ADVERTISE_10HALF 0x0020 /* Try for 10mbps half-duplex */ -#define ADVERTISE_10FULL 0x0040 /* Try for 10mbps full-duplex */ -#define ADVERTISE_100HALF 0x0080 /* Try for 100mbps half-duplex */ -#define ADVERTISE_100FULL 0x0100 /* Try for 100mbps full-duplex */ -#define ADVERTISE_100BASE4 0x0200 /* Try for 100mbps 4k packets */ -#define ADVERTISE_RESV 0x1c00 /* Unused... */ -#define ADVERTISE_RFAULT 0x2000 /* Say we can detect faults */ -#define ADVERTISE_LPACK 0x4000 /* Ack link partners response */ -#define ADVERTISE_NPAGE 0x8000 /* Next page bit */ +#define ADVERTISE_SLCT 0x001f /* Selector bits */ +#define ADVERTISE_CSMA 0x0001 /* Only selector supported */ +#define ADVERTISE_10HALF 0x0020 /* Try for 10mbps half-duplex */ +#define ADVERTISE_1000XFULL 0x0020 /* Try for 1000BASE-X full-duplex */ +#define ADVERTISE_10FULL 0x0040 /* Try for 10mbps full-duplex */ +#define ADVERTISE_1000XHALF 0x0040 /* Try for 1000BASE-X half-duplex */ +#define ADVERTISE_100HALF 0x0080 /* Try for 100mbps half-duplex */ +#define ADVERTISE_1000XPAUSE 0x0080 /* Try for 1000BASE-X pause */ +#define ADVERTISE_100FULL 0x0100 /* Try for 100mbps full-duplex */ +#define ADVERTISE_1000XPSE_ASYM 0x0100 /* Try for 1000BASE-X asym pause */ +#define ADVERTISE_100BASE4 0x0200 /* Try for 100mbps 4k packets */ +#define ADVERTISE_PAUSE_CAP 0x0400 /* Try for pause */ +#define ADVERTISE_PAUSE_ASYM 0x0800 /* Try for asymetric pause */ +#define ADVERTISE_RESV 0x1000 /* Unused... */ +#define ADVERTISE_RFAULT 0x2000 /* Say we can detect faults */ +#define ADVERTISE_LPACK 0x4000 /* Ack link partners response */ +#define ADVERTISE_NPAGE 0x8000 /* Next page bit */ #define ADVERTISE_FULL (ADVERTISE_100FULL | ADVERTISE_10FULL | \ ADVERTISE_CSMA) #define ADVERTISE_ALL (ADVERTISE_10HALF | ADVERTISE_10FULL | \ - ADVERTISE_100HALF | ADVERTISE_100FULL) + ADVERTISE_100HALF | ADVERTISE_100FULL) /* Link partner ability register. */ -#define LPA_SLCT 0x001f /* Same as advertise selector */ -#define LPA_10HALF 0x0020 /* Can do 10mbps half-duplex */ -#define LPA_10FULL 0x0040 /* Can do 10mbps full-duplex */ -#define LPA_100HALF 0x0080 /* Can do 100mbps half-duplex */ -#define LPA_100FULL 0x0100 /* Can do 100mbps full-duplex */ -#define LPA_100BASE4 0x0200 /* Can do 100mbps 4k packets */ -#define LPA_RESV 0x1c00 /* Unused... */ -#define LPA_RFAULT 0x2000 /* Link partner faulted */ -#define LPA_LPACK 0x4000 /* Link partner acked us */ -#define LPA_NPAGE 0x8000 /* Next page bit */ +#define LPA_SLCT 0x001f /* Same as advertise selector */ +#define LPA_10HALF 0x0020 /* Can do 10mbps half-duplex */ +#define LPA_1000XFULL 0x0020 /* Can do 1000BASE-X full-duplex */ +#define LPA_10FULL 0x0040 /* Can do 10mbps full-duplex */ +#define LPA_1000XHALF 0x0040 /* Can do 1000BASE-X half-duplex */ +#define LPA_100HALF 0x0080 /* Can do 100mbps half-duplex */ +#define LPA_1000XPAUSE 0x0080 /* Can do 1000BASE-X pause */ +#define LPA_100FULL 0x0100 /* Can do 100mbps full-duplex */ +#define LPA_1000XPAUSE_ASYM 0x0100 /* Can do 1000BASE-X pause asym*/ +#define LPA_100BASE4 0x0200 /* Can do 100mbps 4k packets */ +#define LPA_PAUSE_CAP 0x0400 /* Can pause */ +#define LPA_PAUSE_ASYM 0x0800 /* Can pause asymetrically */ +#define LPA_RESV 0x1000 /* Unused... */ +#define LPA_RFAULT 0x2000 /* Link partner faulted */ +#define LPA_LPACK 0x4000 /* Link partner acked us */ +#define LPA_NPAGE 0x8000 /* Next page bit */ #define LPA_DUPLEX (LPA_10FULL | LPA_100FULL) #define LPA_100 (LPA_100FULL | LPA_100HALF | LPA_100BASE4) /* Expansion register for auto-negotiation. */ -#define EXPANSION_NWAY 0x0001 /* Can do N-way auto-nego */ -#define EXPANSION_LCWP 0x0002 /* Got new RX page code word */ -#define EXPANSION_ENABLENPAGE 0x0004 /* This enables npage words */ -#define EXPANSION_NPCAPABLE 0x0008 /* Link partner supports npage */ -#define EXPANSION_MFAULTS 0x0010 /* Multiple faults detected */ -#define EXPANSION_RESV 0xffe0 /* Unused... */ +#define EXPANSION_NWAY 0x0001 /* Can do N-way auto-nego */ +#define EXPANSION_LCWP 0x0002 /* Got new RX page code word */ +#define EXPANSION_ENABLENPAGE 0x0004 /* This enables npage words */ +#define EXPANSION_NPCAPABLE 0x0008 /* Link partner supports npage */ +#define EXPANSION_MFAULTS 0x0010 /* Multiple faults detected */ +#define EXPANSION_RESV 0xffe0 /* Unused... */ + +#define ESTATUS_1000_TFULL 0x2000 /* Can do 1000BT Full */ +#define ESTATUS_1000_THALF 0x1000 /* Can do 1000BT Half */ /* N-way test register. */ -#define NWAYTEST_RESV1 0x00ff /* Unused... */ -#define NWAYTEST_LOOPBACK 0x0100 /* Enable loopback for N-way */ -#define NWAYTEST_RESV2 0xfe00 /* Unused... */ +#define NWAYTEST_RESV1 0x00ff /* Unused... */ +#define NWAYTEST_LOOPBACK 0x0100 /* Enable loopback for N-way */ +#define NWAYTEST_RESV2 0xfe00 /* Unused... */ + +/* 1000BASE-T Control register */ +#define ADVERTISE_1000FULL 0x0200 /* Advertise 1000BASE-T full duplex */ +#define ADVERTISE_1000HALF 0x0100 /* Advertise 1000BASE-T half duplex */ +/* 1000BASE-T Status register */ +#define LPA_1000LOCALRXOK 0x2000 /* Link partner local receiver status */ +#define LPA_1000REMRXOK 0x1000 /* Link partner remote receiver status */ +#define LPA_1000FULL 0x0800 /* Link partner 1000BASE-T full duplex */ +#define LPA_1000HALF 0x0400 /* Link partner 1000BASE-T half duplex */ + +/* Flow control flags */ +#define FLOW_CTRL_TX 0x01 +#define FLOW_CTRL_RX 0x02 /** * mii_nway_result @@ -114,7 +148,7 @@ * * The one exception to IEEE 802.3u is that 100baseT4 is placed * between 100T-full and 100T-half. If your phy does not support - * 100T4 this is fine. If your phy places 100T4 elsewhere in the + * 100T4 this is fine. If your phy places 100T4 elsewhere in the * priority order, you will need to roll your own function. */ static inline unsigned int mii_nway_result (unsigned int negotiated) @@ -154,5 +188,4 @@ static inline unsigned int mii_duplex (unsigned int duplex_lock, return 0; } - #endif /* __LINUX_MII_H__ */ -- cgit v1.2.1 From aac0b4b6c153c413b4541a61d9c4296eef689e07 Mon Sep 17 00:00:00 2001 From: Sandeep Paulraj Date: Sat, 11 Dec 2010 10:47:30 -0500 Subject: DaVinci DM6446: Config Update The DM6446 does not build due to the ARM relocation patch. Also the board does not build in the NOR mode. Changed default to NAND to ensure no build failure. While at it removed CONFIG_CMD_KGDB Signed-off-by: Sandeep Paulraj --- include/configs/davinci_dvevm.h | 19 +++++++++++-------- 1 file changed, 11 insertions(+), 8 deletions(-) (limited to 'include') diff --git a/include/configs/davinci_dvevm.h b/include/configs/davinci_dvevm.h index e1b1db16e1..45214fa42a 100644 --- a/include/configs/davinci_dvevm.h +++ b/include/configs/davinci_dvevm.h @@ -50,7 +50,7 @@ /*=======*/ #define DV_EVM #define CONFIG_SYS_NAND_SMALLPAGE -#define CONFIG_SYS_USE_NOR +#define CONFIG_SYS_USE_NAND #define CONFIG_DISPLAY_CPUINFO /*===================*/ /* SoC Configuration */ @@ -78,6 +78,7 @@ #define CONFIG_STACKSIZE (256*1024) /* regular stack */ #define PHYS_SDRAM_1 0x80000000 /* DDR Start */ #define PHYS_SDRAM_1_SIZE 0x10000000 /* DDR size 256MB */ + #define DDR_8BANKS /* 8-bank DDR2 (256MB) */ /*====================*/ /* Serial Driver info */ @@ -228,11 +229,13 @@ #define CONFIG_PREBOOT "usb start" #endif #endif -/*=======================*/ -/* KGDB support (if any) */ -/*=======================*/ -#ifdef CONFIG_CMD_KGDB -#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */ -#endif + +#define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MB */ + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \ + CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) + #endif /* __CONFIG_H */ -- cgit v1.2.1 From 72c96a6802d9b1c949785d1d152f8bc8666c753d Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Wed, 1 Dec 2010 22:55:54 -0600 Subject: tsec: Revert to setting TBICR_ANEG_ENABLE by default for SGMII The following commit: commit 46e91674fb4b6d06c6a4984c0b5ac7d9a16923f4 Author: Peter Tyser Date: Tue Nov 3 17:52:07 2009 -0600 tsec: Force TBI PHY to 1000Mbps full duplex in SGMII mode Removed setting Auto-Neg by default, however this is believed to be proper default configuration for initialization of the TBI interface. Instead we explicitly set CONFIG_TSEC_TBICR_SETTINGS for the XPedite5370 & XPedite5500 boards that use a Broadcomm PHY which require Auto-Neg to be disabled to function properly. This addresses a breakage on the P2020 DS & MPC8572 DS boards when used with an SGMII riser card. We also remove setting CONFIG_TSEC_TBICR_SETTINGS on the P1_P2_RDB family of boards as now the default setting is sufficient for them. Additionally, we clean up the code a bit to remove an unnecessary second define. Signed-off-by: Kumar Gala Acked-by: Peter Tyser Tested-by: Peter Tyser --- include/configs/P1_P2_RDB.h | 8 -------- include/configs/xpedite537x.h | 10 ++++++++++ include/configs/xpedite550x.h | 10 ++++++++++ 3 files changed, 20 insertions(+), 8 deletions(-) (limited to 'include') diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h index a21afb7ac7..2dfee3d1bd 100644 --- a/include/configs/P1_P2_RDB.h +++ b/include/configs/P1_P2_RDB.h @@ -437,14 +437,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */ -/* TBI PHY configuration for SGMII mode */ -#define CONFIG_TSEC_TBICR_SETTINGS ( \ - TBICR_PHY_RESET \ - | TBICR_ANEG_ENABLE \ - | TBICR_FULL_DUPLEX \ - | TBICR_SPEED1_SET \ - ) - #endif /* CONFIG_TSEC_ENET */ /* diff --git a/include/configs/xpedite537x.h b/include/configs/xpedite537x.h index e0a1fa406c..a74766dcec 100644 --- a/include/configs/xpedite537x.h +++ b/include/configs/xpedite537x.h @@ -375,6 +375,16 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); #define CONFIG_MII_DEFAULT_TSEC 1 /* Allow unregistered phys */ #define CONFIG_ETHPRIME "eTSEC2" +/* + * In-band SGMII auto-negotiation between TBI and BCM5482S PHY fails, force + * 1000mbps SGMII link + */ +#define CONFIG_TSEC_TBICR_SETTINGS ( \ + TBICR_PHY_RESET \ + | TBICR_FULL_DUPLEX \ + | TBICR_SPEED1_SET \ + ) + #define CONFIG_TSEC1 1 #define CONFIG_TSEC1_NAME "eTSEC1" #define TSEC1_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) diff --git a/include/configs/xpedite550x.h b/include/configs/xpedite550x.h index 42d1f6980e..a051913ffb 100644 --- a/include/configs/xpedite550x.h +++ b/include/configs/xpedite550x.h @@ -345,6 +345,16 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); #define CONFIG_MII_DEFAULT_TSEC 1 /* Allow unregistered phys */ #define CONFIG_ETHPRIME "eTSEC2" +/* + * In-band SGMII auto-negotiation between TBI and BCM5482S PHY fails, force + * 1000mbps SGMII link + */ +#define CONFIG_TSEC_TBICR_SETTINGS ( \ + TBICR_PHY_RESET \ + | TBICR_FULL_DUPLEX \ + | TBICR_SPEED1_SET \ + ) + #define CONFIG_TSEC1 1 #define CONFIG_TSEC1_NAME "eTSEC1" #define TSEC1_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) -- cgit v1.2.1 From 510f794c894321fe65e62bb6fd9f21fa2569dcec Mon Sep 17 00:00:00 2001 From: Asen Dimov Date: Sun, 12 Dec 2010 00:42:28 +0000 Subject: pm9g45: ARM relocation support Signed-off-by: Asen Dimov --- include/configs/pm9g45.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'include') diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h index 3ed6b56bfe..8822012fda 100644 --- a/include/configs/pm9g45.h +++ b/include/configs/pm9g45.h @@ -39,6 +39,8 @@ /* ARM asynchronous clock */ #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ #define CONFIG_SYS_HZ 1000 +#define CONFIG_SYS_TEXT_BASE 0x73f00000 +#define CONFIG_AT91FAMILY #define CONFIG_ARCH_CPU_INIT @@ -175,6 +177,10 @@ #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024,\ 0x1000) +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \ + GENERATED_GBL_DATA_SIZE) + #define CONFIG_STACKSIZE (32*1024) /* regular stack */ #ifdef CONFIG_USE_IRQ -- cgit v1.2.1 From 37ee3ccce77a5ff8b791d61b04931385af015f99 Mon Sep 17 00:00:00 2001 From: Asen Dimov Date: Sun, 12 Dec 2010 12:42:38 +0200 Subject: pm9g45: enable cache command Signed-off-by: Asen Dimov --- include/configs/pm9g45.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h index 8822012fda..ec51ccf062 100644 --- a/include/configs/pm9g45.h +++ b/include/configs/pm9g45.h @@ -81,6 +81,7 @@ #undef CONFIG_CMD_FPGA #undef CONFIG_CMD_IMLS +#define CONFIG_CMD_CACHE #define CONFIG_CMD_PING 1 #define CONFIG_CMD_DHCP 1 #define CONFIG_CMD_NAND 1 -- cgit v1.2.1 From 9a2a05a4a3674be55fe28b130112754395a43c7a Mon Sep 17 00:00:00 2001 From: Asen Dimov Date: Sun, 12 Dec 2010 12:41:59 +0200 Subject: pm9263: ARM relocation support Signed-off-by: Asen Dimov --- include/configs/pm9263.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'include') diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h index 619af2d9bf..c9e7489386 100644 --- a/include/configs/pm9263.h +++ b/include/configs/pm9263.h @@ -44,6 +44,8 @@ #define CONFIG_PM9263 1 /* on a Ronetix PM9263 Board */ #define CONFIG_ARCH_CPU_INIT #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ +#define CONFIG_SYS_TEXT_BASE 0 +#define CONFIG_AT91FAMILY /* clocks */ #define CONFIG_SYS_MOR_VAL \ @@ -401,6 +403,10 @@ */ #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024, 0x1000) +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \ + GENERATED_GBL_DATA_SIZE) + #define CONFIG_STACKSIZE (32 * 1024) /* regular stack */ #ifdef CONFIG_USE_IRQ -- cgit v1.2.1 From 6e110d295f70cc0821eedcce2adc67dd0f15d5f6 Mon Sep 17 00:00:00 2001 From: Asen Dimov Date: Sun, 12 Dec 2010 12:42:09 +0200 Subject: pm9263: enable cache command Signed-off-by: Asen Dimov --- include/configs/pm9263.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h index c9e7489386..96e12f24ce 100644 --- a/include/configs/pm9263.h +++ b/include/configs/pm9263.h @@ -214,6 +214,7 @@ #undef CONFIG_CMD_LOADS #undef CONFIG_CMD_IMLS +#define CONFIG_CMD_CACHE #define CONFIG_CMD_PING 1 #define CONFIG_CMD_DHCP 1 #define CONFIG_CMD_NAND 1 -- cgit v1.2.1 From 4f81bf4368ced9b0469e1b387637d01cc510dba6 Mon Sep 17 00:00:00 2001 From: Asen Dimov Date: Sun, 12 Dec 2010 12:41:30 +0200 Subject: pm9261: ARM relocation support Signed-off-by: Asen Dimov --- include/configs/pm9261.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'include') diff --git a/include/configs/pm9261.h b/include/configs/pm9261.h index 7fcc9babdc..c7f0be91f0 100644 --- a/include/configs/pm9261.h +++ b/include/configs/pm9261.h @@ -45,6 +45,8 @@ #define CONFIG_PM9261 1 /* on a Ronetix PM9261 Board */ #define CONFIG_ARCH_CPU_INIT #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ +#define CONFIG_SYS_TEXT_BASE 0 +#define CONFIG_AT91FAMILY /* clocks */ /* CKGR_MOR - enable main osc. */ @@ -370,6 +372,10 @@ #define CONFIG_SYS_MALLOC_LEN \ ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024, 0x1000) +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \ + GENERATED_GBL_DATA_SIZE) + #define CONFIG_STACKSIZE (32 * 1024) /* regular stack */ #ifdef CONFIG_USE_IRQ -- cgit v1.2.1 From 6741b5310f81ae5ae0132ad85b09fb31d6377b6c Mon Sep 17 00:00:00 2001 From: Asen Dimov Date: Sun, 12 Dec 2010 12:41:36 +0200 Subject: pm9261: enable cache command Signed-off-by: Asen Dimov --- include/configs/pm9261.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/pm9261.h b/include/configs/pm9261.h index c7f0be91f0..26e50490f7 100644 --- a/include/configs/pm9261.h +++ b/include/configs/pm9261.h @@ -203,6 +203,7 @@ #undef CONFIG_CMD_LOADS #undef CONFIG_CMD_IMLS +#define CONFIG_CMD_CACHE #define CONFIG_CMD_PING 1 #define CONFIG_CMD_DHCP 1 #define CONFIG_CMD_NAND 1 -- cgit v1.2.1