From 8d22ddca3db2577b7f2bf1040972231279288847 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Wed, 9 Nov 2011 09:10:49 -0600 Subject: powerpc/85xx: Fix NAND SPL support We cause CCSRBAR to be relocated in the SPL phase of NAND boot which isn't expected and breaks things. Fixing the board config.h to NOT relocate CCSR during the CONFIG_NAND_SPL phase. Signed-off-by: Kumar Gala --- include/configs/p1_p2_rdb_pc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include/configs/p1_p2_rdb_pc.h') diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index bcfb034840..5a69902f89 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -221,7 +221,7 @@ /* IN case of NAND bootloader relocate CCSRBAR in RAMboot code not in the 4k SPL code*/ -#if defined(CONFIG_NAND_U_BOOT) && defined(CONFIG_NAND_SPL) +#if defined(CONFIG_NAND_SPL) #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE #endif -- cgit v1.2.1