From 29cc1d8e26bd5f16e10b62f26d6098b1a5117503 Mon Sep 17 00:00:00 2001 From: Ash Charles Date: Wed, 21 May 2014 14:04:55 -0700 Subject: omap3: overo: Use common configurations for Overo Clean-up the board configuration file for the Gumstix Overo board by including common omap3 definitions from ti_omap3_common.h as suggested here [1]. [1] http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/185960 Signed-off-by: Ash Charles Conflicts: include/configs/omap3_overo.h --- include/configs/omap3_overo.h | 222 ++++++------------------------------------ 1 file changed, 28 insertions(+), 194 deletions(-) (limited to 'include/configs/omap3_overo.h') diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h index 48cadbb22c..7b97be9ace 100644 --- a/include/configs/omap3_overo.h +++ b/include/configs/omap3_overo.h @@ -7,80 +7,35 @@ #ifndef __CONFIG_H #define __CONFIG_H -/* - * High Level Configuration Options - */ -#define CONFIG_OMAP /* in a TI OMAP core */ -#define CONFIG_OMAP34XX /* which is a 34XX */ -#define CONFIG_OMAP3_OVERO /* working with overo */ -#define CONFIG_OMAP_GPIO -#define CONFIG_OMAP_COMMON - -#define CONFIG_SDRC /* The chip has SDRC controller */ +#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ +#define CONFIG_NAND -#include /* get chip and board defs */ -#include +#include -/* - * Display CPU and Board information - */ +/* Display CPU and Board information */ #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO -/* Clock Defines */ -#define V_OSCK 26000000 /* Clock output from T2 */ -#define V_SCLK (V_OSCK >> 1) - +/* call misc_init_r */ #define CONFIG_MISC_INIT_R -#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ -#define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_INITRD_TAG +/* pass the revision tag */ #define CONFIG_REVISION_TAG -#define CONFIG_OF_LIBFDT -#define CONFIG_CMD_BOOTZ - -/* - * Size of malloc() pool - */ +/* override size of malloc() pool */ +#undef CONFIG_SYS_MALLOC_LEN #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */ - /* Shift 128 << 15 provides 4 MiB heap to support UBI commands. * Shift 128 << 10 provides 128 KiB heap for limited-memory devices. */ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 15)) -/* - * Hardware drivers - */ - -/* - * NS16550 Configuration - */ -#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ - -#define CONFIG_SYS_NS16550 -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE (-4) -#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK - -/* - * select serial console configuration - */ -#define CONFIG_CONS_INDEX 3 -#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 -#define CONFIG_SERIAL3 3 +/* I2C Support */ +#define CONFIG_SYS_I2C_OMAP34XX -/* allow to overwrite serial and ethaddr */ -#define CONFIG_ENV_OVERWRITE -#define CONFIG_BAUDRATE 115200 -#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \ - 115200} -#define CONFIG_GENERIC_MMC -#define CONFIG_MMC -#define CONFIG_OMAP_HSMMC -#define CONFIG_DOS_PARTITION +/* TWL4030 LED */ +#define CONFIG_TWL4030_LED +/* Initialize GPIOs by default */ #define CONFIG_OMAP3_GPIO_2 /* GPIO32..63 is in GPIO Bank 2 */ #define CONFIG_OMAP3_GPIO_3 /* GPIO64..95 is in GPIO Bank 3 */ #define CONFIG_OMAP3_GPIO_4 /* GPIO96..127 is in GPIO Bank 4 */ @@ -88,34 +43,18 @@ #define CONFIG_OMAP3_GPIO_6 /* GPIO160..191 is in GPIO Bank 6 */ /* commands to include */ -#include - #define CONFIG_CMD_CACHE -#define CONFIG_CMD_EXT2 /* EXT2 Support */ -#define CONFIG_CMD_FAT /* FAT support */ -#define CONFIG_CMD_FS_GENERIC - -#define CONFIG_CMD_I2C /* I2C serial bus support */ -#define CONFIG_CMD_MMC /* MMC support */ -#define CONFIG_CMD_NAND /* NAND support */ - -#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ #undef CONFIG_CMD_FPGA /* FPGA configuration Support */ #undef CONFIG_CMD_IMI /* iminfo */ -#undef CONFIG_CMD_IMLS /* List all found images */ #undef CONFIG_CMD_NFS /* NFS support */ -#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ - -#ifdef CONFIG_CMD_NAND -#define CONFIG_CMD_MTDPARTS /* MTD partition support */ +#ifdef CONFIG_NAND #define CONFIG_CMD_UBI /* UBI-formated MTD partition support */ #define CONFIG_CMD_UBIFS /* Read-only UBI volume operations */ #define CONFIG_RBTREE /* required by CONFIG_CMD_UBI */ #define CONFIG_LZO /* required by CONFIG_CMD_UBIFS */ -#define CONFIG_MTD_DEVICE /* required by CONFIG_CMD_MTDPARTS */ #define CONFIG_MTD_PARTITIONS /* required for UBI partition support */ /* NAND block size is 128 KiB. Synchronize these values with @@ -133,41 +72,18 @@ "256k(environ)," \ "8m(linux)," \ "-(rootfs)" -#else /* CONFIG_CMD_NAND */ +#else /* CONFIG_NAND */ #define MTDPARTS_DEFAULT -#endif /* CONFIG_CMD_NAND */ +#endif /* CONFIG_NAND */ -#define CONFIG_SYS_NO_FLASH -#define CONFIG_SYS_I2C -#define CONFIG_SYS_OMAP24_I2C_SPEED 100000 -#define CONFIG_SYS_OMAP24_I2C_SLAVE 1 -#define CONFIG_SYS_I2C_OMAP34XX - -/* - * TWL4030 - */ -#define CONFIG_TWL4030_POWER -#define CONFIG_TWL4030_LED - -/* - * Board NAND Info. - */ +/* Board NAND Info. */ #define CONFIG_SYS_NAND_QUIET_TEST -#define CONFIG_NAND_OMAP_GPMC #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ /* to access nand */ -#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ - /* to access nand */ - /* at CS0 */ -#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ - /* devices */ /* Environment information */ -#define CONFIG_BOOTDELAY 5 - #define CONFIG_EXTRA_ENV_SETTINGS \ - "loadaddr=0x82000000\0" \ - "dtbaddr=0x81600000\0" \ - "dtbfile=overo.dtb\0" \ + DEFAULT_LINUX_BOOT_ENV \ + "fdtfile=overo.dtb\0" \ "bootdir=/boot\0" \ "bootfile=zImage\0" \ "usbtty=cdc_acm\0" \ @@ -210,10 +126,10 @@ "run mmcargs; " \ "bootm ${loadaddr}\0" \ "loadzimage=load mmc ${mmcdev}:2 ${loadaddr} ${bootdir}/${bootfile}\0" \ - "loadfdt=load mmc ${mmcdev}:2 ${dtbaddr} ${bootdir}/${dtbfile}\0" \ + "loadfdt=load mmc ${mmcdev}:2 ${fdtaddr} ${bootdir}/${fdtfile}\0" \ "mmcbootfdt=echo Booting with DT from mmc ...; " \ "run mmcargs; " \ - "bootz ${loadaddr} - ${dtbaddr}\0" \ + "bootz ${loadaddr} - ${fdtaddr}\0" \ "nandboot=echo Booting from nand ...; " \ "run nandargs; " \ "nand read ${loadaddr} linux; " \ @@ -236,7 +152,7 @@ "run mmcboot;" \ "fi;" \ "if run loadzimage; then " \ - "if test -n $dtbfile; then " \ + "if test -n $fdtfile; then " \ "if run loadfdt; then " \ "run mmcbootfdt;" \ "fi;" \ @@ -245,56 +161,23 @@ "fi;" \ "run nandboot; " \ -#define CONFIG_AUTO_COMPLETE 1 /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ +#undef CONFIG_SYS_PROMPT #define CONFIG_SYS_PROMPT "Overo # " -#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ -/* Print Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_MAXARGS 16 /* max number of command */ - /* args */ -/* Boot Argument Buffer Size */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + /* memtest works on */ #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 0x01F00000) /* 31MB */ -#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ - /* address */ -/* - * OMAP3 has 12 GP timers, they can be driven by the system clock - * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). - * This rate is divided by a local divisor. - */ -#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 -#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ - -/*----------------------------------------------------------------------- - * Physical Memory Map - */ -#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ -#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 -#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 - -/*----------------------------------------------------------------------- - * FLASH and environment organization - */ - -/* **** PISMO SUPPORT *** */ - +/* FLASH and environment organization */ /* Configure the PISMO */ #define PISMO1_NAND_SIZE GPMC_SIZE_128M #define PISMO1_ONEN_SIZE GPMC_SIZE_128M -#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ - -#if defined(CONFIG_CMD_NAND) +#if defined(CONFIG_NAND) #define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE #endif @@ -310,67 +193,18 @@ #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET +/* Configure SMSC9211 ethernet */ #if defined(CONFIG_CMD_NET) -/*---------------------------------------------------------------------------- - * SMSC9211 Ethernet from SMSC9118 family - *---------------------------------------------------------------------------- - */ - #define CONFIG_SMC911X #define CONFIG_SMC911X_32_BIT #define CONFIG_SMC911X_BASE 0x2C000000 - #endif /* (CONFIG_CMD_NET) */ -/* - * Leave it at 0x80008000 to allow booting new u-boot.bin with X-loader - * and older u-boot.bin with the new U-Boot SPL. - */ -#define CONFIG_SYS_TEXT_BASE 0x80008000 -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +/* Initial RAM setup */ #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) - #define CONFIG_SYS_CACHELINE_SIZE 64 -/* Defines for SPL */ -#define CONFIG_SPL -#define CONFIG_SPL_FRAMEWORK -#define CONFIG_SPL_NAND_SIMPLE -#define CONFIG_SPL_TEXT_BASE 0x40200800 -#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ -#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK - -/* move malloc and bss high to prevent clashing with the main image */ -#define CONFIG_SYS_SPL_MALLOC_START 0x87000000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 -#define CONFIG_SPL_BSS_START_ADDR 0x87080000 /* end of minimum RAM */ -#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ - -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ -#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ -#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 -#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" - -#define CONFIG_SPL_BOARD_INIT -#define CONFIG_SPL_LIBCOMMON_SUPPORT -#define CONFIG_SPL_LIBDISK_SUPPORT -#define CONFIG_SPL_I2C_SUPPORT -#define CONFIG_SPL_LIBGENERIC_SUPPORT -#define CONFIG_SPL_MMC_SUPPORT -#define CONFIG_SPL_FAT_SUPPORT -#define CONFIG_SPL_SERIAL_SUPPORT -#define CONFIG_SPL_NAND_SUPPORT -#define CONFIG_SPL_NAND_BASE -#define CONFIG_SPL_NAND_DRIVERS -#define CONFIG_SPL_NAND_ECC -#define CONFIG_SPL_GPIO_SUPPORT -#define CONFIG_SPL_POWER_SUPPORT -#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" - /* NAND boot config */ #define CONFIG_SYS_NAND_5_ADDR_CYCLE #define CONFIG_SYS_NAND_PAGE_COUNT 64 -- cgit v1.2.1