From 973af335e61eede3578371330abd3971805887f5 Mon Sep 17 00:00:00 2001 From: Michael Schwingen Date: Mon, 23 May 2011 00:00:10 +0200 Subject: update/fix IXDP425 / IXDPG425 boards Signed-off-by: Michael Schwingen --- include/configs/ixdpg425.h | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) (limited to 'include/configs/ixdpg425.h') diff --git a/include/configs/ixdpg425.h b/include/configs/ixdpg425.h index 637fd7d4f8..3de001371f 100644 --- a/include/configs/ixdpg425.h +++ b/include/configs/ixdpg425.h @@ -53,9 +53,6 @@ /* * Misc configuration options */ -#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ -#define CONFIG_USE_IRQ 1 /* we need IRQ stuff for timer */ -#define CONFIG_TIMER_IRQ #define CONFIG_BOOTCOUNT_LIMIT /* support for bootcount limit */ #define CONFIG_SYS_BOOTCOUNT_ADDR 0x60003000 /* inside qmrg sram */ @@ -115,6 +112,7 @@ #define CONFIG_SYS_MEMTEST_END 0x00800000 /* 4 ... 8 MB in DRAM */ #define CONFIG_SYS_LOAD_ADDR 0x00010000 /* default load address */ +#define CONFIG_IXP425_TIMER_CLK 66666666 #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */ /* valid baudrates */ @@ -179,6 +177,8 @@ #define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */ #define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */ +#define CONFIG_SYS_TEXT_BASE 0x50000000 + #define PHYS_FLASH_1 0x50000000 /* Flash Bank #1 */ #define PHYS_FLASH_SIZE 0x01000000 /* 16 MB */ #define PHYS_FLASH_BANK_SIZE 0x01000000 /* 16 MB Banks */ @@ -248,4 +248,9 @@ */ #define CONFIG_SYS_CACHELINE_SIZE 32 +/* additions for new relocation code, must be added to all boards */ +#define CONFIG_SYS_SDRAM_BASE 0 +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE) + #endif /* __CONFIG_H */ -- cgit v1.2.1