From d584c68ce0f5bf2f430ccfb2ba00bd506206fb91 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 5 Jan 2016 17:02:52 -0200 Subject: phy: atheros: Use ar8035_config for AR8031 Commit 08ad9b068afb88 (" ar8031: modify the config func of ar8031 to ar8021_config") selected 'ar8021_config' as the configuration function for AR8031. The correct would be to use 'ar8035_config' instead as AR8031/AR8035 have the same programming model and even share the same phy driver in the linux kernel: drivers/net/phy/at803x.c. Tested on a mx6qsabresd and wandboard, which now can work without any PHY setup code in the board files. Signed-off-by: Fabio Estevam Acked-by: Joe Hershberger --- drivers/net/phy/atheros.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/net/phy/atheros.c b/drivers/net/phy/atheros.c index d509e30d35..ba57b1a4b9 100644 --- a/drivers/net/phy/atheros.c +++ b/drivers/net/phy/atheros.c @@ -51,7 +51,7 @@ static struct phy_driver AR8031_driver = { .uid = 0x4dd074, .mask = 0xffffffef, .features = PHY_GBIT_FEATURES, - .config = ar8021_config, + .config = ar8035_config, .startup = genphy_startup, .shutdown = genphy_shutdown, }; -- cgit v1.2.1 From fcbe8c56743a1f8ec397a71d5a932faee920bc8a Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Mon, 4 Jan 2016 21:12:22 +0800 Subject: imx: mx7: fix the temperature checking for Rev1.1 To TO1.0, we can not rely on finish bit to read temperature. But to TO1.1, the issue was fixed by IC, we can rely on finish bit for temperature reading for TO1.1. Signed-off-by: Peng Fan Cc: Stefano Babic Cc: Tim Harvey Cc: Fabio Estevam Cc: Adrian Alonso --- drivers/thermal/imx_thermal.c | 23 +++++++++++++++-------- 1 file changed, 15 insertions(+), 8 deletions(-) (limited to 'drivers') diff --git a/drivers/thermal/imx_thermal.c b/drivers/thermal/imx_thermal.c index 09a3c52680..0509094555 100644 --- a/drivers/thermal/imx_thermal.c +++ b/drivers/thermal/imx_thermal.c @@ -130,7 +130,7 @@ static int read_cpu_temperature(struct udevice *dev) #elif defined(CONFIG_MX7) static int read_cpu_temperature(struct udevice *dev) { - unsigned int reg, tmp, start; + unsigned int reg, tmp; unsigned int raw_25c, te1; int temperature; unsigned int *priv = dev_get_priv(dev); @@ -169,18 +169,25 @@ static int read_cpu_temperature(struct udevice *dev) writel(TEMPMON_HW_ANADIG_TEMPSENSE1_FINISHED_MASK, &ccm_anatop->tempsense1_clr); writel(TEMPMON_HW_ANADIG_TEMPSENSE1_MEASURE_TEMP_MASK, &ccm_anatop->tempsense1_set); - start = get_timer(0); - /* Wait max 100ms */ - do { + if (soc_rev() >= CHIP_REV_1_1) { + while ((readl(&ccm_anatop->tempsense1) & + TEMPMON_HW_ANADIG_TEMPSENSE1_FINISHED_MASK) == 0) + ; + reg = readl(&ccm_anatop->tempsense1); + tmp = (reg & TEMPMON_HW_ANADIG_TEMPSENSE1_TEMP_VALUE_MASK) + >> TEMPMON_HW_ANADIG_TEMPSENSE1_TEMP_VALUE_SHIFT; + } else { /* - * Since we can not rely on finish bit, use 1ms delay to get - * temperature. From RM, 17us is enough to get data, but - * to gurantee to get the data, delay 100ms here. + * Since we can not rely on finish bit, use 10ms + * delay to get temperature. From RM, 17us is + * enough to get data, but to gurantee to get + * the data, delay 10ms here. */ + udelay(10000); reg = readl(&ccm_anatop->tempsense1); tmp = (reg & TEMPMON_HW_ANADIG_TEMPSENSE1_TEMP_VALUE_MASK) >> TEMPMON_HW_ANADIG_TEMPSENSE1_TEMP_VALUE_SHIFT; - } while (get_timer(0) < (start + 100)); + } writel(TEMPMON_HW_ANADIG_TEMPSENSE1_FINISHED_MASK, &ccm_anatop->tempsense1_clr); -- cgit v1.2.1 From 88f91d1375aaf4d21d77a2f2daa351dea9132a58 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?M=C3=A5ns=20Rullg=C3=A5rd?= Date: Tue, 15 Dec 2015 22:27:57 +0000 Subject: gpio: mxs: add name_to_gpio() function Override the default name_to_gpio() function with one that accepts strings of the form bank:pin. If a colon is present in the provided name, it behaves like the default version. This lets the "gpio" command work with sane names rather than requiring the user to enter the bank/pin composite in decimal. Signed-off-by: Mans Rullgard Reviewed-by: Stefano Babic --- drivers/gpio/mxs_gpio.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'drivers') diff --git a/drivers/gpio/mxs_gpio.c b/drivers/gpio/mxs_gpio.c index da0199b168..b54a10b493 100644 --- a/drivers/gpio/mxs_gpio.c +++ b/drivers/gpio/mxs_gpio.c @@ -114,3 +114,18 @@ int gpio_free(unsigned gpio) { return 0; } + +int name_to_gpio(const char *name) +{ + unsigned bank, pin; + char *end; + + bank = simple_strtoul(name, &end, 10); + + if (!*end || *end != ':') + return bank; + + pin = simple_strtoul(end + 1, NULL, 10); + + return (bank << MXS_PAD_BANK_SHIFT) | (pin << MXS_PAD_PIN_SHIFT); +} -- cgit v1.2.1 From 587c3f8ebe356b558f1876414885c1b4a31294ab Mon Sep 17 00:00:00 2001 From: Andrey Skvortsov Date: Sun, 20 Dec 2015 21:09:58 +0300 Subject: imx_watchdog: always set minimal timeout in reset_cpu The problem is that timeout bits in WCR register were leaved unchanged. So previously set timeout value was applied and therefore 'reset' command takes any value up to two minutes, depending on previous watchdog settings, instead of minimal 0.5 seconds. Signed-off-by: Andrey Skvortsov --- drivers/watchdog/imx_watchdog.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/watchdog/imx_watchdog.c b/drivers/watchdog/imx_watchdog.c index 0d775956bf..f9f817596f 100644 --- a/drivers/watchdog/imx_watchdog.c +++ b/drivers/watchdog/imx_watchdog.c @@ -43,7 +43,7 @@ void reset_cpu(ulong addr) { struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR; - clrsetbits_le16(&wdog->wcr, 0, WCR_WDE); + clrsetbits_le16(&wdog->wcr, WCR_WT_MSK, WCR_WDE); writew(0x5555, &wdog->wsr); writew(0xaaaa, &wdog->wsr); /* load minimum 1/2 second timeout */ -- cgit v1.2.1