From dc9cdf859e11de775e75cc233b09d6b6d257a818 Mon Sep 17 00:00:00 2001 From: Ramneek Mehresh Date: Fri, 29 May 2015 14:47:15 +0530 Subject: usb: dwc3: Add DWC3 controller driver support Add support for DWC3 XHCI controller driver Signed-off-by: Ramneek Mehresh --- drivers/usb/host/Makefile | 1 + drivers/usb/host/xhci-dwc3.c | 91 ++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 92 insertions(+) create mode 100644 drivers/usb/host/xhci-dwc3.c (limited to 'drivers') diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile index 4d35d3e5fe..310d979ebd 100644 --- a/drivers/usb/host/Makefile +++ b/drivers/usb/host/Makefile @@ -51,6 +51,7 @@ obj-$(CONFIG_USB_EHCI_ZYNQ) += ehci-zynq.o # xhci obj-$(CONFIG_USB_XHCI) += xhci.o xhci-mem.o xhci-ring.o +obj-$(CONFIG_USB_XHCI_DWC3) += xhci-dwc3.o obj-$(CONFIG_USB_XHCI_KEYSTONE) += xhci-keystone.o obj-$(CONFIG_USB_XHCI_EXYNOS) += xhci-exynos5.o obj-$(CONFIG_USB_XHCI_OMAP) += xhci-omap.o diff --git a/drivers/usb/host/xhci-dwc3.c b/drivers/usb/host/xhci-dwc3.c new file mode 100644 index 0000000000..67147cb627 --- /dev/null +++ b/drivers/usb/host/xhci-dwc3.c @@ -0,0 +1,91 @@ +/* + * Copyright 2015 Freescale Semiconductor, Inc. + * + * DWC3 controller driver + * + * Author: Ramneek Mehresh + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include + +void dwc3_set_mode(struct dwc3 *dwc3_reg, u32 mode) +{ + clrsetbits_le32(&dwc3_reg->g_ctl, + DWC3_GCTL_PRTCAPDIR(DWC3_GCTL_PRTCAP_OTG), + DWC3_GCTL_PRTCAPDIR(mode)); +} + +void dwc3_phy_reset(struct dwc3 *dwc3_reg) +{ + /* Assert USB3 PHY reset */ + setbits_le32(&dwc3_reg->g_usb3pipectl[0], DWC3_GUSB3PIPECTL_PHYSOFTRST); + + /* Assert USB2 PHY reset */ + setbits_le32(&dwc3_reg->g_usb2phycfg, DWC3_GUSB2PHYCFG_PHYSOFTRST); + + mdelay(100); + + /* Clear USB3 PHY reset */ + clrbits_le32(&dwc3_reg->g_usb3pipectl[0], DWC3_GUSB3PIPECTL_PHYSOFTRST); + + /* Clear USB2 PHY reset */ + clrbits_le32(&dwc3_reg->g_usb2phycfg, DWC3_GUSB2PHYCFG_PHYSOFTRST); +} + +void dwc3_core_soft_reset(struct dwc3 *dwc3_reg) +{ + /* Before Resetting PHY, put Core in Reset */ + setbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); + + /* reset USB3 phy - if required */ + dwc3_phy_reset(dwc3_reg); + + /* After PHYs are stable we can take Core out of reset state */ + clrbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); +} + +int dwc3_core_init(struct dwc3 *dwc3_reg) +{ + u32 reg; + u32 revision; + unsigned int dwc3_hwparams1; + + revision = readl(&dwc3_reg->g_snpsid); + /* This should read as U3 followed by revision number */ + if ((revision & DWC3_GSNPSID_MASK) != 0x55330000) { + puts("this is not a DesignWare USB3 DRD Core\n"); + return -1; + } + + dwc3_core_soft_reset(dwc3_reg); + + dwc3_hwparams1 = readl(&dwc3_reg->g_hwparams1); + + reg = readl(&dwc3_reg->g_ctl); + reg &= ~DWC3_GCTL_SCALEDOWN_MASK; + reg &= ~DWC3_GCTL_DISSCRAMBLE; + switch (DWC3_GHWPARAMS1_EN_PWROPT(dwc3_hwparams1)) { + case DWC3_GHWPARAMS1_EN_PWROPT_CLK: + reg &= ~DWC3_GCTL_DSBLCLKGTNG; + break; + default: + debug("No power optimization available\n"); + } + + /* + * WORKAROUND: DWC3 revisions <1.90a have a bug + * where the device can fail to connect at SuperSpeed + * and falls back to high-speed mode which causes + * the device to enter a Connect/Disconnect loop + */ + if ((revision & DWC3_REVISION_MASK) < 0x190a) + reg |= DWC3_GCTL_U2RSTECN; + + writel(reg, &dwc3_reg->g_ctl); + + return 0; +} -- cgit v1.2.1 From 552d60cc222f649b762b3adb9b5f1d681ccd062a Mon Sep 17 00:00:00 2001 From: Ramneek Mehresh Date: Fri, 29 May 2015 14:47:16 +0530 Subject: usb: xhci: exynos: Remove common dwc3 drv functions calls Remove all redundant dwc3 driver function calls that are defined by dwc3 driver Signed-off-by: Ramneek Mehresh --- drivers/usb/host/xhci-exynos5.c | 78 ----------------------------------------- 1 file changed, 78 deletions(-) (limited to 'drivers') diff --git a/drivers/usb/host/xhci-exynos5.c b/drivers/usb/host/xhci-exynos5.c index a27a79632b..251885b28b 100644 --- a/drivers/usb/host/xhci-exynos5.c +++ b/drivers/usb/host/xhci-exynos5.c @@ -179,84 +179,6 @@ static void exynos5_usb3_phy_exit(struct exynos_usb3_phy *phy) set_usbdrd_phy_ctrl(POWER_USB_DRD_PHY_CTRL_DISABLE); } -static void dwc3_set_mode(struct dwc3 *dwc3_reg, u32 mode) -{ - clrsetbits_le32(&dwc3_reg->g_ctl, - DWC3_GCTL_PRTCAPDIR(DWC3_GCTL_PRTCAP_OTG), - DWC3_GCTL_PRTCAPDIR(mode)); -} - -static void dwc3_core_soft_reset(struct dwc3 *dwc3_reg) -{ - /* Before Resetting PHY, put Core in Reset */ - setbits_le32(&dwc3_reg->g_ctl, - DWC3_GCTL_CORESOFTRESET); - - /* Assert USB3 PHY reset */ - setbits_le32(&dwc3_reg->g_usb3pipectl[0], - DWC3_GUSB3PIPECTL_PHYSOFTRST); - - /* Assert USB2 PHY reset */ - setbits_le32(&dwc3_reg->g_usb2phycfg, - DWC3_GUSB2PHYCFG_PHYSOFTRST); - - mdelay(100); - - /* Clear USB3 PHY reset */ - clrbits_le32(&dwc3_reg->g_usb3pipectl[0], - DWC3_GUSB3PIPECTL_PHYSOFTRST); - - /* Clear USB2 PHY reset */ - clrbits_le32(&dwc3_reg->g_usb2phycfg, - DWC3_GUSB2PHYCFG_PHYSOFTRST); - - /* After PHYs are stable we can take Core out of reset state */ - clrbits_le32(&dwc3_reg->g_ctl, - DWC3_GCTL_CORESOFTRESET); -} - -static int dwc3_core_init(struct dwc3 *dwc3_reg) -{ - u32 reg; - u32 revision; - unsigned int dwc3_hwparams1; - - revision = readl(&dwc3_reg->g_snpsid); - /* This should read as U3 followed by revision number */ - if ((revision & DWC3_GSNPSID_MASK) != 0x55330000) { - puts("this is not a DesignWare USB3 DRD Core\n"); - return -EINVAL; - } - - dwc3_core_soft_reset(dwc3_reg); - - dwc3_hwparams1 = readl(&dwc3_reg->g_hwparams1); - - reg = readl(&dwc3_reg->g_ctl); - reg &= ~DWC3_GCTL_SCALEDOWN_MASK; - reg &= ~DWC3_GCTL_DISSCRAMBLE; - switch (DWC3_GHWPARAMS1_EN_PWROPT(dwc3_hwparams1)) { - case DWC3_GHWPARAMS1_EN_PWROPT_CLK: - reg &= ~DWC3_GCTL_DSBLCLKGTNG; - break; - default: - debug("No power optimization available\n"); - } - - /* - * WORKAROUND: DWC3 revisions <1.90a have a bug - * where the device can fail to connect at SuperSpeed - * and falls back to high-speed mode which causes - * the device to enter a Connect/Disconnect loop - */ - if ((revision & DWC3_REVISION_MASK) < 0x190a) - reg |= DWC3_GCTL_U2RSTECN; - - writel(reg, &dwc3_reg->g_ctl); - - return 0; -} - static int exynos_xhci_core_init(struct exynos_xhci *exynos) { int ret; -- cgit v1.2.1 From 2770448c8cd440a29619e9daa99484a0e5a6fad7 Mon Sep 17 00:00:00 2001 From: Ramneek Mehresh Date: Fri, 29 May 2015 14:47:17 +0530 Subject: usb: xhci: omap: Remove common dwc3 drv functions calls Remove all redundant dwc3 driver function calls that are defined by dwc3 driver Signed-off-by: Ramneek Mehresh --- drivers/usb/host/xhci-omap.c | 60 ------------------------------------------ drivers/usb/phy/omap_usb_phy.c | 18 ------------- 2 files changed, 78 deletions(-) (limited to 'drivers') diff --git a/drivers/usb/host/xhci-omap.c b/drivers/usb/host/xhci-omap.c index 912b2bd8d5..3a55208384 100644 --- a/drivers/usb/host/xhci-omap.c +++ b/drivers/usb/host/xhci-omap.c @@ -34,66 +34,6 @@ inline int __board_usb_init(int index, enum usb_init_type init) int board_usb_init(int index, enum usb_init_type init) __attribute__((weak, alias("__board_usb_init"))); -static void dwc3_set_mode(struct dwc3 *dwc3_reg, u32 mode) -{ - clrsetbits_le32(&dwc3_reg->g_ctl, - DWC3_GCTL_PRTCAPDIR(DWC3_GCTL_PRTCAP_OTG), - DWC3_GCTL_PRTCAPDIR(mode)); -} - -static void dwc3_core_soft_reset(struct dwc3 *dwc3_reg) -{ - /* Before Resetting PHY, put Core in Reset */ - setbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); - - omap_reset_usb_phy(dwc3_reg); - - /* After PHYs are stable we can take Core out of reset state */ - clrbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); -} - -static int dwc3_core_init(struct dwc3 *dwc3_reg) -{ - u32 reg; - u32 revision; - unsigned int dwc3_hwparams1; - - revision = readl(&dwc3_reg->g_snpsid); - /* This should read as U3 followed by revision number */ - if ((revision & DWC3_GSNPSID_MASK) != 0x55330000) { - puts("this is not a DesignWare USB3 DRD Core\n"); - return -1; - } - - dwc3_core_soft_reset(dwc3_reg); - - dwc3_hwparams1 = readl(&dwc3_reg->g_hwparams1); - - reg = readl(&dwc3_reg->g_ctl); - reg &= ~DWC3_GCTL_SCALEDOWN_MASK; - reg &= ~DWC3_GCTL_DISSCRAMBLE; - switch (DWC3_GHWPARAMS1_EN_PWROPT(dwc3_hwparams1)) { - case DWC3_GHWPARAMS1_EN_PWROPT_CLK: - reg &= ~DWC3_GCTL_DSBLCLKGTNG; - break; - default: - debug("No power optimization available\n"); - } - - /* - * WORKAROUND: DWC3 revisions <1.90a have a bug - * where the device can fail to connect at SuperSpeed - * and falls back to high-speed mode which causes - * the device to enter a Connect/Disconnect loop - */ - if ((revision & DWC3_REVISION_MASK) < 0x190a) - reg |= DWC3_GCTL_U2RSTECN; - - writel(reg, &dwc3_reg->g_ctl); - - return 0; -} - static int omap_xhci_core_init(struct omap_xhci *omap) { int ret = 0; diff --git a/drivers/usb/phy/omap_usb_phy.c b/drivers/usb/phy/omap_usb_phy.c index 63d9301681..f9069c7f9c 100644 --- a/drivers/usb/phy/omap_usb_phy.c +++ b/drivers/usb/phy/omap_usb_phy.c @@ -223,24 +223,6 @@ void usb_phy_power(int on) } #endif /* CONFIG_AM437X_USB2PHY2_HOST */ -void omap_reset_usb_phy(struct dwc3 *dwc3_reg) -{ - /* Assert USB3 PHY reset */ - setbits_le32(&dwc3_reg->g_usb3pipectl[0], DWC3_GUSB3PIPECTL_PHYSOFTRST); - - /* Assert USB2 PHY reset */ - setbits_le32(&dwc3_reg->g_usb2phycfg, DWC3_GUSB2PHYCFG_PHYSOFTRST); - - mdelay(100); - - /* Clear USB3 PHY reset */ - clrbits_le32(&dwc3_reg->g_usb3pipectl[0], DWC3_GUSB3PIPECTL_PHYSOFTRST); - - /* Clear USB2 PHY reset */ - clrbits_le32(&dwc3_reg->g_usb2phycfg, DWC3_GUSB2PHYCFG_PHYSOFTRST); - -} - void omap_enable_phy(struct omap_xhci *omap) { #ifdef CONFIG_OMAP_USB2PHY2_HOST -- cgit v1.2.1 From 792651f030a0b77961e484f8de36fa42add61900 Mon Sep 17 00:00:00 2001 From: Ramneek Mehresh Date: Fri, 29 May 2015 14:47:18 +0530 Subject: usb: xhci: keystone: Remove common dwc3 drv functions calls Remove all redundant dwc3 driver function calls that are defined by dwc3 driver Signed-off-by: Ramneek Mehresh --- drivers/usb/host/xhci-keystone.c | 88 ---------------------------------------- 1 file changed, 88 deletions(-) (limited to 'drivers') diff --git a/drivers/usb/host/xhci-keystone.c b/drivers/usb/host/xhci-keystone.c index 05d338f261..924fb7616f 100644 --- a/drivers/usb/host/xhci-keystone.c +++ b/drivers/usb/host/xhci-keystone.c @@ -68,94 +68,6 @@ static void keystone_xhci_phy_unset(struct keystone_xhci_phy *phy) writel(val, &phy->phy_clock); } -static void dwc3_set_mode(struct dwc3 *dwc3_reg, u32 mode) -{ - clrsetbits_le32(&dwc3_reg->g_ctl, - DWC3_GCTL_PRTCAPDIR(DWC3_GCTL_PRTCAP_OTG), - DWC3_GCTL_PRTCAPDIR(mode)); -} - -static void dwc3_core_soft_reset(struct dwc3 *dwc3_reg) -{ - /* Before Resetting PHY, put Core in Reset */ - setbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); - - /* Assert USB3 PHY reset */ - setbits_le32(&dwc3_reg->g_usb3pipectl[0], DWC3_GUSB3PIPECTL_PHYSOFTRST); - - /* Assert USB2 PHY reset */ - setbits_le32(&dwc3_reg->g_usb2phycfg[0], DWC3_GUSB2PHYCFG_PHYSOFTRST); - - mdelay(100); - - /* Clear USB3 PHY reset */ - clrbits_le32(&dwc3_reg->g_usb3pipectl[0], DWC3_GUSB3PIPECTL_PHYSOFTRST); - - /* Clear USB2 PHY reset */ - clrbits_le32(&dwc3_reg->g_usb2phycfg[0], DWC3_GUSB2PHYCFG_PHYSOFTRST); - - /* After PHYs are stable we can take Core out of reset state */ - clrbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); -} - -static int dwc3_core_init(struct dwc3 *dwc3_reg) -{ - u32 revision, val; - unsigned long t_rst; - unsigned int dwc3_hwparams1; - - revision = readl(&dwc3_reg->g_snpsid); - /* This should read as U3 followed by revision number */ - if ((revision & DWC3_GSNPSID_MASK) != 0x55330000) { - puts("this is not a DesignWare USB3 DRD Core\n"); - return -EINVAL; - } - - /* issue device SoftReset too */ - writel(DWC3_DCTL_CSFTRST, &dwc3_reg->d_ctl); - - t_rst = get_timer(0); - do { - val = readl(&dwc3_reg->d_ctl); - if (!(val & DWC3_DCTL_CSFTRST)) - break; - WATCHDOG_RESET(); - } while (get_timer(t_rst) < 500); - - if (val & DWC3_DCTL_CSFTRST) { - debug("Reset timed out\n"); - return -2; - } - - dwc3_core_soft_reset(dwc3_reg); - - dwc3_hwparams1 = readl(&dwc3_reg->g_hwparams1); - - val = readl(&dwc3_reg->g_ctl); - val &= ~DWC3_GCTL_SCALEDOWN_MASK; - val &= ~DWC3_GCTL_DISSCRAMBLE; - switch (DWC3_GHWPARAMS1_EN_PWROPT(dwc3_hwparams1)) { - case DWC3_GHWPARAMS1_EN_PWROPT_CLK: - val &= ~DWC3_GCTL_DSBLCLKGTNG; - break; - default: - printf("No power optimization available\n"); - } - - /* - * WORKAROUND: DWC3 revisions <1.90a have a bug - * where the device can fail to connect at SuperSpeed - * and falls back to high-speed mode which causes - * the device to enter a Connect/Disconnect loop - */ - if ((revision & DWC3_REVISION_MASK) < 0x190a) - val |= DWC3_GCTL_U2RSTECN; - - writel(val, &dwc3_reg->g_ctl); - - return 0; -} - static int keystone_xhci_core_init(struct dwc3 *dwc3_reg) { int ret; -- cgit v1.2.1 From ba92ee06a5b792e5cbc144f95883cc54f4982255 Mon Sep 17 00:00:00 2001 From: Ramneek Mehresh Date: Fri, 29 May 2015 14:47:19 +0530 Subject: usb: fsl: Add XHCI driver support Add xhci driver support for all FSL socs Signed-off-by: Ramneek Mehresh --- drivers/usb/host/Makefile | 1 + drivers/usb/host/xhci-fsl.c | 109 ++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 110 insertions(+) create mode 100644 drivers/usb/host/xhci-fsl.c (limited to 'drivers') diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile index 310d979ebd..6cc3bbd870 100644 --- a/drivers/usb/host/Makefile +++ b/drivers/usb/host/Makefile @@ -54,6 +54,7 @@ obj-$(CONFIG_USB_XHCI) += xhci.o xhci-mem.o xhci-ring.o obj-$(CONFIG_USB_XHCI_DWC3) += xhci-dwc3.o obj-$(CONFIG_USB_XHCI_KEYSTONE) += xhci-keystone.o obj-$(CONFIG_USB_XHCI_EXYNOS) += xhci-exynos5.o +obj-$(CONFIG_USB_XHCI_FSL) += xhci-fsl.o obj-$(CONFIG_USB_XHCI_OMAP) += xhci-omap.o obj-$(CONFIG_USB_XHCI_PCI) += xhci-pci.o obj-$(CONFIG_USB_XHCI_UNIPHIER) += xhci-uniphier.o diff --git a/drivers/usb/host/xhci-fsl.c b/drivers/usb/host/xhci-fsl.c new file mode 100644 index 0000000000..f624c90183 --- /dev/null +++ b/drivers/usb/host/xhci-fsl.c @@ -0,0 +1,109 @@ +/* + * Copyright 2015 Freescale Semiconductor, Inc. + * + * FSL USB HOST xHCI Controller + * + * Author: Ramneek Mehresh + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include "xhci.h" + +/* Declare global data pointer */ +DECLARE_GLOBAL_DATA_PTR; + +static struct fsl_xhci fsl_xhci; +unsigned long ctr_addr[] = FSL_USB_XHCI_ADDR; + +__weak int __board_usb_init(int index, enum usb_init_type init) +{ + return 0; +} + +void usb_phy_reset(struct dwc3 *dwc3_reg) +{ + /* Assert USB3 PHY reset */ + setbits_le32(&dwc3_reg->g_usb3pipectl[0], DWC3_GUSB3PIPECTL_PHYSOFTRST); + + /* Assert USB2 PHY reset */ + setbits_le32(&dwc3_reg->g_usb2phycfg, DWC3_GUSB2PHYCFG_PHYSOFTRST); + + mdelay(200); + + /* Clear USB3 PHY reset */ + clrbits_le32(&dwc3_reg->g_usb3pipectl[0], DWC3_GUSB3PIPECTL_PHYSOFTRST); + + /* Clear USB2 PHY reset */ + clrbits_le32(&dwc3_reg->g_usb2phycfg, DWC3_GUSB2PHYCFG_PHYSOFTRST); +} + +static int fsl_xhci_core_init(struct fsl_xhci *fsl_xhci) +{ + int ret = 0; + + ret = dwc3_core_init(fsl_xhci->dwc3_reg); + if (ret) { + debug("%s:failed to initialize core\n", __func__); + return ret; + } + + /* We are hard-coding DWC3 core to Host Mode */ + dwc3_set_mode(fsl_xhci->dwc3_reg, DWC3_GCTL_PRTCAP_HOST); + + return ret; +} + +static int fsl_xhci_core_exit(struct fsl_xhci *fsl_xhci) +{ + /* + * Currently fsl socs do not support PHY shutdown from + * sw. But this support may be added in future socs. + */ + return 0; +} + +int xhci_hcd_init(int index, struct xhci_hccr **hccr, struct xhci_hcor **hcor) +{ + struct fsl_xhci *ctx = &fsl_xhci; + int ret = 0; + + ctx->hcd = (struct xhci_hccr *)ctr_addr[index]; + ctx->dwc3_reg = (struct dwc3 *)((char *)(ctx->hcd) + DWC3_REG_OFFSET); + + ret = board_usb_init(index, USB_INIT_HOST); + if (ret != 0) { + puts("Failed to initialize board for USB\n"); + return ret; + } + + ret = fsl_xhci_core_init(ctx); + if (ret < 0) { + puts("Failed to initialize xhci\n"); + return ret; + } + + *hccr = (struct xhci_hccr *)ctx->hcd; + *hcor = (struct xhci_hcor *)((uint32_t) *hccr + + HC_LENGTH(xhci_readl(&(*hccr)->cr_capbase))); + + debug("fsl-xhci: init hccr %x and hcor %x hc_length %d\n", + (uint32_t)*hccr, (uint32_t)*hcor, + (uint32_t)HC_LENGTH(xhci_readl(&(*hccr)->cr_capbase))); + + return ret; +} + +void xhci_hcd_stop(int index) +{ + struct fsl_xhci *ctx = &fsl_xhci; + + fsl_xhci_core_exit(ctx); +} -- cgit v1.2.1 From 7e5a32fcf378d30cb2ab5f8471071350574ff70a Mon Sep 17 00:00:00 2001 From: Nikhil Badola Date: Tue, 23 Jun 2015 09:17:32 +0530 Subject: drivers: usb: fsl: Remove warnings for 64-bit architectures Replace uint32_t with uintptr_t to remove compilation warnings for 64-bit architectures. Signed-off-by: Nikhil Badola --- drivers/usb/host/xhci-fsl.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'drivers') diff --git a/drivers/usb/host/xhci-fsl.c b/drivers/usb/host/xhci-fsl.c index f624c90183..385422aed6 100644 --- a/drivers/usb/host/xhci-fsl.c +++ b/drivers/usb/host/xhci-fsl.c @@ -91,12 +91,12 @@ int xhci_hcd_init(int index, struct xhci_hccr **hccr, struct xhci_hcor **hcor) } *hccr = (struct xhci_hccr *)ctx->hcd; - *hcor = (struct xhci_hcor *)((uint32_t) *hccr + *hcor = (struct xhci_hcor *)((uintptr_t) *hccr + HC_LENGTH(xhci_readl(&(*hccr)->cr_capbase))); - debug("fsl-xhci: init hccr %x and hcor %x hc_length %d\n", - (uint32_t)*hccr, (uint32_t)*hcor, - (uint32_t)HC_LENGTH(xhci_readl(&(*hccr)->cr_capbase))); + debug("fsl-xhci: init hccr %lx and hcor %lx hc_length %lx\n", + (uintptr_t)*hccr, (uintptr_t)*hcor, + (uintptr_t)HC_LENGTH(xhci_readl(&(*hccr)->cr_capbase))); return ret; } -- cgit v1.2.1 From 667f4dd90f0f40f8d4fde7ef280550ef5f7946f8 Mon Sep 17 00:00:00 2001 From: Nikhil Badola Date: Tue, 23 Jun 2015 09:17:49 +0530 Subject: drivers: usb: fsl: Implement Erratum A-009116 for XHCI controller This adjusts (micro)frame length to appropriate value thus avoiding USB devices to time out over a longer run Signed-off-by: Nikhil Badola --- drivers/usb/host/xhci-dwc3.c | 6 ++++++ drivers/usb/host/xhci-fsl.c | 3 +++ 2 files changed, 9 insertions(+) (limited to 'drivers') diff --git a/drivers/usb/host/xhci-dwc3.c b/drivers/usb/host/xhci-dwc3.c index 67147cb627..c722c504ad 100644 --- a/drivers/usb/host/xhci-dwc3.c +++ b/drivers/usb/host/xhci-dwc3.c @@ -89,3 +89,9 @@ int dwc3_core_init(struct dwc3 *dwc3_reg) return 0; } + +void dwc3_set_fladj(struct dwc3 *dwc3_reg, u32 val) +{ + setbits_le32(&dwc3_reg->g_fladj, GFLADJ_30MHZ_REG_SEL | + GFLADJ_30MHZ(val)); +} diff --git a/drivers/usb/host/xhci-fsl.c b/drivers/usb/host/xhci-fsl.c index 385422aed6..6781b94851 100644 --- a/drivers/usb/host/xhci-fsl.c +++ b/drivers/usb/host/xhci-fsl.c @@ -58,6 +58,9 @@ static int fsl_xhci_core_init(struct fsl_xhci *fsl_xhci) /* We are hard-coding DWC3 core to Host Mode */ dwc3_set_mode(fsl_xhci->dwc3_reg, DWC3_GCTL_PRTCAP_HOST); + /* Set GFLADJ_30MHZ as 20h as per XHCI spec default value */ + dwc3_set_fladj(fsl_xhci->dwc3_reg, GFLADJ_30MHZ_DEFAULT); + return ret; } -- cgit v1.2.1 From f2226c0dbec2de90f92367f66af3a4cb20109ed3 Mon Sep 17 00:00:00 2001 From: Nikhil Badola Date: Wed, 24 Jun 2015 10:52:48 +0530 Subject: drivers: usb: fsl: Remove LS102XA immap inclusion Remove LS102XA immap header inclusion from xhci fsl driver. It removes redefinition warnings when built for platforms other than LS102XA Signed-off-by: Nikhil Badola --- drivers/usb/host/xhci-fsl.c | 1 - 1 file changed, 1 deletion(-) (limited to 'drivers') diff --git a/drivers/usb/host/xhci-fsl.c b/drivers/usb/host/xhci-fsl.c index 6781b94851..6481e07823 100644 --- a/drivers/usb/host/xhci-fsl.c +++ b/drivers/usb/host/xhci-fsl.c @@ -11,7 +11,6 @@ #include #include #include -#include #include #include #include -- cgit v1.2.1 From 01acd6abbdd5a5951f68d08c245550c720ea6ad8 Mon Sep 17 00:00:00 2001 From: Paul Kocialkowski Date: Fri, 12 Jun 2015 19:56:58 +0200 Subject: usb: USB download gadget and functions config options coherent naming This introduces a coherent scheme for naming USB download gadget and functions config options. The download USB gadget config option is moved to CONFIG_USB_GADGET_DOWNLOAD for better consistency with other gadgets and each function's config option is moved to a CONFIG_USB_FUNCTION_ prefix. Signed-off-by: Paul Kocialkowski Tested-by: Lukasz Majewski Test HW: Odroid_XU3 (Exynos5422), trats (Exynos4210) --- drivers/dfu/Makefile | 2 +- drivers/usb/gadget/Makefile | 8 ++++---- 2 files changed, 5 insertions(+), 5 deletions(-) (limited to 'drivers') diff --git a/drivers/dfu/Makefile b/drivers/dfu/Makefile index 5cc535efdd..cebea30ac3 100644 --- a/drivers/dfu/Makefile +++ b/drivers/dfu/Makefile @@ -5,7 +5,7 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-$(CONFIG_DFU_FUNCTION) += dfu.o +obj-$(CONFIG_USB_FUNCTION_DFU) += dfu.o obj-$(CONFIG_DFU_MMC) += dfu_mmc.o obj-$(CONFIG_DFU_NAND) += dfu_nand.o obj-$(CONFIG_DFU_RAM) += dfu_ram.o diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile index 70bb550fa4..46d7d945dd 100644 --- a/drivers/usb/gadget/Makefile +++ b/drivers/usb/gadget/Makefile @@ -15,10 +15,10 @@ obj-$(CONFIG_USB_GADGET_S3C_UDC_OTG) += s3c_udc_otg.o obj-$(CONFIG_USB_GADGET_S3C_UDC_OTG_PHY) += s3c_udc_otg_phy.o obj-$(CONFIG_USB_GADGET_FOTG210) += fotg210.o obj-$(CONFIG_CI_UDC) += ci_udc.o -obj-$(CONFIG_THOR_FUNCTION) += f_thor.o -obj-$(CONFIG_USBDOWNLOAD_GADGET) += g_dnl.o -obj-$(CONFIG_DFU_FUNCTION) += f_dfu.o -obj-$(CONFIG_USB_GADGET_MASS_STORAGE) += f_mass_storage.o +obj-$(CONFIG_USB_GADGET_DOWNLOAD) += g_dnl.o +obj-$(CONFIG_USB_FUNCTION_THOR) += f_thor.o +obj-$(CONFIG_USB_FUNCTION_DFU) += f_dfu.o +obj-$(CONFIG_USB_FUNCTION_MASS_STORAGE) += f_mass_storage.o obj-$(CONFIG_CMD_FASTBOOT) += f_fastboot.o endif ifdef CONFIG_USB_ETHER -- cgit v1.2.1 From 17da3c0c8cad2a40903c078d178cd663d73ccc7c Mon Sep 17 00:00:00 2001 From: Paul Kocialkowski Date: Fri, 12 Jun 2015 19:56:59 +0200 Subject: usb: Fastboot function config for better consistency with other functions USB download gadget functions such as thor and dfu have a separate config option for the USB gadget part of the code, independent from the command part. This switches the fastboot USB gadget to the same scheme, for better consistency. Signed-off-by: Paul Kocialkowski Tested-by: Lukasz Majewski Test HW: Odroid_XU3 (Exynos5422), trats (Exynos4210) --- drivers/usb/gadget/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile index 46d7d945dd..4e15323131 100644 --- a/drivers/usb/gadget/Makefile +++ b/drivers/usb/gadget/Makefile @@ -19,7 +19,7 @@ obj-$(CONFIG_USB_GADGET_DOWNLOAD) += g_dnl.o obj-$(CONFIG_USB_FUNCTION_THOR) += f_thor.o obj-$(CONFIG_USB_FUNCTION_DFU) += f_dfu.o obj-$(CONFIG_USB_FUNCTION_MASS_STORAGE) += f_mass_storage.o -obj-$(CONFIG_CMD_FASTBOOT) += f_fastboot.o +obj-$(CONFIG_USB_FUNCTION_FASTBOOT) += f_fastboot.o endif ifdef CONFIG_USB_ETHER obj-y += ether.o -- cgit v1.2.1 From 99fc2221a059b2571aedf6ff27d7d17dac2b0994 Mon Sep 17 00:00:00 2001 From: Paul Kocialkowski Date: Fri, 12 Jun 2015 19:57:01 +0200 Subject: usb: gadget: Weak board_usb_init/cleanup definitions in USB download gadget code Weak versions of board_usb_init and board_usb_cleanup are defined in common USB host code, but it is also used for USB device gadgets, so we also need a weak definition of it when there is no USB host enabled. Both weak definitions do not conflict. Signed-off-by: Paul Kocialkowski Tested-by: Lukasz Majewski Test HW: Odroid_XU3 (Exynos5422), trats (Exynos4210) --- drivers/usb/gadget/g_dnl.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'drivers') diff --git a/drivers/usb/gadget/g_dnl.c b/drivers/usb/gadget/g_dnl.c index ee52a29467..ad89a0d2e6 100644 --- a/drivers/usb/gadget/g_dnl.c +++ b/drivers/usb/gadget/g_dnl.c @@ -12,6 +12,7 @@ #include #include +#include #include #include @@ -147,6 +148,18 @@ static int g_dnl_config_register(struct usb_composite_dev *cdev) return usb_add_config(cdev, config); } +__weak +int board_usb_init(int index, enum usb_init_type init) +{ + return 0; +} + +__weak +int board_usb_cleanup(int index, enum usb_init_type init) +{ + return 0; +} + __weak int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name) { -- cgit v1.2.1 From 94b385fa236c85b00ee0bceced05aad2550c2208 Mon Sep 17 00:00:00 2001 From: Paul Kocialkowski Date: Sat, 4 Jul 2015 16:46:15 +0200 Subject: usb: gadget: fastboot: Request status and length check in rx handler This avoids handling requests that have an error status or no data. In particular, this avoids showing unnecessary error messages when the USB gadget gets disconnected (e.g. with fastboot continue) and the fastboot USB gadget driver sends an error back to the host (that has disconnected already). Signed-off-by: Paul Kocialkowski --- drivers/usb/gadget/f_fastboot.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) (limited to 'drivers') diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c index 206b6d17ae..b9a909986b 100644 --- a/drivers/usb/gadget/f_fastboot.c +++ b/drivers/usb/gadget/f_fastboot.c @@ -635,6 +635,9 @@ static void rx_handler_command(struct usb_ep *ep, struct usb_request *req) void (*func_cb)(struct usb_ep *ep, struct usb_request *req) = NULL; int i; + if (req->status != 0 || req->length == 0) + return; + for (i = 0; i < ARRAY_SIZE(cmd_dispatch_info); i++) { if (!strcmp_l1(cmd_dispatch_info[i].cmd, cmdbuf)) { func_cb = cmd_dispatch_info[i].cb; @@ -656,9 +659,7 @@ static void rx_handler_command(struct usb_ep *ep, struct usb_request *req) } } - if (req->status == 0) { - *cmdbuf = '\0'; - req->actual = 0; - usb_ep_queue(ep, req, 0); - } + *cmdbuf = '\0'; + req->actual = 0; + usb_ep_queue(ep, req, 0); } -- cgit v1.2.1 From bc9071c9f318aa69c815927b3828096d1976de1b Mon Sep 17 00:00:00 2001 From: Paul Kocialkowski Date: Sat, 4 Jul 2015 16:46:16 +0200 Subject: usb: gadget: fastboot: Dequeue the previous IN request for the current request Recent versions of the fastboot tool will query the partition type before doing an operation on a partition (such as erase, flash, etc). It will then submit the operation as soon as the response for the partition type is received. Usually, the MUSB controller will see that the partition type request return status was read by the host at the very same time as the actual operation request is submitted by the host. However, the operation will be read first (int_rx is handled first in musb_interrupt) and after it is completed, the fastboot USB gadget driver will send another return status. Hence, this happens before the musb gadget framework has had a chance to handle the previous acknowledgement that the host read the return status and dequeue the request. The host will then usually empty the FIFO by the time musb_interrupt gets around handling the return status acknowledgement (for the previous request, this is still on the same musb_interrupt call), so no other interrupt is generated and the most recent return status acknowledgement remains unaccounted for. It will then be used as a response for the next command, and the proper response for it will be delayed to the next command, and so on. Dequeuing the previous IN request in the fastboot code ensures that no previous return status remains. It is acceptable to do it since there is no callback to it anyways. Signed-off-by: Paul Kocialkowski --- drivers/usb/gadget/f_fastboot.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'drivers') diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c index b9a909986b..60c846da91 100644 --- a/drivers/usb/gadget/f_fastboot.c +++ b/drivers/usb/gadget/f_fastboot.c @@ -311,6 +311,9 @@ static int fastboot_tx_write(const char *buffer, unsigned int buffer_size) memcpy(in_req->buf, buffer, buffer_size); in_req->length = buffer_size; + + usb_ep_dequeue(fastboot_func->in_ep, in_req); + ret = usb_ep_queue(fastboot_func->in_ep, in_req, 0); if (ret) printf("Error %d on queue\n", ret); -- cgit v1.2.1 From 854cbd2977561f8572c7ab07b95ee90226451185 Mon Sep 17 00:00:00 2001 From: Jiandong Zheng Date: Thu, 9 Jul 2015 14:26:39 -0700 Subject: usb: gadget: bcm_udc_otg files Add the required files for the Broadcom UDC OTG interface. Signed-off-by: Jiandong Zheng Signed-off-by: Steve Rae --- drivers/usb/gadget/bcm_udc_otg.h | 22 ++++++++++++++++ drivers/usb/gadget/bcm_udc_otg_phy.c | 51 ++++++++++++++++++++++++++++++++++++ 2 files changed, 73 insertions(+) create mode 100644 drivers/usb/gadget/bcm_udc_otg.h create mode 100644 drivers/usb/gadget/bcm_udc_otg_phy.c (limited to 'drivers') diff --git a/drivers/usb/gadget/bcm_udc_otg.h b/drivers/usb/gadget/bcm_udc_otg.h new file mode 100644 index 0000000000..d47aefaa89 --- /dev/null +++ b/drivers/usb/gadget/bcm_udc_otg.h @@ -0,0 +1,22 @@ +/* + * Copyright 2015 Broadcom Corporation. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __BCM_UDC_OTG_H +#define __BCM_UDC_OTG_H + +#include + +static inline void wfld_set(uintptr_t addr, uint32_t fld_val, uint32_t fld_mask) +{ + writel(((readl(addr) & ~(fld_mask)) | (fld_val)), (addr)); +} + +static inline void wfld_clear(uintptr_t addr, uint32_t fld_mask) +{ + writel((readl(addr) & ~(fld_mask)), (addr)); +} + +#endif diff --git a/drivers/usb/gadget/bcm_udc_otg_phy.c b/drivers/usb/gadget/bcm_udc_otg_phy.c new file mode 100644 index 0000000000..f8690b034c --- /dev/null +++ b/drivers/usb/gadget/bcm_udc_otg_phy.c @@ -0,0 +1,51 @@ +/* + * Copyright 2015 Broadcom Corporation. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include + +#include +#include "bcm_udc_otg.h" + +void otg_phy_init(struct s3c_udc *dev) +{ + /* set Phy to driving mode */ + wfld_clear(HSOTG_CTRL_BASE_ADDR + HSOTG_CTRL_PHY_P1CTL_OFFSET, + HSOTG_CTRL_PHY_P1CTL_NON_DRIVING_MASK); + + udelay(100); + + /* clear Soft Disconnect */ + wfld_clear(HSOTG_BASE_ADDR + HSOTG_DCTL_OFFSET, + HSOTG_DCTL_SFTDISCON_MASK); + + /* invoke Reset (active low) */ + wfld_clear(HSOTG_CTRL_BASE_ADDR + HSOTG_CTRL_PHY_P1CTL_OFFSET, + HSOTG_CTRL_PHY_P1CTL_SOFT_RESET_MASK); + + /* Reset needs to be asserted for 2ms */ + udelay(2000); + + /* release Reset */ + wfld_set(HSOTG_CTRL_BASE_ADDR + HSOTG_CTRL_PHY_P1CTL_OFFSET, + HSOTG_CTRL_PHY_P1CTL_SOFT_RESET_MASK, + HSOTG_CTRL_PHY_P1CTL_SOFT_RESET_MASK); +} + +void otg_phy_off(struct s3c_udc *dev) +{ + /* Soft Disconnect */ + wfld_set(HSOTG_BASE_ADDR + HSOTG_DCTL_OFFSET, + HSOTG_DCTL_SFTDISCON_MASK, + HSOTG_DCTL_SFTDISCON_MASK); + + /* set Phy to non-driving (reset) mode */ + wfld_set(HSOTG_CTRL_BASE_ADDR + HSOTG_CTRL_PHY_P1CTL_OFFSET, + HSOTG_CTRL_PHY_P1CTL_NON_DRIVING_MASK, + HSOTG_CTRL_PHY_P1CTL_NON_DRIVING_MASK); +} -- cgit v1.2.1 From d00bf7812181f53d6027610f35c1aa2018ce9fd3 Mon Sep 17 00:00:00 2001 From: Jiandong Zheng Date: Thu, 9 Jul 2015 14:26:40 -0700 Subject: implement Fastboot via USB OTG on bcm28155_ap boards Signed-off-by: Jiandong Zheng Signed-off-by: Steve Rae --- drivers/usb/gadget/Makefile | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers') diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile index 4e15323131..4c11a7e326 100644 --- a/drivers/usb/gadget/Makefile +++ b/drivers/usb/gadget/Makefile @@ -11,6 +11,7 @@ obj-$(CONFIG_USB_ETHER) += epautoconf.o config.o usbstring.o # new USB gadget layer dependencies ifdef CONFIG_USB_GADGET obj-$(CONFIG_USB_GADGET_ATMEL_USBA) += atmel_usba_udc.o +obj-$(CONFIG_USB_GADGET_BCM_UDC_OTG_PHY) += bcm_udc_otg_phy.o obj-$(CONFIG_USB_GADGET_S3C_UDC_OTG) += s3c_udc_otg.o obj-$(CONFIG_USB_GADGET_S3C_UDC_OTG_PHY) += s3c_udc_otg_phy.o obj-$(CONFIG_USB_GADGET_FOTG210) += fotg210.o -- cgit v1.2.1 From a588d99ac19fe09818c6c874bec273012699d82a Mon Sep 17 00:00:00 2001 From: Paul Kocialkowski Date: Mon, 20 Jul 2015 12:38:22 +0200 Subject: usb: CONFIG_USB_FASTBOOT prefix replacement for consistency FASTBOOT is defined both by CONFIG_USB_FUNCTION_FASTBOOT AND CONFIG_CMD_FASTBOOT, so it doesn't make much sense to have a CONFIG_USB_FASTBOOT prefix for fastboot-specific options, especially given that other config options for fastboot use the CONFIG_FASTBOOT prefix. This replaces the CONFIG_USB_FASTBOOT prefix with CONFIG_FASTBOOT, for consistency. Signed-off-by: Paul Kocialkowski --- drivers/usb/gadget/f_fastboot.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'drivers') diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c index 60c846da91..ca01a018b5 100644 --- a/drivers/usb/gadget/f_fastboot.c +++ b/drivers/usb/gadget/f_fastboot.c @@ -380,7 +380,7 @@ static void cb_getvar(struct usb_ep *ep, struct usb_request *req) !strcmp_l1("max-download-size", cmd)) { char str_num[12]; - sprintf(str_num, "0x%08x", CONFIG_USB_FASTBOOT_BUF_SIZE); + sprintf(str_num, "0x%08x", CONFIG_FASTBOOT_BUF_SIZE); strncat(response, str_num, chars_left); } else if (!strcmp_l1("serialno", cmd)) { s = getenv("serial#"); @@ -430,7 +430,7 @@ static void rx_handler_dl_image(struct usb_ep *ep, struct usb_request *req) if (buffer_size < transfer_size) transfer_size = buffer_size; - memcpy((void *)CONFIG_USB_FASTBOOT_BUF_ADDR + download_bytes, + memcpy((void *)CONFIG_FASTBOOT_BUF_ADDR + download_bytes, buffer, transfer_size); pre_dot_num = download_bytes / BYTES_PER_DOT; @@ -483,7 +483,7 @@ static void cb_download(struct usb_ep *ep, struct usb_request *req) if (0 == download_size) { sprintf(response, "FAILdata invalid size"); - } else if (download_size > CONFIG_USB_FASTBOOT_BUF_SIZE) { + } else if (download_size > CONFIG_FASTBOOT_BUF_SIZE) { download_size = 0; sprintf(response, "FAILdata too large"); } else { @@ -544,7 +544,7 @@ static void cb_flash(struct usb_ep *ep, struct usb_request *req) strcpy(response, "FAILno flash device defined"); #ifdef CONFIG_FASTBOOT_FLASH_MMC_DEV - fb_mmc_flash_write(cmd, (void *)CONFIG_USB_FASTBOOT_BUF_ADDR, + fb_mmc_flash_write(cmd, (void *)CONFIG_FASTBOOT_BUF_ADDR, download_bytes, response); #endif fastboot_tx_write_str(response); -- cgit v1.2.1 From 82b9143bf8e5b359f094b90a19feb50a87268e8a Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Wed, 22 Jul 2015 10:01:30 +0200 Subject: usb: ehci-marvell: Drop wrl accessor function This patch removes the wrl accessor function from the Marvell EHCI driver by replacing it with the writel function. Signed-off-by: Stefan Roese Cc: Marek Vasut --- drivers/usb/host/ehci-marvell.c | 26 ++++++++++++-------------- 1 file changed, 12 insertions(+), 14 deletions(-) (limited to 'drivers') diff --git a/drivers/usb/host/ehci-marvell.c b/drivers/usb/host/ehci-marvell.c index 03c489c014..3a9f60f169 100644 --- a/drivers/usb/host/ehci-marvell.c +++ b/drivers/usb/host/ehci-marvell.c @@ -21,9 +21,6 @@ DECLARE_GLOBAL_DATA_PTR; -#define rdl(off) readl(MVUSB0_BASE + (off)) -#define wrl(off, val) writel((val), MVUSB0_BASE + (off)) - #define USB_WINDOW_CTRL(i) (0x320 + ((i) << 4)) #define USB_WINDOW_BASE(i) (0x324 + ((i) << 4)) #define USB_TARGET_DRAM 0x0 @@ -48,20 +45,20 @@ static void usb_brg_adrdec_setup(void) dram = mvebu_mbus_dram_info(); for (i = 0; i < 4; i++) { - wrl(USB_WINDOW_CTRL(i), 0); - wrl(USB_WINDOW_BASE(i), 0); + writel(0, MVUSB0_BASE + USB_WINDOW_CTRL(i)); + writel(0, MVUSB0_BASE + USB_WINDOW_BASE(i)); } for (i = 0; i < dram->num_cs; i++) { const struct mbus_dram_window *cs = dram->cs + i; /* Write size, attributes and target id to control register */ - wrl(USB_WINDOW_CTRL(i), - ((cs->size - 1) & 0xffff0000) | (cs->mbus_attr << 8) | - (dram->mbus_dram_target_id << 4) | 1); + writel(((cs->size - 1) & 0xffff0000) | (cs->mbus_attr << 8) | + (dram->mbus_dram_target_id << 4) | 1, + MVUSB0_BASE + USB_WINDOW_CTRL(i)); /* Write base address to base register */ - wrl(USB_WINDOW_BASE(i), cs->base); + writel(cs->base, MVUSB0_BASE + USB_WINDOW_BASE(i)); } } #else @@ -95,13 +92,14 @@ static void usb_brg_adrdec_setup(void) size = gd->bd->bi_dram[i].size; base = gd->bd->bi_dram[i].start; if ((size) && (attrib)) - wrl(USB_WINDOW_CTRL(i), - MVCPU_WIN_CTRL_DATA(size, USB_TARGET_DRAM, - attrib, MVCPU_WIN_ENABLE)); + writel(MVCPU_WIN_CTRL_DATA(size, USB_TARGET_DRAM, + attrib, MVCPU_WIN_ENABLE), + MVUSB0_BASE + USB_WINDOW_CTRL(i)); else - wrl(USB_WINDOW_CTRL(i), MVCPU_WIN_DISABLE); + writel(MVCPU_WIN_DISABLE, + MVUSB0_BASE + USB_WINDOW_CTRL(i)); - wrl(USB_WINDOW_BASE(i), base); + writel(base, MVUSB0_BASE + USB_WINDOW_BASE(i)); } } #endif -- cgit v1.2.1 From 85a9ea314e36fc42656bc93c9e3d83d58b595d3e Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Wed, 22 Jul 2015 15:16:20 -0600 Subject: ci_udc: fix 64-bit compile warnings This is the same as f72d8320b605 "usb: ci_udc: fix warnings on 64-bit builds", but more. Signed-off-by: Stephen Warren --- drivers/usb/gadget/ci_udc.c | 19 ++++++++++--------- 1 file changed, 10 insertions(+), 9 deletions(-) (limited to 'drivers') diff --git a/drivers/usb/gadget/ci_udc.c b/drivers/usb/gadget/ci_udc.c index aadff42a9c..993be315a8 100644 --- a/drivers/usb/gadget/ci_udc.c +++ b/drivers/usb/gadget/ci_udc.c @@ -221,8 +221,8 @@ static void ci_flush_qtd(int ep_num) */ static void ci_flush_td(struct ept_queue_item *td) { - const uint32_t start = (uint32_t)td; - const uint32_t end = (uint32_t) td + ILIST_ENT_SZ; + const unsigned long start = (unsigned long)td; + const unsigned long end = (unsigned long)td + ILIST_ENT_SZ; flush_dcache_range(start, end); } @@ -249,8 +249,8 @@ static void ci_invalidate_qtd(int ep_num) */ static void ci_invalidate_td(struct ept_queue_item *td) { - const uint32_t start = (uint32_t)td; - const uint32_t end = start + ILIST_ENT_SZ; + const unsigned long start = (unsigned long)td; + const unsigned long end = start + ILIST_ENT_SZ; invalidate_dcache_range(start, end); } @@ -459,7 +459,7 @@ static void ci_ep_submit_next_request(struct ci_ep *ci_ep) if (len) { qtd = (struct ept_queue_item *) memalign(ILIST_ALIGN, ILIST_ENT_SZ); - dtd->next = (uint32_t)qtd; + dtd->next = (unsigned long)qtd; dtd = qtd; memset(dtd, 0, ILIST_ENT_SZ); } @@ -503,10 +503,10 @@ static void ci_ep_submit_next_request(struct ci_ep *ci_ep) ci_flush_qtd(num); - item = (struct ept_queue_item *)head->next; + item = (struct ept_queue_item *)(unsigned long)head->next; while (item->next != TERMINATE) { - ci_flush_td((struct ept_queue_item *)item->next); - item = (struct ept_queue_item *)item->next; + ci_flush_td((struct ept_queue_item *)(unsigned long)item->next); + item = (struct ept_queue_item *)(unsigned long)item->next; } DBG("ept%d %s queue len %x, req %p, buffer %p\n", @@ -594,7 +594,8 @@ static void handle_ep_complete(struct ci_ep *ci_ep) printf("EP%d/%s FAIL info=%x pg0=%x\n", num, in ? "in" : "out", item->info, item->page0); if (j != ci_req->dtd_count - 1) - next_td = (struct ept_queue_item *)item->next; + next_td = (struct ept_queue_item *)(unsigned long) + item->next; if (j != 0) free(item); } -- cgit v1.2.1 From 58d6d139c3e7bb923029e7ba18bfec7f420ead0f Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Fri, 24 Jul 2015 10:14:21 -0500 Subject: usb: ci_udc: fix request allocation when endpoints are disabled The ci_udc driver request allocation assumes that the endpoint descriptor pointer is set to retrieve the endpoint number, but that is only true when the endpoint is enabled. This results in a NULL ptr dereference which for me happens to return 0 value. This causes the EP0 request struct to be returned for other endpoints. Some gadget drivers like fastboot and USB MS work fine, but ethernet does not. Really, the ci_udc driver is the oddball here doing this EP0 special case handling Stephen added. All the other drivers alloc/free functions are pretty much the same with the only variation being the size of the private struct. This could all be consolidated to a common function. Signed-off-by: Rob Herring Cc: Marek Vasut Acked-by: Stephen Warren --- drivers/usb/gadget/ci_udc.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) (limited to 'drivers') diff --git a/drivers/usb/gadget/ci_udc.c b/drivers/usb/gadget/ci_udc.c index 993be315a8..3e8eb8799f 100644 --- a/drivers/usb/gadget/ci_udc.c +++ b/drivers/usb/gadget/ci_udc.c @@ -258,10 +258,12 @@ static struct usb_request * ci_ep_alloc_request(struct usb_ep *ep, unsigned int gfp_flags) { struct ci_ep *ci_ep = container_of(ep, struct ci_ep, ep); - int num; + int num = -1; struct ci_req *ci_req; - num = ci_ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK; + if (ci_ep->desc) + num = ci_ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK; + if (num == 0 && controller.ep0_req) return &controller.ep0_req->req; @@ -281,9 +283,11 @@ static void ci_ep_free_request(struct usb_ep *ep, struct usb_request *req) { struct ci_ep *ci_ep = container_of(ep, struct ci_ep, ep); struct ci_req *ci_req = container_of(req, struct ci_req, req); - int num; + int num = -1; + + if (ci_ep->desc) + num = ci_ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK; - num = ci_ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK; if (num == 0) { if (!controller.ep0_req) return; -- cgit v1.2.1