From 3a8ce9af6fcb5744a7851b4440c07688acc40844 Mon Sep 17 00:00:00 2001 From: Grant Likely Date: Tue, 20 Feb 2007 09:05:23 +0100 Subject: [PATCH 6_9] Move common_cmd_ace.c to drivers_systemace.c The code in this file is not a command; it is a device driver. Put it in the correct place. There are zero functional changes in this patch, it only moves the file. Signed-off-by: Grant Likely --- drivers/Makefile | 2 +- drivers/systemace.c | 264 ++++++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 265 insertions(+), 1 deletion(-) create mode 100644 drivers/systemace.c (limited to 'drivers') diff --git a/drivers/Makefile b/drivers/Makefile index 5a369df2c4..fffc22a5e1 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -44,7 +44,7 @@ COBJS = 3c589.o 5701rls.o ali512x.o atmel_usart.o \ serial.o serial_max3100.o \ serial_pl010.o serial_pl011.o serial_xuartlite.o \ sl811_usb.o sm501.o smc91111.o smiLynxEM.o \ - status_led.o sym53c8xx.o ahci.o \ + status_led.o sym53c8xx.o systemace.o ahci.o \ ti_pci1410a.o tigon3.o tsec.o \ usbdcore.o usbdcore_ep0.o usbdcore_omap1510.o usbtty.o \ videomodes.o w83c553f.o \ diff --git a/drivers/systemace.c b/drivers/systemace.c new file mode 100644 index 0000000000..8dd98d03fb --- /dev/null +++ b/drivers/systemace.c @@ -0,0 +1,264 @@ +/* + * Copyright (c) 2004 Picture Elements, Inc. + * Stephen Williams (XXXXXXXXXXXXXXXX) + * + * This source code is free software; you can redistribute it + * and/or modify it in source code form under the terms of the GNU + * General Public License as published by the Free Software + * Foundation; either version 2 of the License, or (at your option) + * any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA + */ + +/* + * The Xilinx SystemACE chip support is activated by defining + * CONFIG_SYSTEMACE to turn on support, and CFG_SYSTEMACE_BASE + * to set the base address of the device. This code currently + * assumes that the chip is connected via a byte-wide bus. + * + * The CONFIG_SYSTEMACE also adds to fat support the device class + * "ace" that allows the user to execute "fatls ace 0" and the + * like. This works by making the systemace_get_dev function + * available to cmd_fat.c:get_dev and filling in a block device + * description that has all the bits needed for FAT support to + * read sectors. + * + * According to Xilinx technical support, before accessing the + * SystemACE CF you need to set the following control bits: + * FORCECFGMODE : 1 + * CFGMODE : 0 + * CFGSTART : 0 + */ + +#include +#include +#include +#include +#include + +#ifdef CONFIG_SYSTEMACE + +/* + * The ace_readw and writew functions read/write 16bit words, but the + * offset value is the BYTE offset as most used in the Xilinx + * datasheet for the SystemACE chip. The CFG_SYSTEMACE_BASE is defined + * to be the base address for the chip, usually in the local + * peripheral bus. + */ +static unsigned ace_readw(unsigned offset) +{ +#if (CFG_SYSTEMACE_WIDTH == 8) + u16 temp; + +#if !defined(__BIG_ENDIAN) + temp = ((u16) readb(CFG_SYSTEMACE_BASE + offset) << 8); + temp |= (u16) readb(CFG_SYSTEMACE_BASE + offset + 1); +#else + temp = (u16) readb(CFG_SYSTEMACE_BASE + offset); + temp |= ((u16) readb(CFG_SYSTEMACE_BASE + offset + 1) << 8); +#endif + return temp; +#else + return readw(CFG_SYSTEMACE_BASE + offset); +#endif +} + +static void ace_writew(unsigned val, unsigned offset) +{ +#if (CFG_SYSTEMACE_WIDTH == 8) +#if !defined(__BIG_ENDIAN) + writeb((u8) (val >> 8), CFG_SYSTEMACE_BASE + offset); + writeb((u8) val, CFG_SYSTEMACE_BASE + offset + 1); +#else + writeb((u8) val, CFG_SYSTEMACE_BASE + offset); + writeb((u8) (val >> 8), CFG_SYSTEMACE_BASE + offset + 1); +#endif +#else + writew(val, CFG_SYSTEMACE_BASE + offset); +#endif +} + +/* */ + +static unsigned long systemace_read(int dev, unsigned long start, + unsigned long blkcnt, + unsigned long *buffer); + +static block_dev_desc_t systemace_dev = { 0 }; + +static int get_cf_lock(void) +{ + int retry = 10; + + /* CONTROLREG = LOCKREG */ + unsigned val = ace_readw(0x18); + val |= 0x0002; + ace_writew((val & 0xffff), 0x18); + + /* Wait for MPULOCK in STATUSREG[15:0] */ + while (!(ace_readw(0x04) & 0x0002)) { + + if (retry < 0) + return -1; + + udelay(100000); + retry -= 1; + } + + return 0; +} + +static void release_cf_lock(void) +{ + unsigned val = ace_readw(0x18); + val &= ~(0x0002); + ace_writew((val & 0xffff), 0x18); +} + +block_dev_desc_t *systemace_get_dev(int dev) +{ + /* The first time through this, the systemace_dev object is + not yet initialized. In that case, fill it in. */ + if (systemace_dev.blksz == 0) { + systemace_dev.if_type = IF_TYPE_UNKNOWN; + systemace_dev.dev = 0; + systemace_dev.part_type = PART_TYPE_UNKNOWN; + systemace_dev.type = DEV_TYPE_HARDDISK; + systemace_dev.blksz = 512; + systemace_dev.removable = 1; + systemace_dev.block_read = systemace_read; + + init_part(&systemace_dev); + + } + + return &systemace_dev; +} + +/* + * This function is called (by dereferencing the block_read pointer in + * the dev_desc) to read blocks of data. The return value is the + * number of blocks read. A zero return indicates an error. + */ +static unsigned long systemace_read(int dev, unsigned long start, + unsigned long blkcnt, unsigned long *buffer) +{ + int retry; + unsigned blk_countdown; + unsigned char *dp = (unsigned char *)buffer; + unsigned val; + + if (get_cf_lock() < 0) { + unsigned status = ace_readw(0x04); + + /* If CFDETECT is false, card is missing. */ + if (!(status & 0x0010)) { + printf("** CompactFlash card not present. **\n"); + return 0; + } + + printf("**** ACE locked away from me (STATUSREG=%04x)\n", + status); + return 0; + } +#ifdef DEBUG_SYSTEMACE + printf("... systemace read %lu sectors at %lu\n", blkcnt, start); +#endif + + retry = 2000; + for (;;) { + val = ace_readw(0x04); + + /* If CFDETECT is false, card is missing. */ + if (!(val & 0x0010)) { + printf("**** ACE CompactFlash not found.\n"); + release_cf_lock(); + return 0; + } + + /* If RDYFORCMD, then we are ready to go. */ + if (val & 0x0100) + break; + + if (retry < 0) { + printf("**** SystemACE not ready.\n"); + release_cf_lock(); + return 0; + } + + udelay(1000); + retry -= 1; + } + + /* The SystemACE can only transfer 256 sectors at a time, so + limit the current chunk of sectors. The blk_countdown + variable is the number of sectors left to transfer. */ + + blk_countdown = blkcnt; + while (blk_countdown > 0) { + unsigned trans = blk_countdown; + + if (trans > 256) + trans = 256; + +#ifdef DEBUG_SYSTEMACE + printf("... transfer %lu sector in a chunk\n", trans); +#endif + /* Write LBA block address */ + ace_writew((start >> 0) & 0xffff, 0x10); + ace_writew((start >> 16) & 0x00ff, 0x12); + + /* NOTE: in the Write Sector count below, a count of 0 + causes a transfer of 256, so &0xff gives the right + value for whatever transfer count we want. */ + + /* Write sector count | ReadMemCardData. */ + ace_writew((trans & 0xff) | 0x0300, 0x14); + + /* Reset the configruation controller */ + val = ace_readw(0x18); + val |= 0x0080; + ace_writew(val, 0x18); + + retry = trans * 16; + while (retry > 0) { + int idx; + + /* Wait for buffer to become ready. */ + while (!(ace_readw(0x04) & 0x0020)) { + udelay(100); + } + + /* Read 16 words of 2bytes from the sector buffer. */ + for (idx = 0; idx < 16; idx += 1) { + unsigned short val = ace_readw(0x40); + *dp++ = val & 0xff; + *dp++ = (val >> 8) & 0xff; + } + + retry -= 1; + } + + /* Clear the configruation controller reset */ + val = ace_readw(0x18); + val &= ~0x0080; + ace_writew(val, 0x18); + + /* Count the blocks we transfer this time. */ + start += trans; + blk_countdown -= trans; + } + + release_cf_lock(); + + return blkcnt; +} +#endif /* CONFIG_SYSTEMACE */ -- cgit v1.2.1 From f4852ebe6ca946a509667eb68be42026f837be76 Mon Sep 17 00:00:00 2001 From: Grant Likely Date: Tue, 20 Feb 2007 09:05:31 +0100 Subject: [PATCH 7_9] Replace ace_readw_ace_writeb functions with macros Register read/write does not need to be wrapped in a full function. The patch replaces them with macros. Signed-off-by: Grant Likely --- drivers/systemace.c | 36 ++++++++++-------------------------- 1 file changed, 10 insertions(+), 26 deletions(-) (limited to 'drivers') diff --git a/drivers/systemace.c b/drivers/systemace.c index 8dd98d03fb..3f329f9708 100644 --- a/drivers/systemace.c +++ b/drivers/systemace.c @@ -53,38 +53,22 @@ * to be the base address for the chip, usually in the local * peripheral bus. */ -static unsigned ace_readw(unsigned offset) -{ -#if (CFG_SYSTEMACE_WIDTH == 8) - u16 temp; - -#if !defined(__BIG_ENDIAN) - temp = ((u16) readb(CFG_SYSTEMACE_BASE + offset) << 8); - temp |= (u16) readb(CFG_SYSTEMACE_BASE + offset + 1); -#else - temp = (u16) readb(CFG_SYSTEMACE_BASE + offset); - temp |= ((u16) readb(CFG_SYSTEMACE_BASE + offset + 1) << 8); -#endif - return temp; -#else - return readw(CFG_SYSTEMACE_BASE + offset); -#endif -} - -static void ace_writew(unsigned val, unsigned offset) -{ #if (CFG_SYSTEMACE_WIDTH == 8) #if !defined(__BIG_ENDIAN) - writeb((u8) (val >> 8), CFG_SYSTEMACE_BASE + offset); - writeb((u8) val, CFG_SYSTEMACE_BASE + offset + 1); +#define ace_readw(off) ((readb(CFG_SYSTEMACE_BASE+off)<<8) | \ + (readb(CFG_SYSTEMACE_BASE+off+1))) +#define ace_write(val, off) {writeb(val>>8, CFG_SYSTEMACE_BASE+off); \ + writeb(val, CFG_SYSTEMACE_BASE+off+1);} #else - writeb((u8) val, CFG_SYSTEMACE_BASE + offset); - writeb((u8) (val >> 8), CFG_SYSTEMACE_BASE + offset + 1); +#define ace_readw(off) ((readb(CFG_SYSTEMACE_BASE+off)) | \ + (readb(CFG_SYSTEMACE_BASE+off+1)<<8)) +#define ace_write(val, off) {writeb(val, CFG_SYSTEMACE_BASE+off); \ + writeb(val>>8, CFG_SYSTEMACE_BASE+off+1);} #endif #else - writew(val, CFG_SYSTEMACE_BASE + offset); +#define ace_readw(off) (readw(CFG_SYSTEMACE_BASE+off)) +#define ace_writew(val, off) (writew(val, CFG_SYSTEMACE_BASE+off)) #endif -} /* */ -- cgit v1.2.1 From eb867a76238fb38e952c37871b16d0d7fd61c95f Mon Sep 17 00:00:00 2001 From: Grant Likely Date: Tue, 20 Feb 2007 09:05:45 +0100 Subject: [PATCH 9_9] Use "void *" not "unsigned long *" for block dev read_write buffer pointers Block device read/write is anonymous data; there is no need to use a typed pointer. void * is fine. Also add a hook for block_read functions Signed-off-by: Grant Likely --- drivers/systemace.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) (limited to 'drivers') diff --git a/drivers/systemace.c b/drivers/systemace.c index 3f329f9708..9502623a74 100644 --- a/drivers/systemace.c +++ b/drivers/systemace.c @@ -73,8 +73,7 @@ /* */ static unsigned long systemace_read(int dev, unsigned long start, - unsigned long blkcnt, - unsigned long *buffer); + unsigned long blkcnt, void *buffer); static block_dev_desc_t systemace_dev = { 0 }; @@ -133,11 +132,11 @@ block_dev_desc_t *systemace_get_dev(int dev) * number of blocks read. A zero return indicates an error. */ static unsigned long systemace_read(int dev, unsigned long start, - unsigned long blkcnt, unsigned long *buffer) + unsigned long blkcnt, void *buffer) { int retry; unsigned blk_countdown; - unsigned char *dp = (unsigned char *)buffer; + unsigned char *dp = buffer; unsigned val; if (get_cf_lock() < 0) { -- cgit v1.2.1 From d93e2212f962668b3dce091ff5edc33f2347fe37 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Tue, 20 Feb 2007 13:17:42 +0100 Subject: [PATCH] Update SystemACE driver for 16bit access This patch removes some problems when the Xilinx SystemACE driver is used with 16bit access on an big endian platform (like the AMCC Katmai). Signed-off-by: Stefan Roese --- drivers/systemace.c | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) (limited to 'drivers') diff --git a/drivers/systemace.c b/drivers/systemace.c index 9502623a74..3bd2ea999c 100644 --- a/drivers/systemace.c +++ b/drivers/systemace.c @@ -66,8 +66,8 @@ writeb(val>>8, CFG_SYSTEMACE_BASE+off+1);} #endif #else -#define ace_readw(off) (readw(CFG_SYSTEMACE_BASE+off)) -#define ace_writew(val, off) (writew(val, CFG_SYSTEMACE_BASE+off)) +#define ace_readw(off) (in16(CFG_SYSTEMACE_BASE+off)) +#define ace_writew(val, off) (out16(CFG_SYSTEMACE_BASE+off,val)) #endif /* */ @@ -119,6 +119,14 @@ block_dev_desc_t *systemace_get_dev(int dev) systemace_dev.removable = 1; systemace_dev.block_read = systemace_read; +#if (CFG_SYSTEMACE_WIDTH == 16) + /* + * By default the SystemACE comes up in 8-bit mode. + * Ensure that 16-bit mode gets enabled. + */ + ace_writew(0x0001, 0); +#endif + init_part(&systemace_dev); } @@ -197,7 +205,7 @@ static unsigned long systemace_read(int dev, unsigned long start, #endif /* Write LBA block address */ ace_writew((start >> 0) & 0xffff, 0x10); - ace_writew((start >> 16) & 0x00ff, 0x12); + ace_writew((start >> 16) & 0x0fff, 0x12); /* NOTE: in the Write Sector count below, a count of 0 causes a transfer of 256, so &0xff gives the right -- cgit v1.2.1 From da04995c7dc6772013a9a0dc5c767f190c402478 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Wed, 21 Feb 2007 13:44:34 +0100 Subject: [PATCH] Fix problem in systemace driver (ace_writew instead of ace_write) Signed-off-by: Stefan Roese --- drivers/systemace.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'drivers') diff --git a/drivers/systemace.c b/drivers/systemace.c index 3bd2ea999c..1d1be12520 100644 --- a/drivers/systemace.c +++ b/drivers/systemace.c @@ -57,13 +57,13 @@ #if !defined(__BIG_ENDIAN) #define ace_readw(off) ((readb(CFG_SYSTEMACE_BASE+off)<<8) | \ (readb(CFG_SYSTEMACE_BASE+off+1))) -#define ace_write(val, off) {writeb(val>>8, CFG_SYSTEMACE_BASE+off); \ - writeb(val, CFG_SYSTEMACE_BASE+off+1);} +#define ace_writew(val, off) {writeb(val>>8, CFG_SYSTEMACE_BASE+off); \ + writeb(val, CFG_SYSTEMACE_BASE+off+1);} #else #define ace_readw(off) ((readb(CFG_SYSTEMACE_BASE+off)) | \ (readb(CFG_SYSTEMACE_BASE+off+1)<<8)) -#define ace_write(val, off) {writeb(val, CFG_SYSTEMACE_BASE+off); \ - writeb(val>>8, CFG_SYSTEMACE_BASE+off+1);} +#define ace_writew(val, off) {writeb(val, CFG_SYSTEMACE_BASE+off); \ + writeb(val>>8, CFG_SYSTEMACE_BASE+off+1);} #endif #else #define ace_readw(off) (in16(CFG_SYSTEMACE_BASE+off)) -- cgit v1.2.1 From 3a197b2fe49d6fa03978e60af2394efe9c70b527 Mon Sep 17 00:00:00 2001 From: Haiying Wang Date: Wed, 21 Feb 2007 16:52:31 +0100 Subject: [PATCH v3] Add sync to ensure flash_write_cmd is fully finished Some CPUs like PPC, BLACKFIN need sync() to ensure cfi flash write command is fully finished. The sync() is defined in each CPU's io.h file. For those CPUs which do not need sync for now, a dummy sync() is defined in their io.h as well. Signed-off-by: Haiying Wang --- drivers/cfi_flash.c | 16 ++++------------ 1 file changed, 4 insertions(+), 12 deletions(-) (limited to 'drivers') diff --git a/drivers/cfi_flash.c b/drivers/cfi_flash.c index 696f9a47ad..5579a1efc1 100644 --- a/drivers/cfi_flash.c +++ b/drivers/cfi_flash.c @@ -36,6 +36,7 @@ #include #include +#include #include #include #ifdef CFG_FLASH_CFI_DRIVER @@ -931,27 +932,18 @@ static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr.cp, cmd, cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH); *addr.cp = cword.c; -#ifdef CONFIG_BLACKFIN - asm("ssync;"); -#endif break; case FLASH_CFI_16BIT: debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr.wp, cmd, cword.w, info->chipwidth << CFI_FLASH_SHIFT_WIDTH); *addr.wp = cword.w; -#ifdef CONFIG_BLACKFIN - asm("ssync;"); -#endif break; case FLASH_CFI_32BIT: debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr.lp, cmd, cword.l, info->chipwidth << CFI_FLASH_SHIFT_WIDTH); *addr.lp = cword.l; -#ifdef CONFIG_BLACKFIN - asm("ssync;"); -#endif break; case FLASH_CFI_64BIT: #ifdef DEBUG @@ -966,11 +958,11 @@ static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset } #endif *addr.llp = cword.ll; -#ifdef CONFIG_BLACKFIN - asm("ssync;"); -#endif break; } + + /* Ensure all the instructions are fully finished */ + sync(); } static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect) -- cgit v1.2.1 From 8274ec0bd01d2feb2c7f095eba78d42ea009798b Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Thu, 22 Feb 2007 07:40:23 +0100 Subject: [PATCH] Change systemace driver to select 8 & 16bit mode As suggested by Grant Likely this patch enables the Xilinx SystemACE driver to select 8 or 16bit mode upon startup. Signed-off-by: Stefan Roese --- drivers/systemace.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) (limited to 'drivers') diff --git a/drivers/systemace.c b/drivers/systemace.c index 1d1be12520..634aa9ba7d 100644 --- a/drivers/systemace.c +++ b/drivers/systemace.c @@ -119,13 +119,10 @@ block_dev_desc_t *systemace_get_dev(int dev) systemace_dev.removable = 1; systemace_dev.block_read = systemace_read; -#if (CFG_SYSTEMACE_WIDTH == 16) /* - * By default the SystemACE comes up in 8-bit mode. - * Ensure that 16-bit mode gets enabled. + * Ensure the correct bus mode (8/16 bits) gets enabled */ - ace_writew(0x0001, 0); -#endif + ace_writew(CFG_SYSTEMACE_WIDTH == 8 ? 0 : 0x0001, 0); init_part(&systemace_dev); -- cgit v1.2.1 From 743571145b37182757d4e688a77860b36ee77573 Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Tue, 27 Feb 2007 14:26:04 +0100 Subject: Minor code cleanup. --- drivers/systemace.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'drivers') diff --git a/drivers/systemace.c b/drivers/systemace.c index 634aa9ba7d..3848d9c59c 100644 --- a/drivers/systemace.c +++ b/drivers/systemace.c @@ -56,12 +56,12 @@ #if (CFG_SYSTEMACE_WIDTH == 8) #if !defined(__BIG_ENDIAN) #define ace_readw(off) ((readb(CFG_SYSTEMACE_BASE+off)<<8) | \ - (readb(CFG_SYSTEMACE_BASE+off+1))) + (readb(CFG_SYSTEMACE_BASE+off+1))) #define ace_writew(val, off) {writeb(val>>8, CFG_SYSTEMACE_BASE+off); \ writeb(val, CFG_SYSTEMACE_BASE+off+1);} #else #define ace_readw(off) ((readb(CFG_SYSTEMACE_BASE+off)) | \ - (readb(CFG_SYSTEMACE_BASE+off+1)<<8)) + (readb(CFG_SYSTEMACE_BASE+off+1)<<8)) #define ace_writew(val, off) {writeb(val, CFG_SYSTEMACE_BASE+off); \ writeb(val>>8, CFG_SYSTEMACE_BASE+off+1);} #endif @@ -73,7 +73,7 @@ /* */ static unsigned long systemace_read(int dev, unsigned long start, - unsigned long blkcnt, void *buffer); + unsigned long blkcnt, void *buffer); static block_dev_desc_t systemace_dev = { 0 }; @@ -137,7 +137,7 @@ block_dev_desc_t *systemace_get_dev(int dev) * number of blocks read. A zero return indicates an error. */ static unsigned long systemace_read(int dev, unsigned long start, - unsigned long blkcnt, void *buffer) + unsigned long blkcnt, void *buffer) { int retry; unsigned blk_countdown; -- cgit v1.2.1