From ebe4c1e6469444753bd2ba93fe63e6183cf2905c Mon Sep 17 00:00:00 2001 From: Claudiu Manoil Date: Wed, 12 Aug 2015 13:29:14 +0300 Subject: ls102xa: etsec: Use proper settings for BE BDs Replace the DMACTRL[LE] hack with recommended settings for ETSECDMAMCR to get the same end effect - obtaining big-endian buffer descriptors and frame data for eTSEC. The reset / default value for ETSECDMAMCR is preserved, excepting the BD and FR bits which are cleared to enable the BE mode in accordance with the H/W specifications. Fixes: 52d00a8 "ls102xa: etsec: Add etsec support for LS102xA" Signed-off-by: Claudiu Manoil Acked-by: Alison Wang Tested-by: Alison Wang Reviewed-by: York Sun --- drivers/net/tsec.c | 6 ------ 1 file changed, 6 deletions(-) (limited to 'drivers/net') diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c index 42d037471f..4bdc188c8f 100644 --- a/drivers/net/tsec.c +++ b/drivers/net/tsec.c @@ -271,9 +271,6 @@ void redundant_init(struct eth_device *dev) out_be32(®s->tstat, TSTAT_CLEAR_THALT); out_be32(®s->rstat, RSTAT_CLEAR_RHALT); clrbits_be32(®s->dmactrl, DMACTRL_GRS | DMACTRL_GTS); -#ifdef CONFIG_LS102XA - setbits_be32(®s->dmactrl, DMACTRL_LE); -#endif do { uint16_t status; @@ -370,9 +367,6 @@ static void startup_tsec(struct eth_device *dev) out_be32(®s->tstat, TSTAT_CLEAR_THALT); out_be32(®s->rstat, RSTAT_CLEAR_RHALT); clrbits_be32(®s->dmactrl, DMACTRL_GRS | DMACTRL_GTS); -#ifdef CONFIG_LS102XA - setbits_be32(®s->dmactrl, DMACTRL_LE); -#endif } /* This returns the status bits of the device. The return value -- cgit v1.2.1