From b129e8cfb07cdbbf8ce0f2a165edabeb2f7a1da7 Mon Sep 17 00:00:00 2001
From: Michal Simek <michal.simek@xilinx.com>
Date: Fri, 4 Oct 2013 10:48:59 +0200
Subject: fpga: zynqpl: Do not place bitstream below 1MB

DMA doesn't work when src is placed below 1MB limit.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
---
 drivers/fpga/zynqpl.c | 7 +++++++
 1 file changed, 7 insertions(+)

(limited to 'drivers/fpga')

diff --git a/drivers/fpga/zynqpl.c b/drivers/fpga/zynqpl.c
index f2f49b56a6..1effbadda9 100644
--- a/drivers/fpga/zynqpl.c
+++ b/drivers/fpga/zynqpl.c
@@ -10,6 +10,7 @@
 #include <common.h>
 #include <asm/io.h>
 #include <zynqpl.h>
+#include <asm/sizes.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/sys_proto.h>
 
@@ -177,6 +178,12 @@ int zynq_load(Xilinx_desc *desc, const void *buf, size_t bsize)
 		return FPGA_FAIL;
 	}
 
+	if ((u32)buf < SZ_1M) {
+		printf("%s: Bitstream has to be placed up to 1MB (%x)\n",
+		       __func__, (u32)buf);
+		return FPGA_FAIL;
+	}
+
 	if ((u32)buf != ALIGN((u32)buf, ARCH_DMA_MINALIGN)) {
 		u32 *new_buf = (u32 *)ALIGN((u32)buf, ARCH_DMA_MINALIGN);
 
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