From 4c52783b3d024e153c4972b97332e314bc3bdc46 Mon Sep 17 00:00:00 2001 From: roy zang Date: Thu, 2 Nov 2006 18:49:51 +0800 Subject: General code modification for mpc7448hpc2 board support. 1. Add 7447A and 7448 processor support. 2. Add the following flags. CFG_CONFIG_BUS_CLK : If the 74xx bus frequency can be configured dynamically (such as by switch on board), this flag should be set. CFG_EXCEPTION_AFTER_RELOCATE: If an exception occurs after the u-boot relocates to RAM, this flag should be set. CFG_SERIAL_HANG_IN_EXCEPTION: If the print out function will cause the system hang in exception, this flag should be set. There is a design issue for tsi108/109 pci configure read. When pci scan the slots, if there is no pci card, the tsi108/9 will cause a machine check exception for mpc7448 processor. Signed-off-by: Alexandre Bounine Signed-off-by: Roy Zang --- cpu/74xx_7xx/cpu.c | 54 ++++++++++++++++++++++++++++++++++++++++++++---- cpu/74xx_7xx/cpu_init.c | 2 ++ cpu/74xx_7xx/speed.c | 55 +++++++++++++++++++++++++++++++++++++++++++++---- 3 files changed, 103 insertions(+), 8 deletions(-) (limited to 'cpu') diff --git a/cpu/74xx_7xx/cpu.c b/cpu/74xx_7xx/cpu.c index ca45e17edb..c3aadca292 100644 --- a/cpu/74xx_7xx/cpu.c +++ b/cpu/74xx_7xx/cpu.c @@ -44,6 +44,10 @@ #include <74xx_7xx.h> #include +#if defined(CONFIG_OF_FLAT_TREE) +#include +#endif + #ifdef CONFIG_AMIGAONEG3SE #include "../board/MAI/AmigaOneG3SE/via686.h" #include "../board/MAI/AmigaOneG3SE/memio.h" @@ -101,6 +105,14 @@ get_cpu_type(void) type = CPU_7457; break; + case 0x8003: + type = CPU_7447A; + break; + + case 0x8004: + type = CPU_7448; + break; + default: break; } @@ -164,6 +176,14 @@ int checkcpu (void) str = "MPC7457"; break; + case CPU_7447A: + str = "MPC7447A"; + break; + + case CPU_7448: + str = "MPC7448"; + break; + default: printf("Unknown CPU -- PVR: 0x%08x\n", pvr); return -1; @@ -256,20 +276,19 @@ do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) /* * For the 7400 the TB clock runs at 1/4 the cpu bus speed. */ -#ifdef CONFIG_AMIGAONEG3SE +#if defined(CONFIG_AMIGAONEG3SE) || defined(CFG_CONFIG_BUS_CLK) unsigned long get_tbclk(void) { return (gd->bus_clk / 4); } -#else /* ! CONFIG_AMIGAONEG3SE */ +#else /* ! CONFIG_AMIGAONEG3SE and !CFG_CONFIG_BUS_CLK*/ unsigned long get_tbclk (void) { return CFG_BUS_HZ / 4; } -#endif /* CONFIG_AMIGAONEG3SE */ +#endif /* CONFIG_AMIGAONEG3SE or CFG_CONFIG_BUS_CLK*/ /* ------------------------------------------------------------------------- */ - #if defined(CONFIG_WATCHDOG) #if !defined(CONFIG_PCIPPC2) && !defined(CONFIG_BAB7xx) void @@ -281,3 +300,30 @@ watchdog_reset(void) #endif /* CONFIG_WATCHDOG */ /* ------------------------------------------------------------------------- */ + +#ifdef CONFIG_OF_FLAT_TREE +void +ft_cpu_setup(void *blob, bd_t *bd) +{ + u32 *p; + ulong clock; + int len; + + clock = bd->bi_busfreq; + + p = ft_get_prop(blob, "/cpus/" OF_CPU "/bus-frequency", &len); + if (p != NULL) + *p = cpu_to_be32(clock); + +#if defined(CONFIG_TSI108_ETH) + p = ft_get_prop(blob, "/" OF_TSI "/ethernet@6200/address", &len); + memcpy(p, bd->bi_enetaddr, 6); +#endif + +#if defined(CONFIG_HAS_ETH1) + p = ft_get_prop(blob, "/" OF_TSI "/ethernet@6600/address", &len); + memcpy(p, bd->bi_enet1addr, 6); +#endif +} +#endif +/* ------------------------------------------------------------------------- */ diff --git a/cpu/74xx_7xx/cpu_init.c b/cpu/74xx_7xx/cpu_init.c index 93f180f267..1dd1b2cd84 100644 --- a/cpu/74xx_7xx/cpu_init.c +++ b/cpu/74xx_7xx/cpu_init.c @@ -43,6 +43,8 @@ cpu_init_f (void) case CPU_7450: case CPU_7455: case CPU_7457: + case CPU_7447A: + case CPU_7448: /* enable the timebase bit in HID0 */ set_hid0(get_hid0() | 0x4000000); break; diff --git a/cpu/74xx_7xx/speed.c b/cpu/74xx_7xx/speed.c index 2dc510746d..d520794568 100644 --- a/cpu/74xx_7xx/speed.c +++ b/cpu/74xx_7xx/speed.c @@ -31,6 +31,8 @@ DECLARE_GLOBAL_DATA_PTR; +extern unsigned long get_board_bus_clk(void); + static const int hid1_multipliers_x_10[] = { 25, /* 0000 - 2.5x */ 75, /* 0001 - 7.5x */ @@ -50,6 +52,41 @@ static const int hid1_multipliers_x_10[] = { 0 /* 1111 - off */ }; +static const int hid1_7447A_multipliers_x_10[] = { + 115, /* 00000 - 11.5x */ + 170, /* 00001 - 17x */ + 75, /* 00010 - 7.5x */ + 150, /* 00011 - 15x */ + 70, /* 00100 - 7x */ + 180, /* 00101 - 18x */ + 10, /* 00110 - bypass */ + 200, /* 00111 - 20x */ + 20, /* 01000 - 2x */ + 210, /* 01001 - 21x */ + 65, /* 01010 - 6.5x */ + 130, /* 01011 - 13x */ + 85, /* 01100 - 8.5x */ + 240, /* 01101 - 13x */ + 95, /* 01110 - 9.5x */ + 90, /* 01111 - 9x */ + 30, /* 10000 - 3x */ + 105, /* 10001 - 10.5x */ + 55, /* 10010 - 5.5x */ + 110, /* 10011 - 11x */ + 40, /* 10100 - 4x */ + 100, /* 10101 - 10x */ + 50, /* 10110 - 5x */ + 120, /* 10111 - 12x */ + 80, /* 11000 - 8x */ + 140, /* 11001 - 14x */ + 60, /* 11010 - 6x */ + 160, /* 11011 - 16x */ + 135, /* 11100 - 13.5x */ + 280, /* 11101 - 28x */ + 0, /* 11110 - off */ + 125 /* 11111 - 12.5x */ +}; + static const int hid1_fx_multipliers_x_10[] = { 00, /* 0000 - off */ 00, /* 0001 - off */ @@ -89,8 +126,19 @@ int get_clocks (void) { ulong clock = 0; +#ifdef CFG_CONFIG_BUS_CLK + gd->bus_clk = get_board_bus_clk(); +#else + gd->bus_clk = CFG_BUS_CLK; +#endif + /* calculate the clock frequency based upon the CPU type */ switch (get_cpu_type()) { + case CPU_7447A: + case CPU_7448: + clock = (gd->bus_clk / 10) * hid1_7447A_multipliers_x_10[(get_hid1 () >> 12) & 0x1F]; + break; + case CPU_7455: case CPU_7457: /* @@ -98,12 +146,12 @@ int get_clocks (void) * Make sure division is done before multiplication to prevent 32-bit * arithmetic overflows which will cause a negative number */ - clock = (CFG_BUS_CLK / 10) * hid1_multipliers_x_10[(get_hid1 () >> 13) & 0xF]; + clock = (gd->bus_clk / 10) * hid1_multipliers_x_10[(get_hid1 () >> 13) & 0xF]; break; case CPU_750GX: case CPU_750FX: - clock = CFG_BUS_CLK * hid1_fx_multipliers_x_10[get_hid1 () >> 27] / 10; + clock = gd->bus_clk * hid1_fx_multipliers_x_10[get_hid1 () >> 27] / 10; break; case CPU_7450: @@ -120,7 +168,7 @@ int get_clocks (void) * Make sure division is done before multiplication to prevent 32-bit * arithmetic overflows which will cause a negative number */ - clock = (CFG_BUS_CLK / 10) * hid1_multipliers_x_10[get_hid1 () >> 28]; + clock = (gd->bus_clk / 10) * hid1_multipliers_x_10[get_hid1 () >> 28]; break; case CPU_UNKNOWN: @@ -130,7 +178,6 @@ int get_clocks (void) } gd->cpu_clk = clock; - gd->bus_clk = CFG_BUS_CLK; return (0); } -- cgit v1.2.1 From ee311214e0d216f904feea269599d0934bf71f23 Mon Sep 17 00:00:00 2001 From: roy zang Date: Fri, 1 Dec 2006 11:47:36 +0800 Subject: Clean up the code according to codestyle: (1) remove some C++ comments. (2) remove trailing white space. (3) remove trailing empty line. (4) Indentation by table. (5) remove {} in one line condition. (6) add space before '(' in function call. Remove some weird printf () output. Add necessary comments. Modified Makefile to support building in a separate directory. --- cpu/74xx_7xx/cpu.c | 16 +++++----- cpu/74xx_7xx/speed.c | 82 +++++++++++++++++++++++++++------------------------- 2 files changed, 51 insertions(+), 47 deletions(-) (limited to 'cpu') diff --git a/cpu/74xx_7xx/cpu.c b/cpu/74xx_7xx/cpu.c index c3aadca292..fc3b09217f 100644 --- a/cpu/74xx_7xx/cpu.c +++ b/cpu/74xx_7xx/cpu.c @@ -303,7 +303,7 @@ watchdog_reset(void) #ifdef CONFIG_OF_FLAT_TREE void -ft_cpu_setup(void *blob, bd_t *bd) +ft_cpu_setup (void *blob, bd_t *bd) { u32 *p; ulong clock; @@ -311,18 +311,18 @@ ft_cpu_setup(void *blob, bd_t *bd) clock = bd->bi_busfreq; - p = ft_get_prop(blob, "/cpus/" OF_CPU "/bus-frequency", &len); + p = ft_get_prop (blob, "/cpus/" OF_CPU "/bus-frequency", &len); if (p != NULL) - *p = cpu_to_be32(clock); + *p = cpu_to_be32 (clock); #if defined(CONFIG_TSI108_ETH) - p = ft_get_prop(blob, "/" OF_TSI "/ethernet@6200/address", &len); - memcpy(p, bd->bi_enetaddr, 6); + p = ft_get_prop (blob, "/" OF_TSI "/ethernet@6200/address", &len); + memcpy (p, bd->bi_enetaddr, 6); #endif - + #if defined(CONFIG_HAS_ETH1) - p = ft_get_prop(blob, "/" OF_TSI "/ethernet@6600/address", &len); - memcpy(p, bd->bi_enet1addr, 6); + p = ft_get_prop (blob, "/" OF_TSI "/ethernet@6600/address", &len); + memcpy (p, bd->bi_enet1addr, 6); #endif } #endif diff --git a/cpu/74xx_7xx/speed.c b/cpu/74xx_7xx/speed.c index d520794568..af4aca5c34 100644 --- a/cpu/74xx_7xx/speed.c +++ b/cpu/74xx_7xx/speed.c @@ -31,7 +31,7 @@ DECLARE_GLOBAL_DATA_PTR; -extern unsigned long get_board_bus_clk(void); +extern unsigned long get_board_bus_clk (void); static const int hid1_multipliers_x_10[] = { 25, /* 0000 - 2.5x */ @@ -53,38 +53,38 @@ static const int hid1_multipliers_x_10[] = { }; static const int hid1_7447A_multipliers_x_10[] = { - 115, /* 00000 - 11.5x */ - 170, /* 00001 - 17x */ - 75, /* 00010 - 7.5x */ - 150, /* 00011 - 15x */ - 70, /* 00100 - 7x */ - 180, /* 00101 - 18x */ - 10, /* 00110 - bypass */ - 200, /* 00111 - 20x */ - 20, /* 01000 - 2x */ - 210, /* 01001 - 21x */ - 65, /* 01010 - 6.5x */ - 130, /* 01011 - 13x */ - 85, /* 01100 - 8.5x */ - 240, /* 01101 - 13x */ - 95, /* 01110 - 9.5x */ - 90, /* 01111 - 9x */ - 30, /* 10000 - 3x */ - 105, /* 10001 - 10.5x */ - 55, /* 10010 - 5.5x */ - 110, /* 10011 - 11x */ - 40, /* 10100 - 4x */ - 100, /* 10101 - 10x */ - 50, /* 10110 - 5x */ - 120, /* 10111 - 12x */ - 80, /* 11000 - 8x */ - 140, /* 11001 - 14x */ - 60, /* 11010 - 6x */ - 160, /* 11011 - 16x */ - 135, /* 11100 - 13.5x */ - 280, /* 11101 - 28x */ - 0, /* 11110 - off */ - 125 /* 11111 - 12.5x */ + 115, /* 00000 - 11.5x */ + 170, /* 00001 - 17x */ + 75, /* 00010 - 7.5x */ + 150, /* 00011 - 15x */ + 70, /* 00100 - 7x */ + 180, /* 00101 - 18x */ + 10, /* 00110 - bypass */ + 200, /* 00111 - 20x */ + 20, /* 01000 - 2x */ + 210, /* 01001 - 21x */ + 65, /* 01010 - 6.5x */ + 130, /* 01011 - 13x */ + 85, /* 01100 - 8.5x */ + 240, /* 01101 - 13x */ + 95, /* 01110 - 9.5x */ + 90, /* 01111 - 9x */ + 30, /* 10000 - 3x */ + 105, /* 10001 - 10.5x */ + 55, /* 10010 - 5.5x */ + 110, /* 10011 - 11x */ + 40, /* 10100 - 4x */ + 100, /* 10101 - 10x */ + 50, /* 10110 - 5x */ + 120, /* 10111 - 12x */ + 80, /* 11000 - 8x */ + 140, /* 11001 - 14x */ + 60, /* 11010 - 6x */ + 160, /* 11011 - 16x */ + 135, /* 11100 - 13.5x */ + 280, /* 11101 - 28x */ + 0, /* 11110 - off */ + 125 /* 11111 - 12.5x */ }; static const int hid1_fx_multipliers_x_10[] = { @@ -127,16 +127,17 @@ int get_clocks (void) ulong clock = 0; #ifdef CFG_CONFIG_BUS_CLK - gd->bus_clk = get_board_bus_clk(); + gd->bus_clk = get_board_bus_clk (); /* bus clock is configurable */ #else - gd->bus_clk = CFG_BUS_CLK; + gd->bus_clk = CFG_BUS_CLK; /* bus clock is a fixed frequency */ #endif /* calculate the clock frequency based upon the CPU type */ switch (get_cpu_type()) { case CPU_7447A: case CPU_7448: - clock = (gd->bus_clk / 10) * hid1_7447A_multipliers_x_10[(get_hid1 () >> 12) & 0x1F]; + clock = (gd->bus_clk / 10) * + hid1_7447A_multipliers_x_10[(get_hid1 () >> 12) & 0x1F]; break; case CPU_7455: @@ -146,12 +147,14 @@ int get_clocks (void) * Make sure division is done before multiplication to prevent 32-bit * arithmetic overflows which will cause a negative number */ - clock = (gd->bus_clk / 10) * hid1_multipliers_x_10[(get_hid1 () >> 13) & 0xF]; + clock = (gd->bus_clk / 10) * + hid1_multipliers_x_10[(get_hid1 () >> 13) & 0xF]; break; case CPU_750GX: case CPU_750FX: - clock = gd->bus_clk * hid1_fx_multipliers_x_10[get_hid1 () >> 27] / 10; + clock = gd->bus_clk * + hid1_fx_multipliers_x_10[get_hid1 () >> 27] / 10; break; case CPU_7450: @@ -168,7 +171,8 @@ int get_clocks (void) * Make sure division is done before multiplication to prevent 32-bit * arithmetic overflows which will cause a negative number */ - clock = (gd->bus_clk / 10) * hid1_multipliers_x_10[get_hid1 () >> 28]; + clock = (gd->bus_clk / 10) * + hid1_multipliers_x_10[get_hid1 () >> 28]; break; case CPU_UNKNOWN: -- cgit v1.2.1 From c9c1eeed7dd193fa65fb194654132040d49d4d3a Mon Sep 17 00:00:00 2001 From: roy zang Date: Fri, 1 Dec 2006 19:01:25 +0800 Subject: Fix the exception occuring in RAM table search issue. The original search_one_table() function code can only processes the search for the exception occurring in FLASH/ROM, because the exception and fixup table usually locate in FLASH. If the exception address is also in FLASH, it will be OK. If the exception occurs in RAM, after the u-boot relocation, a relocation offset should be added. clean up the code in cpu/74xx_7xx/cpu.c Signed-off-by: Roy Zang --- cpu/74xx_7xx/cpu.c | 16 ++++++---------- 1 file changed, 6 insertions(+), 10 deletions(-) (limited to 'cpu') diff --git a/cpu/74xx_7xx/cpu.c b/cpu/74xx_7xx/cpu.c index ca45ca0457..84d5da3116 100644 --- a/cpu/74xx_7xx/cpu.c +++ b/cpu/74xx_7xx/cpu.c @@ -108,11 +108,11 @@ get_cpu_type(void) case 0x8003: type = CPU_7447A; break; - + case 0x8004: type = CPU_7448; break; - + default: break; } @@ -164,6 +164,10 @@ int checkcpu (void) str = "MPC7410"; break; + case CPU_7447A: + str = "MPC7447A"; + break; + case CPU_7448: str = "MPC7448"; break; @@ -180,14 +184,6 @@ int checkcpu (void) str = "MPC7457"; break; - case CPU_7447A: - str = "MPC7447A"; - break; - - case CPU_7448: - str = "MPC7448"; - break; - default: printf("Unknown CPU -- PVR: 0x%08x\n", pvr); return -1; -- cgit v1.2.1 From 4dbcd69e3e2776ea334590d5768e3692c5fae5c1 Mon Sep 17 00:00:00 2001 From: roy zang Date: Mon, 4 Dec 2006 17:54:21 +0800 Subject: Introduce PLL_CFG[0:4] table for processor 7448/7447A/7455/7457. The original multiplier table can not refect the real PLL clock behavior of these processors. Please refer to the hardware specification for detailed information of the corresponding processors. Signed-off-by: Roy Zang --- cpu/74xx_7xx/speed.c | 18 +++++++----------- 1 file changed, 7 insertions(+), 11 deletions(-) (limited to 'cpu') diff --git a/cpu/74xx_7xx/speed.c b/cpu/74xx_7xx/speed.c index af4aca5c34..d8c40cea01 100644 --- a/cpu/74xx_7xx/speed.c +++ b/cpu/74xx_7xx/speed.c @@ -52,7 +52,8 @@ static const int hid1_multipliers_x_10[] = { 0 /* 1111 - off */ }; -static const int hid1_7447A_multipliers_x_10[] = { +/* PLL_CFG[0:4] table for cpu 7448/7447A/7455/7457 */ +static const int hid1_74xx_multipliers_x_10[] = { 115, /* 00000 - 11.5x */ 170, /* 00001 - 17x */ 75, /* 00010 - 7.5x */ @@ -66,7 +67,7 @@ static const int hid1_7447A_multipliers_x_10[] = { 65, /* 01010 - 6.5x */ 130, /* 01011 - 13x */ 85, /* 01100 - 8.5x */ - 240, /* 01101 - 13x */ + 240, /* 01101 - 24x */ 95, /* 01110 - 9.5x */ 90, /* 01111 - 9x */ 30, /* 10000 - 3x */ @@ -126,29 +127,24 @@ int get_clocks (void) { ulong clock = 0; -#ifdef CFG_CONFIG_BUS_CLK - gd->bus_clk = get_board_bus_clk (); /* bus clock is configurable */ -#else +#ifdef CFG_BUS_CLK gd->bus_clk = CFG_BUS_CLK; /* bus clock is a fixed frequency */ +#else + gd->bus_clk = get_board_bus_clk (); /* bus clock is configurable */ #endif /* calculate the clock frequency based upon the CPU type */ switch (get_cpu_type()) { case CPU_7447A: case CPU_7448: - clock = (gd->bus_clk / 10) * - hid1_7447A_multipliers_x_10[(get_hid1 () >> 12) & 0x1F]; - break; - case CPU_7455: case CPU_7457: /* - * It is assumed that the PLL_EXT line is zero. * Make sure division is done before multiplication to prevent 32-bit * arithmetic overflows which will cause a negative number */ clock = (gd->bus_clk / 10) * - hid1_multipliers_x_10[(get_hid1 () >> 13) & 0xF]; + hid1_74xx_multipliers_x_10[(get_hid1 () >> 12) & 0x1F]; break; case CPU_750GX: -- cgit v1.2.1 From 647d3c3eed0da1d1505eecabe0b0fab96f956e68 Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Sun, 4 Mar 2007 01:36:05 +0100 Subject: Some code cleanup. --- cpu/74xx_7xx/cpu.c | 4 +-- cpu/ppc4xx/44x_spd_ddr2.c | 10 +++---- cpu/ppc4xx/start.S | 72 +++++++++++++++++++++++------------------------ 3 files changed, 43 insertions(+), 43 deletions(-) (limited to 'cpu') diff --git a/cpu/74xx_7xx/cpu.c b/cpu/74xx_7xx/cpu.c index 84d5da3116..9c8998b604 100644 --- a/cpu/74xx_7xx/cpu.c +++ b/cpu/74xx_7xx/cpu.c @@ -308,9 +308,9 @@ ft_cpu_setup (void *blob, bd_t *bd) u32 *p; ulong clock; int len; - + clock = bd->bi_busfreq; - + p = ft_get_prop (blob, "/cpus/" OF_CPU "/bus-frequency", &len); if (p != NULL) *p = cpu_to_be32 (clock); diff --git a/cpu/ppc4xx/44x_spd_ddr2.c b/cpu/ppc4xx/44x_spd_ddr2.c index 35b23152f3..da50985c4c 100644 --- a/cpu/ppc4xx/44x_spd_ddr2.c +++ b/cpu/ppc4xx/44x_spd_ddr2.c @@ -168,8 +168,8 @@ static void program_codt(unsigned long *dimm_populated, static void program_mode(unsigned long *dimm_populated, unsigned char *iic0_dimm_addr, unsigned long num_dimm_banks, - ddr_cas_id_t *selected_cas, - int *write_recovery); + ddr_cas_id_t *selected_cas, + int *write_recovery); static void program_tr(unsigned long *dimm_populated, unsigned char *iic0_dimm_addr, unsigned long num_dimm_banks); @@ -185,7 +185,7 @@ static void program_copt1(unsigned long *dimm_populated, static void program_initplr(unsigned long *dimm_populated, unsigned char *iic0_dimm_addr, unsigned long num_dimm_banks, - ddr_cas_id_t selected_cas, + ddr_cas_id_t selected_cas, int write_recovery); static unsigned long is_ecc_enabled(void); static void program_ecc(unsigned long *dimm_populated, @@ -1110,7 +1110,7 @@ static void program_codt(unsigned long *dimm_populated, modt3 = 0x00000000; } } - } else { + } else { codt |= SDRAM_CODT_DQS_2_5_V_DDR1; modt0 = 0x00000000; modt1 = 0x00000000; @@ -1149,7 +1149,7 @@ static void program_codt(unsigned long *dimm_populated, static void program_initplr(unsigned long *dimm_populated, unsigned char *iic0_dimm_addr, unsigned long num_dimm_banks, - ddr_cas_id_t selected_cas, + ddr_cas_id_t selected_cas, int write_recovery) { u32 cas = 0; diff --git a/cpu/ppc4xx/start.S b/cpu/ppc4xx/start.S index 24b30dfe71..3fa52bd75a 100644 --- a/cpu/ppc4xx/start.S +++ b/cpu/ppc4xx/start.S @@ -1858,11 +1858,11 @@ pll_wait: #endif /* CONFIG_405EP */ #if defined(CONFIG_440) -#define function_prolog(func_name) .text; \ +#define function_prolog(func_name) .text; \ .align 2; \ .globl func_name; \ func_name: -#define function_epilog(func_name) .type func_name,@function; \ +#define function_epilog(func_name) .type func_name,@function; \ .size func_name,.-func_name /*----------------------------------------------------------------------------+ @@ -1916,43 +1916,43 @@ pll_wait: /*----------------------------------------------------------------------------+ | dcbz_area. +----------------------------------------------------------------------------*/ - function_prolog(dcbz_area) - rlwinm. r5,r4,0,27,31 - rlwinm r5,r4,27,5,31 - beq ..d_ra2 - addi r5,r5,0x0001 -..d_ra2:mtctr r5 -..d_ag2:dcbz r0,r3 - addi r3,r3,32 - bdnz ..d_ag2 - sync - blr - function_epilog(dcbz_area) + function_prolog(dcbz_area) + rlwinm. r5,r4,0,27,31 + rlwinm r5,r4,27,5,31 + beq ..d_ra2 + addi r5,r5,0x0001 +..d_ra2:mtctr r5 +..d_ag2:dcbz r0,r3 + addi r3,r3,32 + bdnz ..d_ag2 + sync + blr + function_epilog(dcbz_area) /*----------------------------------------------------------------------------+ | dflush. Assume 32K at vector address is cachable. +----------------------------------------------------------------------------*/ - function_prolog(dflush) - mfmsr r9 - rlwinm r8,r9,0,15,13 - rlwinm r8,r8,0,17,15 - mtmsr r8 - addi r3,r0,0x0000 - mtspr dvlim,r3 - mfspr r3,ivpr - addi r4,r0,1024 - mtctr r4 + function_prolog(dflush) + mfmsr r9 + rlwinm r8,r9,0,15,13 + rlwinm r8,r8,0,17,15 + mtmsr r8 + addi r3,r0,0x0000 + mtspr dvlim,r3 + mfspr r3,ivpr + addi r4,r0,1024 + mtctr r4 ..dflush_loop: - lwz r6,0x0(r3) - addi r3,r3,32 - bdnz ..dflush_loop - addi r3,r3,-32 - mtctr r4 -..ag: dcbf r0,r3 - addi r3,r3,-32 - bdnz ..ag - sync - mtmsr r9 - blr - function_epilog(dflush) + lwz r6,0x0(r3) + addi r3,r3,32 + bdnz ..dflush_loop + addi r3,r3,-32 + mtctr r4 +..ag: dcbf r0,r3 + addi r3,r3,-32 + bdnz ..ag + sync + mtmsr r9 + blr + function_epilog(dflush) #endif /* CONFIG_440 */ -- cgit v1.2.1