From 281e00a3be453a169d854f824a460359d10f92bb Mon Sep 17 00:00:00 2001 From: wdenk Date: Sun, 1 Aug 2004 22:48:16 +0000 Subject: * Code cleanup * Patch by Sascha Hauer, 28 Jun: - add generic support for Motorola i.MX architecture - add support for mx1ads, mx1fs2 and scb9328 boards * Patches by Marc Leeman, 23 Jul 2004: - Add define for the PCI/Memory Buffer Configuration Register - corrected comments in cpu/mpc824x/cpu_init.c * Add support for multiple serial interfaces (for example to allow modem dial-in / dial-out) --- cpu/mpc824x/cpu_init.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'cpu/mpc824x/cpu_init.c') diff --git a/cpu/mpc824x/cpu_init.c b/cpu/mpc824x/cpu_init.c index 08f5c4ab13..d0c7a3bcab 100644 --- a/cpu/mpc824x/cpu_init.c +++ b/cpu/mpc824x/cpu_init.c @@ -108,7 +108,7 @@ cpu_init_f (void) CONFIG_READ_BYTE(PCMBCR,val); /* in order not to corrupt data which is being read over the PCI bus - * with the PPC as master, we need to reduce the number of PCMRBs to 1, + * with the PPC as slave, we need to reduce the number of PCMRBs to 1, * 4.11 in the processor user manual * */ @@ -117,6 +117,10 @@ cpu_init_f (void) #else CONFIG_WRITE_BYTE(PCMBCR,(val|0x80)); /* 2 PCMRBs */ CONFIG_WRITE_BYTE(PCMBCR,(val|0x40)); /* 3 PCMRBs */ + /* default, 4 PCMRBs are used, so don't change the + * register is this is _really_ what you want: data + * corruption with no performance gain + */ #endif #endif -- cgit v1.2.1