From ec2b74ffd36f02c6123725e7c2533dd2deaf4b64 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Thu, 17 Jan 2008 16:48:33 -0600 Subject: 85xx: Added support for multicore boot mechanism Added the cpu command that provides a generic mechanism to get status, reset, and release secondary cores in multicore processors. Added support for using the ePAPR defined spin-table mechanism on 85xx. Signed-off-by: Kumar Gala --- common/Makefile | 1 + common/cmd_mp.c | 96 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 97 insertions(+) create mode 100644 common/cmd_mp.c (limited to 'common') diff --git a/common/Makefile b/common/Makefile index 1c81fcfe4f..382dd01800 100644 --- a/common/Makefile +++ b/common/Makefile @@ -140,6 +140,7 @@ COBJS-y += crc16.o COBJS-y += xyzModem.o COBJS-y += cmd_mac.o COBJS-$(CONFIG_CMD_MFSL) += cmd_mfsl.o +COBJS-$(CONFIG_MP) += cmd_mp.o COBJS := $(COBJS-y) SRCS := $(AOBJS:.o=.S) $(COBJS:.o=.c) diff --git a/common/cmd_mp.c b/common/cmd_mp.c new file mode 100644 index 0000000000..d96e6a302d --- /dev/null +++ b/common/cmd_mp.c @@ -0,0 +1,96 @@ +/* + * Copyright 2008 Freescale Semiconductor, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include + +int +cpu_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + unsigned long cpuid, val = 0; + + if (argc < 3) { + printf ("Usage:\n%s\n", cmdtp->usage); + return 1; + } + + cpuid = simple_strtoul(argv[1], NULL, 10); + if (cpuid >= CONFIG_NR_CPUS) { + printf ("Core num: %d is out of range[0..%d]\n", + cpuid, CONFIG_NR_CPUS - 1); + return 1; + } + + + if (argc == 3) { + if (strncmp(argv[2], "reset", 5) == 0) { + cpu_reset(cpuid); + } else if (strncmp(argv[2], "status", 6) == 0) { + cpu_status(cpuid); + } else { + printf ("Usage:\n%s\n", cmdtp->usage); + return 1; + } + return 0; + } + + /* 4 or greater, make sure its release */ + if (strncmp(argv[2], "release", 7) != 0) { + printf ("Usage:\n%s\n", cmdtp->usage); + return 1; + } + + val = simple_strtoul(argv[3], NULL, 16); + + if (cpu_release(cpuid, val, argc - 4, argv + 4)) { + printf ("Usage:\n%s\n", cmdtp->usage); + return 1; + } + + return 0; +} + +#ifdef CONFIG_PPC +#define CPU_ARCH_HELP \ + " [args] : \n" \ + " pir - processor id (if writeable)\n" \ + " r3 - value for gpr 3\n" \ + " r4 - value for gpr 4\n" \ + " r6 - value for gpr 6\n" \ + " r7 - value for gpr 7\n" \ + "\n" \ + " Use '-' for any arg if you want the default value.\n" \ + " Default for r3, r4, r7 is 0, r6 is 0x65504150\n" \ + "\n" \ + " When cpu is released r5 = 0 per the ePAPR spec.\n" +#endif + +U_BOOT_CMD( + cpu, CFG_MAXARGS, 1, cpu_cmd, + "cpu - Multiprocessor CPU boot manipulation and release\n", + " reset - Reset cpu \n" + "cpu status - Status of cpu \n" + "cpu release [args] - Release cpu at with [args]\n" +#ifdef CPU_ARCH_HELP + CPU_ARCH_HELP +#endif + ); -- cgit v1.2.1 From 79679d80021ab095e639e250ca472fe526da02e2 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Wed, 26 Mar 2008 08:34:25 -0500 Subject: 85xx: Update multicore boot mechanism to ePAPR v0.81 spec The following changes are needed to be inline with ePAPR v0.81: * r4, r5 and now always set to 0 on boot release * r7 is used to pass the size of the initial map area (IMA) * EPAPR_MAGIC value changed for book-e processors * changes in the spin table layout * spin table supports a 64-bit physical release address Signed-off-by: Kumar Gala --- common/cmd_mp.c | 15 ++++++--------- 1 file changed, 6 insertions(+), 9 deletions(-) (limited to 'common') diff --git a/common/cmd_mp.c b/common/cmd_mp.c index d96e6a302d..26a57c5e96 100644 --- a/common/cmd_mp.c +++ b/common/cmd_mp.c @@ -26,7 +26,7 @@ int cpu_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { - unsigned long cpuid, val = 0; + unsigned long cpuid; if (argc < 3) { printf ("Usage:\n%s\n", cmdtp->usage); @@ -59,9 +59,7 @@ cpu_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) return 1; } - val = simple_strtoul(argv[3], NULL, 16); - - if (cpu_release(cpuid, val, argc - 4, argv + 4)) { + if (cpu_release(cpuid, argc - 3, argv + 3)) { printf ("Usage:\n%s\n", cmdtp->usage); return 1; } @@ -71,17 +69,16 @@ cpu_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) #ifdef CONFIG_PPC #define CPU_ARCH_HELP \ - " [args] : \n" \ + " [args] : \n" \ " pir - processor id (if writeable)\n" \ " r3 - value for gpr 3\n" \ - " r4 - value for gpr 4\n" \ " r6 - value for gpr 6\n" \ - " r7 - value for gpr 7\n" \ "\n" \ " Use '-' for any arg if you want the default value.\n" \ - " Default for r3, r4, r7 is 0, r6 is 0x65504150\n" \ + " Default for r3 is and r6 is 0\n" \ "\n" \ - " When cpu is released r5 = 0 per the ePAPR spec.\n" + " When cpu is released r4 and r5 = 0.\n" \ + " r7 will contain the size of the initial mapped area\n" #endif U_BOOT_CMD( -- cgit v1.2.1