From e0ac62d798ce60ec5d43125d4786e58b0d881836 Mon Sep 17 00:00:00 2001 From: wdenk Date: Sun, 17 Aug 2003 18:55:18 +0000 Subject: * Make Ethernet autonegotiation on INCA-IP work for all clock rates; allow selection of clock frequency as "make" target * Implement memory autosizing code for IceCube boards * Configure network port on INCA-IP for autonegotiation * Fix overflow problem in network timeout code * Patch by Richard Woodruff, 8 Aug 2003: Allow crc32 to be used at address 0x000 (crc32_no_comp, too). --- board/icecube/icecube.c | 118 ++++++++++++++++++++++++++++++++++-------------- board/tqm8xx/flash.c | 9 ++-- 2 files changed, 88 insertions(+), 39 deletions(-) (limited to 'board') diff --git a/board/icecube/icecube.c b/board/icecube/icecube.c index 45c871e3f7..396ad2a4f2 100644 --- a/board/icecube/icecube.c +++ b/board/icecube/icecube.c @@ -25,35 +25,84 @@ #include #include -long int initdram (int board_type) +static long int dram_size(long int *base, long int maxsize) { -#ifndef CFG_RAMBOOT - /* configure SDRAM start/end */ -#if defined(CONFIG_MPC5200) - *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x00000018;/* 32M at 0x0 */ - *(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x02000000;/* disabled */ + volatile long int *addr; + ulong cnt, val; + ulong save[32]; /* to make test non-destructive */ + unsigned char i = 0; - /* setup config registers */ - *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = 0xc2233a00; - *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = 0x88b70004; + for (cnt = (maxsize / sizeof (long)) >> 1; cnt > 0; cnt >>= 1) { + addr = base + cnt; /* pointer arith! */ + + save[i++] = *addr; + *addr = ~cnt; + } + + /* write 0 to base address */ + addr = base; + save[i] = *addr; + *addr = 0; + + /* check at base address */ + if ((val = *addr) != 0) { + *addr = save[i]; + return (0); + } + + for (cnt = 1; cnt < maxsize / sizeof (long); cnt <<= 1) { + addr = base + cnt; /* pointer arith! */ + + val = *addr; + *addr = save[--i]; + + if (val != (~cnt)) { + return (cnt * sizeof (long)); + } + } + return (maxsize); +} + +static void sdram_start (int hi_addr) +{ + long hi_addr_bit = hi_addr ? 0x01000000 : 0; /* unlock mode register */ - *(vu_long *)MPC5XXX_SDRAM_CTRL = 0xd04f0000; + *(vu_long *)MPC5XXX_SDRAM_CTRL = 0xd04f0000 | hi_addr_bit; /* precharge all banks */ - *(vu_long *)MPC5XXX_SDRAM_CTRL = 0xd04f0002; + *(vu_long *)MPC5XXX_SDRAM_CTRL = 0xd04f0002 | hi_addr_bit; /* set mode register */ +#if defined(CONFIG_MPC5200) *(vu_long *)MPC5XXX_SDRAM_MODE = 0x408d0000; +#elif defined(CONFIG_MGT5100) + *(vu_long *)MPC5XXX_SDRAM_MODE = 0x008d0000; +#endif /* precharge all banks */ - *(vu_long *)MPC5XXX_SDRAM_CTRL = 0xd04f0002; + *(vu_long *)MPC5XXX_SDRAM_CTRL = 0xd04f0002 | hi_addr_bit; /* auto refresh */ - *(vu_long *)MPC5XXX_SDRAM_CTRL = 0xd04f0004; + *(vu_long *)MPC5XXX_SDRAM_CTRL = 0xd04f0004 | hi_addr_bit; /* set mode register */ *(vu_long *)MPC5XXX_SDRAM_MODE = 0x008d0000; /* normal operation */ - *(vu_long *)MPC5XXX_SDRAM_CTRL = 0x504f0000; + *(vu_long *)MPC5XXX_SDRAM_CTRL = 0x504f0000 | hi_addr_bit; +} + +long int initdram (int board_type) +{ + ulong test1, test2, dramsize = 0; +#ifndef CFG_RAMBOOT + /* configure SDRAM start/end */ +#if defined(CONFIG_MPC5200) + *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001e;/* 2G at 0x0 */ + *(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x80000000;/* disabled */ + + /* setup config registers */ + *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = 0xc2233a00; + *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = 0x88b70004; + #elif defined(CONFIG_MGT5100) *(vu_long *)MPC5XXX_SDRAM_START = 0x00000000; - *(vu_long *)MPC5XXX_SDRAM_STOP = 0x000007ff;/* 64M */ + *(vu_long *)MPC5XXX_SDRAM_STOP = 0x0000ffff;/* 2G */ *(vu_long *)MPC5XXX_ADDECR |= (1 << 22); /* Enable SDRAM */ /* setup config registers */ @@ -62,33 +111,32 @@ long int initdram (int board_type) /* address select register */ *(vu_long *)MPC5XXX_SDRAM_XLBSEL = 0x03000000; - - /* unlock mode register */ - *(vu_long *)MPC5XXX_SDRAM_CTRL = 0xd14f0000; - /* precharge all banks */ - *(vu_long *)MPC5XXX_SDRAM_CTRL = 0xd14f0002; - /* set mode register */ - *(vu_long *)MPC5XXX_SDRAM_MODE = 0x008d0000; - /* precharge all banks */ - *(vu_long *)MPC5XXX_SDRAM_CTRL = 0xd14f0002; - /* auto refresh */ - *(vu_long *)MPC5XXX_SDRAM_CTRL = 0xd14f0004; - /* set mode register */ - *(vu_long *)MPC5XXX_SDRAM_MODE = 0x008d0000; - /* normal operation */ - *(vu_long *)MPC5XXX_SDRAM_CTRL = 0x514f0000; #endif + sdram_start(0); + test1 = dram_size((ulong *)CFG_SDRAM_BASE, 0x80000000); + sdram_start(1); + test2 = dram_size((ulong *)CFG_SDRAM_BASE, 0x80000000); + if (test1 > test2) { + sdram_start(0); + dramsize = test1; + } else { + dramsize = test2; + } +#if defined(CONFIG_MPC5200) + *(vu_long *)MPC5XXX_SDRAM_CS0CFG = + (0x13 + __builtin_ffs(dramsize >> 20) - 1); + *(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize; /* disabled */ +#elif defined(CONFIG_MGT5100) + *(vu_long *)MPC5XXX_SDRAM_STOP = ((dramsize - 1) >> 15); +#endif + #else #ifdef CONFIG_MGT5100 *(vu_long *)MPC5XXX_ADDECR |= (1 << 22); /* Enable SDRAM */ #endif #endif /* return total ram size */ -#if defined(CONFIG_MGT5100) - return (64 * 1024 * 1024); -#elif defined(CONFIG_MPC5200) - return (32 * 1024 * 1024); -#endif + return dramsize; } int checkboard (void) diff --git a/board/tqm8xx/flash.c b/board/tqm8xx/flash.c index d949c2eb6b..a974e2338a 100644 --- a/board/tqm8xx/flash.c +++ b/board/tqm8xx/flash.c @@ -116,14 +116,15 @@ unsigned long flash_init (void) #ifdef CFG_ENV_IS_IN_FLASH /* ENV protection ON by default */ - debug ("Protect %senvironment: %08lx ... %08lx\n", # ifdef CFG_ENV_ADDR_REDUND - "primary ", + debug ("Protect primary environment: %08lx ... %08lx\n", + (ulong)CFG_ENV_ADDR, + (ulong)CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1); # else - "", -# endif + debug ("Protect environment: %08lx ... %08lx\n", (ulong)CFG_ENV_ADDR, (ulong)CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1); +# endif flash_protect(FLAG_PROTECT_SET, CFG_ENV_ADDR, -- cgit v1.2.1