From 69a3b811411d7f7d58c1ad587412451e7d4ed412 Mon Sep 17 00:00:00 2001 From: "Khoronzhuk, Ivan" Date: Fri, 17 Oct 2014 21:01:16 +0300 Subject: ARM: keystone: clock: add support for K2E SoCs For K2E and K2L SoCs clock output from PASS PLL has to be enabled after NETCP domain and PA module are enabled. So create new function for that and call it after PA module is enabled. Signed-off-by: Ivan Khoronzhuk --- board/ti/ks2_evm/board.c | 1 + 1 file changed, 1 insertion(+) (limited to 'board') diff --git a/board/ti/ks2_evm/board.c b/board/ti/ks2_evm/board.c index 279ec8e67b..8991786063 100644 --- a/board/ti/ks2_evm/board.c +++ b/board/ti/ks2_evm/board.c @@ -77,6 +77,7 @@ int board_eth_init(bd_t *bis) return -1; if (psc_enable_module(KS2_LPSC_CRYPTO)) return -1; + pass_pll_pa_clk_enable(); port_num = get_num_eth_ports(); -- cgit v1.2.1