From ab4860b255239dbaecccdd002c8d11f4ef54dd75 Mon Sep 17 00:00:00 2001 From: TsiChung Liew Date: Wed, 18 Jun 2008 19:27:23 -0500 Subject: ColdFire: Fix power up issue for MCF5235 Signed-off-by: TsiChung Liew --- board/freescale/m5235evb/m5235evb.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'board') diff --git a/board/freescale/m5235evb/m5235evb.c b/board/freescale/m5235evb/m5235evb.c index c2c8fe8590..bd8a4e5e68 100644 --- a/board/freescale/m5235evb/m5235evb.c +++ b/board/freescale/m5235evb/m5235evb.c @@ -75,9 +75,11 @@ phys_size_t initdram(int board_type) sdram->dacr0 = SDRAMC_DARCn_BA(CFG_SDRAM_BASE) | SDRAMC_DARCn_CASL_C1 | SDRAMC_DARCn_CBM_CMD20 | SDRAMC_DARCn_PS_32; + asm("nop"); /* Initialize DMR0 */ sdram->dmr0 = ((dramsize - 1) & 0xFFFC0000) | SDRAMC_DMRn_V; + asm("nop"); /* Set IP (bit 3) in DACR */ sdram->dacr0 |= SDRAMC_DARCn_IP; @@ -100,6 +102,7 @@ phys_size_t initdram(int board_type) /* Finish the configuration by issuing the MRS. */ sdram->dacr0 |= SDRAMC_DARCn_IMRS; + asm("nop"); /* Write to the SDRAM Mode Register */ *(u32 *) (CFG_SDRAM_BASE + 0x400) = 0xA5A59696; -- cgit v1.2.1 From c37ea031175b807c54e6bad9b270e9bede6c0078 Mon Sep 17 00:00:00 2001 From: TsiChung Liew Date: Wed, 9 Jul 2008 15:14:25 -0500 Subject: Fix compile error caused by incorrect function return type Rename int mii_init(void) to void mii_init(void) Signed-off-by: TsiChung Liew --- board/BuS/EB+MCF-EV123/mii.c | 2 +- board/cobra5272/mii.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'board') diff --git a/board/BuS/EB+MCF-EV123/mii.c b/board/BuS/EB+MCF-EV123/mii.c index 3ea20a6109..8ae2ec69ce 100644 --- a/board/BuS/EB+MCF-EV123/mii.c +++ b/board/BuS/EB+MCF-EV123/mii.c @@ -201,7 +201,7 @@ int mii_discover_phy(struct eth_device *dev) } #endif /* CFG_DISCOVER_PHY */ -int mii_init(void) __attribute__((weak,alias("__mii_init"))); +void mii_init(void) __attribute__((weak,alias("__mii_init"))); void __mii_init(void) { diff --git a/board/cobra5272/mii.c b/board/cobra5272/mii.c index d0a4a39f99..b30ba803f9 100644 --- a/board/cobra5272/mii.c +++ b/board/cobra5272/mii.c @@ -200,7 +200,7 @@ int mii_discover_phy(struct eth_device *dev) } #endif /* CFG_DISCOVER_PHY */ -int mii_init(void) __attribute__((weak,alias("__mii_init"))); +void mii_init(void) __attribute__((weak,alias("__mii_init"))); void __mii_init(void) { -- cgit v1.2.1 From 184f1b404a90eef8b425c0e7b3018d59ef9982c8 Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Fri, 11 Jul 2008 22:55:31 +0200 Subject: Fixed some out-of-tree build issues Signed-off-by: Wolfgang Denk --- board/freescale/m5275evb/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'board') diff --git a/board/freescale/m5275evb/Makefile b/board/freescale/m5275evb/Makefile index ef0b19ed2c..f337a7563c 100644 --- a/board/freescale/m5275evb/Makefile +++ b/board/freescale/m5275evb/Makefile @@ -31,7 +31,7 @@ SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) SOBJS := $(addprefix $(obj),$(SOBJS)) -$(LIB): .depend $(OBJS) +$(LIB): $(obj).depend $(OBJS) $(AR) $(ARFLAGS) $@ $(OBJS) ######################################################################### -- cgit v1.2.1 From bde63587622c4b830a27d1ddf7265843de9e994f Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Fri, 11 Jul 2008 22:56:11 +0200 Subject: Fix some more printf() format issues. Signed-off-by: Wolfgang Denk --- board/amcc/taishan/showinfo.c | 110 +++++++++++++++--------------- board/freescale/mpc7448hpc2/tsi108_init.c | 8 +-- board/netstal/hcu5/sdram.c | 2 +- board/sandburst/metrobox/metrobox.c | 2 +- 4 files changed, 61 insertions(+), 61 deletions(-) (limited to 'board') diff --git a/board/amcc/taishan/showinfo.c b/board/amcc/taishan/showinfo.c index 040b8004da..5b8b88e856 100644 --- a/board/amcc/taishan/showinfo.c +++ b/board/amcc/taishan/showinfo.c @@ -34,59 +34,59 @@ void show_reset_reg(void) /* read clock regsiter */ printf("===== Display reset and initialize register Start =========\n"); mfcpr(clk_pllc,reg); - printf("cpr_pllc = %#010x\n",reg); + printf("cpr_pllc = %#010lx\n",reg); mfcpr(clk_plld,reg); - printf("cpr_plld = %#010x\n",reg); + printf("cpr_plld = %#010lx\n",reg); mfcpr(clk_primad,reg); - printf("cpr_primad = %#010x\n",reg); + printf("cpr_primad = %#010lx\n",reg); mfcpr(clk_primbd,reg); - printf("cpr_primbd = %#010x\n",reg); + printf("cpr_primbd = %#010lx\n",reg); mfcpr(clk_opbd,reg); - printf("cpr_opbd = %#010x\n",reg); + printf("cpr_opbd = %#010lx\n",reg); mfcpr(clk_perd,reg); - printf("cpr_perd = %#010x\n",reg); + printf("cpr_perd = %#010lx\n",reg); mfcpr(clk_mald,reg); - printf("cpr_mald = %#010x\n",reg); + printf("cpr_mald = %#010lx\n",reg); /* read sdr register */ mfsdr(sdr_ebc,reg); - printf("sdr_ebc = %#010x\n",reg); + printf("sdr_ebc = %#010lx\n",reg); mfsdr(sdr_cp440,reg); - printf("sdr_cp440 = %#010x\n",reg); + printf("sdr_cp440 = %#010lx\n",reg); mfsdr(sdr_xcr,reg); - printf("sdr_xcr = %#010x\n",reg); + printf("sdr_xcr = %#010lx\n",reg); mfsdr(sdr_xpllc,reg); - printf("sdr_xpllc = %#010x\n",reg); + printf("sdr_xpllc = %#010lx\n",reg); mfsdr(sdr_xplld,reg); - printf("sdr_xplld = %#010x\n",reg); + printf("sdr_xplld = %#010lx\n",reg); mfsdr(sdr_pfc0,reg); - printf("sdr_pfc0 = %#010x\n",reg); + printf("sdr_pfc0 = %#010lx\n",reg); mfsdr(sdr_pfc1,reg); - printf("sdr_pfc1 = %#010x\n",reg); + printf("sdr_pfc1 = %#010lx\n",reg); mfsdr(sdr_cust0,reg); - printf("sdr_cust0 = %#010x\n",reg); + printf("sdr_cust0 = %#010lx\n",reg); mfsdr(sdr_cust1,reg); - printf("sdr_cust1 = %#010x\n",reg); + printf("sdr_cust1 = %#010lx\n",reg); mfsdr(sdr_uart0,reg); - printf("sdr_uart0 = %#010x\n",reg); + printf("sdr_uart0 = %#010lx\n",reg); mfsdr(sdr_uart1,reg); - printf("sdr_uart1 = %#010x\n",reg); + printf("sdr_uart1 = %#010lx\n",reg); printf("===== Display reset and initialize register End =========\n"); } @@ -97,13 +97,13 @@ void show_xbridge_info(void) printf("PCI-X chip control registers\n"); mfsdr(sdr_xcr, reg); - printf("sdr_xcr = %#010x\n", reg); + printf("sdr_xcr = %#010lx\n", reg); mfsdr(sdr_xpllc, reg); - printf("sdr_xpllc = %#010x\n", reg); + printf("sdr_xpllc = %#010lx\n", reg); mfsdr(sdr_xplld, reg); - printf("sdr_xplld = %#010x\n", reg); + printf("sdr_xplld = %#010lx\n", reg); printf("PCI-X Bridge Configure registers\n"); printf("PCIX0_VENDID = %#06x\n", in16r(PCIX0_VENDID)); @@ -116,49 +116,49 @@ void show_xbridge_info(void) printf("PCIX0_HDTYPE = %#04x\n", in8(PCIX0_HDTYPE)); printf("PCIX0_BIST = %#04x\n", in8(PCIX0_BIST)); - printf("PCIX0_BAR0 = %#010x\n", in32r(PCIX0_BAR0)); - printf("PCIX0_BAR1 = %#010x\n", in32r(PCIX0_BAR1)); - printf("PCIX0_BAR2 = %#010x\n", in32r(PCIX0_BAR2)); - printf("PCIX0_BAR3 = %#010x\n", in32r(PCIX0_BAR3)); - printf("PCIX0_BAR4 = %#010x\n", in32r(PCIX0_BAR4)); - printf("PCIX0_BAR5 = %#010x\n", in32r(PCIX0_BAR5)); + printf("PCIX0_BAR0 = %#010lx\n", in32r(PCIX0_BAR0)); + printf("PCIX0_BAR1 = %#010lx\n", in32r(PCIX0_BAR1)); + printf("PCIX0_BAR2 = %#010lx\n", in32r(PCIX0_BAR2)); + printf("PCIX0_BAR3 = %#010lx\n", in32r(PCIX0_BAR3)); + printf("PCIX0_BAR4 = %#010lx\n", in32r(PCIX0_BAR4)); + printf("PCIX0_BAR5 = %#010lx\n", in32r(PCIX0_BAR5)); - printf("PCIX0_CISPTR = %#010x\n", in32r(PCIX0_CISPTR)); + printf("PCIX0_CISPTR = %#010lx\n", in32r(PCIX0_CISPTR)); printf("PCIX0_SBSSYSVID = %#010x\n", in16r(PCIX0_SBSYSVID)); printf("PCIX0_SBSSYSID = %#010x\n", in16r(PCIX0_SBSYSID)); - printf("PCIX0_EROMBA = %#010x\n", in32r(PCIX0_EROMBA)); + printf("PCIX0_EROMBA = %#010lx\n", in32r(PCIX0_EROMBA)); printf("PCIX0_CAP = %#04x\n", in8(PCIX0_CAP)); printf("PCIX0_INTLN = %#04x\n", in8(PCIX0_INTLN)); printf("PCIX0_INTPN = %#04x\n", in8(PCIX0_INTPN)); printf("PCIX0_MINGNT = %#04x\n", in8(PCIX0_MINGNT)); printf("PCIX0_MAXLTNCY = %#04x\n", in8(PCIX0_MAXLTNCY)); - printf("PCIX0_BRDGOPT1 = %#010x\n", in32r(PCIX0_BRDGOPT1)); - printf("PCIX0_BRDGOPT2 = %#010x\n", in32r(PCIX0_BRDGOPT2)); - - printf("PCIX0_POM0LAL = %#010x\n", in32r(PCIX0_POM0LAL)); - printf("PCIX0_POM0LAH = %#010x\n", in32r(PCIX0_POM0LAH)); - printf("PCIX0_POM0SA = %#010x\n", in32r(PCIX0_POM0SA)); - printf("PCIX0_POM0PCILAL = %#010x\n", in32r(PCIX0_POM0PCIAL)); - printf("PCIX0_POM0PCILAH = %#010x\n", in32r(PCIX0_POM0PCIAH)); - printf("PCIX0_POM1LAL = %#010x\n", in32r(PCIX0_POM1LAL)); - printf("PCIX0_POM1LAH = %#010x\n", in32r(PCIX0_POM1LAH)); - printf("PCIX0_POM1SA = %#010x\n", in32r(PCIX0_POM1SA)); - printf("PCIX0_POM1PCILAL = %#010x\n", in32r(PCIX0_POM1PCIAL)); - printf("PCIX0_POM1PCILAH = %#010x\n", in32r(PCIX0_POM1PCIAH)); - printf("PCIX0_POM2SA = %#010x\n", in32r(PCIX0_POM2SA)); - - printf("PCIX0_PIM0SA = %#010x\n", in32r(PCIX0_PIM0SA)); - printf("PCIX0_PIM0LAL = %#010x\n", in32r(PCIX0_PIM0LAL)); - printf("PCIX0_PIM0LAH = %#010x\n", in32r(PCIX0_PIM0LAH)); - printf("PCIX0_PIM1SA = %#010x\n", in32r(PCIX0_PIM1SA)); - printf("PCIX0_PIM1LAL = %#010x\n", in32r(PCIX0_PIM1LAL)); - printf("PCIX0_PIM1LAH = %#010x\n", in32r(PCIX0_PIM1LAH)); - printf("PCIX0_PIM2SA = %#010x\n", in32r(PCIX0_PIM1SA)); - printf("PCIX0_PIM2LAL = %#010x\n", in32r(PCIX0_PIM1LAL)); - printf("PCIX0_PIM2LAH = %#010x\n", in32r(PCIX0_PIM1LAH)); - - printf("PCIX0_XSTS = %#010x\n", in32r(PCIX0_STS)); + printf("PCIX0_BRDGOPT1 = %#010lx\n", in32r(PCIX0_BRDGOPT1)); + printf("PCIX0_BRDGOPT2 = %#010lx\n", in32r(PCIX0_BRDGOPT2)); + + printf("PCIX0_POM0LAL = %#010lx\n", in32r(PCIX0_POM0LAL)); + printf("PCIX0_POM0LAH = %#010lx\n", in32r(PCIX0_POM0LAH)); + printf("PCIX0_POM0SA = %#010lx\n", in32r(PCIX0_POM0SA)); + printf("PCIX0_POM0PCILAL = %#010lx\n", in32r(PCIX0_POM0PCIAL)); + printf("PCIX0_POM0PCILAH = %#010lx\n", in32r(PCIX0_POM0PCIAH)); + printf("PCIX0_POM1LAL = %#010lx\n", in32r(PCIX0_POM1LAL)); + printf("PCIX0_POM1LAH = %#010lx\n", in32r(PCIX0_POM1LAH)); + printf("PCIX0_POM1SA = %#010lx\n", in32r(PCIX0_POM1SA)); + printf("PCIX0_POM1PCILAL = %#010lx\n", in32r(PCIX0_POM1PCIAL)); + printf("PCIX0_POM1PCILAH = %#010lx\n", in32r(PCIX0_POM1PCIAH)); + printf("PCIX0_POM2SA = %#010lx\n", in32r(PCIX0_POM2SA)); + + printf("PCIX0_PIM0SA = %#010lx\n", in32r(PCIX0_PIM0SA)); + printf("PCIX0_PIM0LAL = %#010lx\n", in32r(PCIX0_PIM0LAL)); + printf("PCIX0_PIM0LAH = %#010lx\n", in32r(PCIX0_PIM0LAH)); + printf("PCIX0_PIM1SA = %#010lx\n", in32r(PCIX0_PIM1SA)); + printf("PCIX0_PIM1LAL = %#010lx\n", in32r(PCIX0_PIM1LAL)); + printf("PCIX0_PIM1LAH = %#010lx\n", in32r(PCIX0_PIM1LAH)); + printf("PCIX0_PIM2SA = %#010lx\n", in32r(PCIX0_PIM1SA)); + printf("PCIX0_PIM2LAL = %#010lx\n", in32r(PCIX0_PIM1LAL)); + printf("PCIX0_PIM2LAH = %#010lx\n", in32r(PCIX0_PIM1LAH)); + + printf("PCIX0_XSTS = %#010lx\n", in32r(PCIX0_STS)); } int do_show_xbridge_info(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) diff --git a/board/freescale/mpc7448hpc2/tsi108_init.c b/board/freescale/mpc7448hpc2/tsi108_init.c index efa952c2e7..ad80694077 100644 --- a/board/freescale/mpc7448hpc2/tsi108_init.c +++ b/board/freescale/mpc7448hpc2/tsi108_init.c @@ -165,8 +165,8 @@ int board_early_init_f (void) printf ("Invalid DDR2 clock setting\n"); return -1; } - printf ("BUS: %d MHz\n", get_board_bus_clk() / 1000000); - printf ("MEM: %d MHz\n", gd->mem_clk / 1000000); + printf ("BUS: %lu MHz\n", get_board_bus_clk() / 1000000); + printf ("MEM: %lu MHz\n", gd->mem_clk / 1000000); return 0; } @@ -622,8 +622,8 @@ int misc_init_r (void) #ifdef CFG_L2 l2cache_enable (); #endif - printf ("BUS: %d MHz\n", gd->bus_clk / 1000000); - printf ("MEM: %d MHz\n", gd->mem_clk / 1000000); + printf ("BUS: %lu MHz\n", gd->bus_clk / 1000000); + printf ("MEM: %lu MHz\n", gd->mem_clk / 1000000); /* * All the information needed to print the cache details is avaiblable diff --git a/board/netstal/hcu5/sdram.c b/board/netstal/hcu5/sdram.c index 80e84aebb8..66a958c78a 100644 --- a/board/netstal/hcu5/sdram.c +++ b/board/netstal/hcu5/sdram.c @@ -71,7 +71,7 @@ void board_add_ram_info(int use_default) } get_sys_info(&board_cfg); - printf(", %d MHz", (board_cfg.freqPLB * 2) / 1000000); + printf(", %lu MHz", (board_cfg.freqPLB * 2) / 1000000); mfsdram(DDR0_03, val); val = DDR0_03_CASLAT_DECODE(val); diff --git a/board/sandburst/metrobox/metrobox.c b/board/sandburst/metrobox/metrobox.c index 97049013e1..66cdfb1562 100644 --- a/board/sandburst/metrobox/metrobox.c +++ b/board/sandburst/metrobox/metrobox.c @@ -270,7 +270,7 @@ int checkboard (void) } printf ("OptoFPGA ID:\t0x%02X\tRev: 0x%02X\n", opto_id, opto_rev); - printf ("Board Rev:\t0x%02X\tID: %s\n", brd_rev, (char *)board_id_as[brd_id]); + printf ("Board Rev:\t0x%02X\tID: %s\n", brd_rev, board_id_as[brd_id].name); /* Fix the ack in the bme 32 */ udelay(5000); -- cgit v1.2.1 From b60b8573875e650e4c69be667bfc88d3ed474a7c Mon Sep 17 00:00:00 2001 From: John Rigby Date: Fri, 11 Jul 2008 14:44:09 -0600 Subject: ADS5121 cleanup compile warnings board/ads5121/iopin.c Replace bit fields in struct iopin_t with a single field and intialize it via plain old macros. This fixes the type pun warnings and makes the code more readable. board/ads5121/ads5121.c Add include iopin.h to ads5121.c for the iopin_initialize prototype. Add an extern void ads5121_diu_init(void) Signed-off-by: John Rigby --- board/ads5121/ads5121.c | 3 ++ board/ads5121/iopin.c | 111 ++++++++++++++++++++++++++++-------------------- 2 files changed, 68 insertions(+), 46 deletions(-) (limited to 'board') diff --git a/board/ads5121/ads5121.c b/board/ads5121/ads5121.c index d5cee64bde..2332912c98 100644 --- a/board/ads5121/ads5121.c +++ b/board/ads5121/ads5121.c @@ -23,6 +23,7 @@ #include #include +#include "iopin.h" #include #include #include @@ -49,6 +50,8 @@ #define CSAW_START(start) ((start) & 0xFFFF0000) #define CSAW_STOP(start, size) (((start) + (size) - 1) >> 16) +extern void ads5121_diu_init(void); + long int fixed_sdram(void); int board_early_init_f (void) diff --git a/board/ads5121/iopin.c b/board/ads5121/iopin.c index 6a35c8154d..a6792a0e27 100644 --- a/board/ads5121/iopin.c +++ b/board/ads5121/iopin.c @@ -25,71 +25,90 @@ #include #include "iopin.h" -/* - * IO PAD TYPES - * for all types fmux is used to select the funtion - * ds sets the slew rate - * STD pins nothing extra (can set ds & fmux only) - * STD_PU pue=1 to enable pull & pud sets whether up or down resistors - * STD_ST st sets the Schmitt trigger - * STD_PU_ST pue & pud sets pull-up/down resistors as in STD_PU - * st sets the Schmitt trigger - * PCI hold sets output delay - * PCI_ST hold sets output delay and st sets the Schmitt trigger - */ +/* IO pin fields */ +#define IO_PIN_FMUX(v) ((v) << 7) /* pin function */ +#define IO_PIN_HOLD(v) ((v) << 5) /* hold time, pci only */ +#define IO_PIN_PUD(v) ((v) << 4) /* if PUE, 0=pull-down, 1=pull-up */ +#define IO_PIN_PUE(v) ((v) << 3) /* pull up/down enable */ +#define IO_PIN_ST(v) ((v) << 2) /* schmitt trigger */ +#define IO_PIN_DS(v) ((v)) /* slew rate */ static struct iopin_t { - u_short p_offset; /* offset from IOCTL_MEM_OFFSET */ - u_short p_no; /* number of pins to set this way */ - u_short bit_or:7; /* Do bitwise OR instead of setting */ - u_short fmux:2; /* pad function select 0-3 */ - u_short hold:2; /* PCI pad types only; */ - u_short pud:1; /* pull resistor; PU types only; */ - /* if pue=1 then 0=pull-down, 1=pull-up */ - u_short pue:1; /* Pull resistor enable; _PU types only */ - u_short st:1; /* Schmitt trigger enable; _ST types only */ - u_short ds:2; /* Slew rate class, 0=class1, ..., 3=class4 */ + int p_offset; /* offset from IOCTL_MEM_OFFSET */ + int nr_pins; /* number of pins to set this way */ + int bit_or; /* or in the value instead of overwrite */ + u_long val; /* value to write or or */ } ioregs_init[] = { -/* FUNC1=FEC_RX_DV Sets Next 3 to FEC pads */ - {IOCTL_SPDIF_TXCLK, 3, 0, 1, 0, 0, 0, 0, 3}, -/* Set highest Slew on 9 PATA pins */ - {IOCTL_PATA_CE1, 9, 1, 0, 0, 0, 0, 0, 3}, -/* FUNC1=FEC_COL Sets Next 15 to FEC pads */ - {IOCTL_PSC0_0, 15, 0, 1, 0, 0, 0, 0, 3}, -/* FUNC1=SPDIF_TXCLK */ - {IOCTL_LPC_CS1, 1, 0, 1, 0, 0, 0, 1, 3}, -/* FUNC2=SPDIF_TX and sets Next pin to SPDIF_RX */ - {IOCTL_I2C1_SCL, 2, 0, 2, 0, 0, 0, 1, 3}, -/* FUNC2=DIU CLK */ - {IOCTL_PSC6_0, 1, 0, 2, 0, 0, 0, 1, 3}, -/* FUNC2=DIU_HSYNC */ - {IOCTL_PSC6_1, 1, 0, 2, 0, 0, 0, 0, 3}, -/* FUNC2=DIUVSYNC Sets Next 26 to DIU Pads */ - {IOCTL_PSC6_4, 26, 0, 2, 0, 0, 0, 0, 3} + /* FUNC1=FEC_RX_DV Sets Next 3 to FEC pads */ + { + IOCTL_SPDIF_TXCLK, 3, 0, + IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3) + }, + /* Set highest Slew on 9 PATA pins */ + { + IOCTL_PATA_CE1, 9, 1, + IO_PIN_FMUX(0) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3) + }, + /* FUNC1=FEC_COL Sets Next 15 to FEC pads */ + { + IOCTL_PSC0_0, 15, 0, + IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3) + }, + /* FUNC1=SPDIF_TXCLK */ + { + IOCTL_LPC_CS1, 1, 0, + IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | + IO_PIN_PUE(0) | IO_PIN_ST(1) | IO_PIN_DS(3) + }, + /* FUNC2=SPDIF_TX and sets Next pin to SPDIF_RX */ + { + IOCTL_I2C1_SCL, 2, 0, + IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | + IO_PIN_PUE(0) | IO_PIN_ST(1) | IO_PIN_DS(3) + }, + /* FUNC2=DIU CLK */ + { + IOCTL_PSC6_0, 1, 0, + IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | + IO_PIN_PUE(0) | IO_PIN_ST(1) | IO_PIN_DS(3) + }, + /* FUNC2=DIU_HSYNC */ + { + IOCTL_PSC6_1, 1, 0, + IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3) + }, + /* FUNC2=DIUVSYNC Sets Next 26 to DIU Pads */ + { + IOCTL_PSC6_4, 26, 0, + IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3) + } }; void iopin_initialize(void) { short i, j, n, p; u_long *reg; + immap_t *im = (immap_t *)CFG_IMMR; + + reg = (u_long *)&(im->io_ctrl.regs[0]); if (sizeof(ioregs_init) == 0) return; - immap_t *im = (immap_t *)CFG_IMMR; - reg = (u_long *)&(im->io_ctrl.regs[0]); n = sizeof(ioregs_init) / sizeof(ioregs_init[0]); for (i = 0; i < n; i++) { for (p = 0, j = ioregs_init[i].p_offset / sizeof(u_long); - p < ioregs_init[i].p_no; p++, j++) { - /* lowest 9 bits sets the register */ + p < ioregs_init[i].nr_pins; p++, j++) { if (ioregs_init[i].bit_or) - reg[j] |= *((u_long *) &ioregs_init[i].p_no) - & 0x000001ff; + reg[j] |= ioregs_init[i].val; else - reg[j] = *((u_long *) &ioregs_init[i].p_no) - & 0x000001ff; + reg[j] = ioregs_init[i].val; } } return; -- cgit v1.2.1 From f889265753ddf4465d9d580827bb9289bfac55d6 Mon Sep 17 00:00:00 2001 From: Kenneth Johansson Date: Sat, 12 Jul 2008 13:18:34 -0600 Subject: fix DIU for small screens The DIU_DIV register is 8 bit not 5 bit. This prevented large DIV values so it was not possible to set a slow pixel clock and thus prevented display on small screens. Signed-off-by: Kenneth Johansson Acked-by: John Rigby --- board/ads5121/ads5121_diu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'board') diff --git a/board/ads5121/ads5121_diu.c b/board/ads5121/ads5121_diu.c index 87cf0cbbe9..26628d3eb5 100644 --- a/board/ads5121/ads5121_diu.c +++ b/board/ads5121/ads5121_diu.c @@ -57,7 +57,7 @@ void diu_set_pixel_clock(unsigned int pixclock) /* Modify PXCLK in GUTS CLKDVDR */ debug("DIU: Current value of CLKDVDR = 0x%08x\n", *clkdvdr); temp = *clkdvdr & 0xFFFFFF00; - *clkdvdr = temp | (pixval & 0x1F); + *clkdvdr = temp | (pixval & 0xFF); debug("DIU: Modified value of CLKDVDR = 0x%08x\n", *clkdvdr); } -- cgit v1.2.1 From 17bd17071463b0cde391ac4a0863d600474b4ea1 Mon Sep 17 00:00:00 2001 From: Anatolij Gustschin Date: Thu, 10 Jul 2008 01:15:10 +0200 Subject: at91: Fix to enable using Teridian MII phy (78Q21x3) with at91sam9260 On the at91sam9260ep development board there is an EEPROM connected to the TWI interface (PA23, PA24 Peripheral A multiplexing), so we cannot use these pins as ETX2, ETX3. This patch configures PA10, PA11 pins for ETX2, ETX3 instead of PA23, PA24 pins. Signed-off-by: Anatolij Gustschin Signed-off-by: Manuel Sahm --- board/atmel/at91sam9260ek/at91sam9260ek.c | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'board') diff --git a/board/atmel/at91sam9260ek/at91sam9260ek.c b/board/atmel/at91sam9260ek/at91sam9260ek.c index 836a0c40bf..06d8512cc9 100644 --- a/board/atmel/at91sam9260ek/at91sam9260ek.c +++ b/board/atmel/at91sam9260ek/at91sam9260ek.c @@ -188,8 +188,17 @@ static void at91sam9260ek_macb_hw_init(void) at91_set_B_periph(AT91_PIN_PA25, 0); /* ERX2 */ at91_set_B_periph(AT91_PIN_PA26, 0); /* ERX3 */ at91_set_B_periph(AT91_PIN_PA27, 0); /* ERXCK */ +#if defined(CONFIG_AT91SAM9260EK) + /* + * use PA10, PA11 for ETX2, ETX3. + * PA23 and PA24 are for TWI EEPROM + */ + at91_set_B_periph(AT91_PIN_PA10, 0); /* ETX2 */ + at91_set_B_periph(AT91_PIN_PA11, 0); /* ETX3 */ +#else at91_set_B_periph(AT91_PIN_PA23, 0); /* ETX2 */ at91_set_B_periph(AT91_PIN_PA24, 0); /* ETX3 */ +#endif at91_set_B_periph(AT91_PIN_PA22, 0); /* ETXER */ #endif -- cgit v1.2.1 From 068c1b77c8f42a1a31084d2f4b1d5cc807c1a9ce Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Thu, 10 Jul 2008 13:53:31 +0200 Subject: ppc4xx: Remove redundant ft_board_setup() functions from some 4xx boards This patch removes some ft_board_setup() functions from some 4xx boards. This can be done since we now have a default weak implementation for this in cpu/ppc4xx/fdt.c. Only board in need for a different/custom implementation like canyonlands need their own version. Signed-off-by: Stefan Roese --- board/amcc/katmai/katmai.c | 21 --------------------- board/amcc/kilauea/kilauea.c | 21 --------------------- board/amcc/makalu/makalu.c | 21 --------------------- board/amcc/sequoia/sequoia.c | 21 --------------------- board/amcc/yosemite/yosemite.c | 21 --------------------- board/esd/pmc440/pmc440.c | 21 --------------------- board/prodrive/alpr/alpr.c | 21 --------------------- 7 files changed, 147 deletions(-) (limited to 'board') diff --git a/board/amcc/katmai/katmai.c b/board/amcc/katmai/katmai.c index 3a0b18f30d..f2bed5cd8a 100644 --- a/board/amcc/katmai/katmai.c +++ b/board/amcc/katmai/katmai.c @@ -517,24 +517,3 @@ int post_hotkeys_pressed(void) return (ctrlc()); } #endif - -#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) -void ft_board_setup(void *blob, bd_t *bd) -{ - u32 val[4]; - int rc; - - ft_cpu_setup(blob, bd); - - /* Fixup NOR mapping */ - val[0] = 0; /* chip select number */ - val[1] = 0; /* always 0 */ - val[2] = gd->bd->bi_flashstart; - val[3] = gd->bd->bi_flashsize; - rc = fdt_find_and_setprop(blob, "/plb/opb/ebc", "ranges", - val, sizeof(val), 1); - if (rc) - printf("Unable to update property NOR mapping, err=%s\n", - fdt_strerror(rc)); -} -#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */ diff --git a/board/amcc/kilauea/kilauea.c b/board/amcc/kilauea/kilauea.c index f30dc8f924..7b1025526f 100644 --- a/board/amcc/kilauea/kilauea.c +++ b/board/amcc/kilauea/kilauea.c @@ -374,24 +374,3 @@ int post_hotkeys_pressed(void) return 0; /* No hotkeys supported */ } #endif /* CONFIG_POST */ - -#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) -void ft_board_setup(void *blob, bd_t *bd) -{ - u32 val[4]; - int rc; - - ft_cpu_setup(blob, bd); - - /* Fixup NOR mapping */ - val[0] = 0; /* chip select number */ - val[1] = 0; /* always 0 */ - val[2] = gd->bd->bi_flashstart; - val[3] = gd->bd->bi_flashsize; - rc = fdt_find_and_setprop(blob, "/plb/opb/ebc", "ranges", - val, sizeof(val), 1); - if (rc) - printf("Unable to update property NOR mapping, err=%s\n", - fdt_strerror(rc)); -} -#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */ diff --git a/board/amcc/makalu/makalu.c b/board/amcc/makalu/makalu.c index 9baec9af67..2b4d3d4b77 100644 --- a/board/amcc/makalu/makalu.c +++ b/board/amcc/makalu/makalu.c @@ -330,24 +330,3 @@ int post_hotkeys_pressed(void) return 0; /* No hotkeys supported */ } #endif /* CONFIG_POST */ - -#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) -void ft_board_setup(void *blob, bd_t *bd) -{ - u32 val[4]; - int rc; - - ft_cpu_setup(blob, bd); - - /* Fixup NOR mapping */ - val[0] = 0; /* chip select number */ - val[1] = 0; /* always 0 */ - val[2] = gd->bd->bi_flashstart; - val[3] = gd->bd->bi_flashsize; - rc = fdt_find_and_setprop(blob, "/plb/opb/ebc", "ranges", - val, sizeof(val), 1); - if (rc) - printf("Unable to update property NOR mapping, err=%s\n", - fdt_strerror(rc)); -} -#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */ diff --git a/board/amcc/sequoia/sequoia.c b/board/amcc/sequoia/sequoia.c index 5ff9787d3d..b833092f19 100644 --- a/board/amcc/sequoia/sequoia.c +++ b/board/amcc/sequoia/sequoia.c @@ -509,24 +509,3 @@ int post_hotkeys_pressed(void) return 0; /* No hotkeys supported */ } #endif /* CONFIG_POST */ - -#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) -void ft_board_setup(void *blob, bd_t *bd) -{ - u32 val[4]; - int rc; - - ft_cpu_setup(blob, bd); - - /* Fixup NOR mapping */ - val[0] = 0; /* chip select number */ - val[1] = 0; /* always 0 */ - val[2] = gd->bd->bi_flashstart; - val[3] = gd->bd->bi_flashsize; - rc = fdt_find_and_setprop(blob, "/plb/opb/ebc", "ranges", - val, sizeof(val), 1); - if (rc) - printf("Unable to update property NOR mapping, err=%s\n", - fdt_strerror(rc)); -} -#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */ diff --git a/board/amcc/yosemite/yosemite.c b/board/amcc/yosemite/yosemite.c index 3b1f8e2d79..05be40acdf 100644 --- a/board/amcc/yosemite/yosemite.c +++ b/board/amcc/yosemite/yosemite.c @@ -510,24 +510,3 @@ void board_reset(void) /* give reset to BCSR */ *(unsigned char *)(CFG_BCSR_BASE | 0x06) = 0x09; } - -#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) -void ft_board_setup(void *blob, bd_t *bd) -{ - u32 val[4]; - int rc; - - ft_cpu_setup(blob, bd); - - /* Fixup NOR mapping */ - val[0] = 0; /* chip select number */ - val[1] = 0; /* always 0 */ - val[2] = gd->bd->bi_flashstart; - val[3] = gd->bd->bi_flashsize; - rc = fdt_find_and_setprop(blob, "/plb/opb/ebc", "ranges", - val, sizeof(val), 1); - if (rc) - printf("Unable to update property NOR mapping, err=%s\n", - fdt_strerror(rc)); -} -#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */ diff --git a/board/esd/pmc440/pmc440.c b/board/esd/pmc440/pmc440.c index 5b811bba9a..0cdaee4452 100644 --- a/board/esd/pmc440/pmc440.c +++ b/board/esd/pmc440/pmc440.c @@ -876,24 +876,3 @@ int usb_board_init_fail(void) return 0; } #endif /* defined(CONFIG_USB_OHCI) && defined(CFG_USB_OHCI_BOARD_INIT) */ - -#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) -void ft_board_setup(void *blob, bd_t *bd) -{ - u32 val[4]; - int rc; - - ft_cpu_setup(blob, bd); - - /* Fixup NOR mapping */ - val[0] = 0; /* chip select number */ - val[1] = 0; /* always 0 */ - val[2] = gd->bd->bi_flashstart; - val[3] = gd->bd->bi_flashsize; - rc = fdt_find_and_setprop(blob, "/plb/opb/ebc", "ranges", - val, sizeof(val), 1); - if (rc) - printf("Unable to update property NOR mapping, err=%s\n", - fdt_strerror(rc)); -} -#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */ diff --git a/board/prodrive/alpr/alpr.c b/board/prodrive/alpr/alpr.c index 8d60936881..131a62dd64 100644 --- a/board/prodrive/alpr/alpr.c +++ b/board/prodrive/alpr/alpr.c @@ -287,24 +287,3 @@ int post_hotkeys_pressed(void) return (ctrlc()); } #endif - -#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) -void ft_board_setup(void *blob, bd_t *bd) -{ - u32 val[4]; - int rc; - - ft_cpu_setup(blob, bd); - - /* Fixup NOR mapping */ - val[0] = 0; /* chip select number */ - val[1] = 0; /* always 0 */ - val[2] = gd->bd->bi_flashstart; - val[3] = gd->bd->bi_flashsize; - rc = fdt_find_and_setprop(blob, "/plb/opb/ebc", "ranges", - val, sizeof(val), 1); - if (rc) - printf("Unable to update property NOR mapping, err=%s\n", - fdt_strerror(rc)); -} -#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */ -- cgit v1.2.1 From 0a5676befb0c590212a53f7627fa5d0d8a84bf34 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Sat, 12 Jul 2008 14:36:34 +0200 Subject: Fix some more printf() format issues. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- board/armadillo/flash.c | 2 +- board/delta/nand.c | 2 +- board/integratorcp/flash.c | 6 +++--- board/mp2usb/flash.c | 2 +- board/versatile/flash.c | 2 +- board/zylonite/nand.c | 2 +- 6 files changed, 8 insertions(+), 8 deletions(-) (limited to 'board') diff --git a/board/armadillo/flash.c b/board/armadillo/flash.c index 037a6430da..8518856cb1 100644 --- a/board/armadillo/flash.c +++ b/board/armadillo/flash.c @@ -279,7 +279,7 @@ int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) int i, rc; wp = (addr & ~1); /* get lower word aligned address */ - printf ("Writing %d short data to 0x%p from 0x%p.\n ", cnt, wp, src); + printf ("Writing %lu short data to 0x%lx from 0x%p.\n ", cnt, wp, src); /* * handle unaligned start bytes diff --git a/board/delta/nand.c b/board/delta/nand.c index a635a6521b..5024056bc3 100644 --- a/board/delta/nand.c +++ b/board/delta/nand.c @@ -254,7 +254,7 @@ static unsigned long dfc_wait_event(unsigned long event) break; } if(get_delta(start) > timeout) { - DFC_DEBUG1("dfc_wait_event: TIMEOUT waiting for event: 0x%x.\n", event); + DFC_DEBUG1("dfc_wait_event: TIMEOUT waiting for event: 0x%lx.\n", event); return 0xff000000; } diff --git a/board/integratorcp/flash.c b/board/integratorcp/flash.c index b653c058e1..59961cdab6 100644 --- a/board/integratorcp/flash.c +++ b/board/integratorcp/flash.c @@ -393,7 +393,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) *addr = (FPW) 0x00D000D0; } else { #ifdef DEBUG - printf ("Timeout,0x%08x\n", status); + printf ("Timeout,0x%08lx\n", status); #else printf("Timeout\n"); #endif @@ -515,7 +515,7 @@ static int write_data (flash_info_t * info, ulong dest, FPW data) /* Check if Flash is (sufficiently) erased */ if ((*addr & data) != data) { - printf ("not erased at %08lx (%x)\n", (ulong) addr, *addr); + printf ("not erased at %08lx (%lx)\n", (ulong) addr, *addr); return (2); } @@ -542,7 +542,7 @@ static int write_data (flash_info_t * info, ulong dest, FPW data) #ifdef DEBUG *addr = (FPW) 0x00700070; status = *addr; - printf("## status=0x%08x, addr=0x%08x\n", status, addr); + printf("## status=0x%08lx, addr=0x%p\n", status, addr); #endif *addr = (FPW) 0x00500050; /* clear status register cmd */ *addr = (FPW) 0x00FF00FF; /* restore read mode */ diff --git a/board/mp2usb/flash.c b/board/mp2usb/flash.c index 89ced163bb..c19d445e20 100644 --- a/board/mp2usb/flash.c +++ b/board/mp2usb/flash.c @@ -426,7 +426,7 @@ static int write_data (flash_info_t *info, ulong dest, FPW data) /* Check if Flash is (sufficiently) erased */ if ((*addr & data) != data) { - printf ("not erased at %08lx (%lx)\n", (ulong) addr, *addr); + printf ("not erased at %08lx (%lx)\n", (ulong) addr, (ulong) *addr); return (2); } /* diff --git a/board/versatile/flash.c b/board/versatile/flash.c index ca77c8a29e..bbe5df724d 100644 --- a/board/versatile/flash.c +++ b/board/versatile/flash.c @@ -476,7 +476,7 @@ static int write_data (flash_info_t * info, ulong dest, FPW data) /* Check if Flash is (sufficiently) erased */ if ((*addr & data) != data) { - printf ("not erased at %08lx (%x)\n", (ulong) addr, *addr); + printf ("not erased at %08lx (%lx)\n", (ulong) addr, (ulong) *addr); return (2); } diff --git a/board/zylonite/nand.c b/board/zylonite/nand.c index aa3932ad2d..ca16578432 100644 --- a/board/zylonite/nand.c +++ b/board/zylonite/nand.c @@ -254,7 +254,7 @@ static unsigned long dfc_wait_event(unsigned long event) break; } if(get_delta(start) > timeout) { - DFC_DEBUG1("dfc_wait_event: TIMEOUT waiting for event: 0x%x.\n", event); + DFC_DEBUG1("dfc_wait_event: TIMEOUT waiting for event: 0x%lx.\n", event); return 0xff000000; } -- cgit v1.2.1 From 0f9d5f6d6e814907794995c6a22af752040c35d9 Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Sun, 13 Jul 2008 19:48:26 +0200 Subject: ADS5121: Fix (delete) incorrect ads5121_diu_init() prototype Signed-off-by: Wolfgang Denk --- board/ads5121/ads5121.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'board') diff --git a/board/ads5121/ads5121.c b/board/ads5121/ads5121.c index 2332912c98..8452054e68 100644 --- a/board/ads5121/ads5121.c +++ b/board/ads5121/ads5121.c @@ -50,8 +50,6 @@ #define CSAW_START(start) ((start) & 0xFFFF0000) #define CSAW_STOP(start, size) (((start) + (size) - 1) >> 16) -extern void ads5121_diu_init(void); - long int fixed_sdram(void); int board_early_init_f (void) -- cgit v1.2.1