From cf1971c1c0a76c3105a347102db083027a3d7b91 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Mon, 25 Oct 2010 18:32:08 +0200 Subject: ppc4xx: t3corp: Add support for the Xilinx DS617 flash chip The t3corp board has an Xilinx DS617 flash chip connected to the onboard FPGA. This patch adds support for these chips. Board specific flash accessor functions are needed, since the chips can only be read correctly in 16bit mode. Additionally the FPGA chip-selects are configured for device-paced transfers (ready is enabled). Signed-off-by: Stefan Roese --- board/t3corp/t3corp.c | 38 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) (limited to 'board/t3corp') diff --git a/board/t3corp/t3corp.c b/board/t3corp/t3corp.c index 04d6a2e2af..f2853e42e5 100644 --- a/board/t3corp/t3corp.c +++ b/board/t3corp/t3corp.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #include #include @@ -191,3 +192,40 @@ struct sdram_timing *ddr_scan_option(struct sdram_timing *default_val) { return board_scan_options; } + +/* + * Accessor functions replacing the "weak" functions in + * drivers/mtd/cfi_flash.c + * + * The NOR flash devices "behind" the FPGA's (Xilinx DS617) + * can only be read correctly in 16bit mode. We need to emulate + * 8bit and 32bit reads here in the board specific code. + */ +u8 flash_read8(void *addr) +{ + u16 val = __raw_readw((void *)((u32)addr & ~1)); + + if ((u32)addr & 1) + return val; + + return val >> 8; +} + +u32 flash_read32(void *addr) +{ + return (__raw_readw(addr) << 16) | __raw_readw((void *)((u32)addr + 2)); +} + +void flash_cmd_reset(flash_info_t *info) +{ + /* + * FLASH at address CONFIG_SYS_FLASH_BASE is a Spansion chip and + * needs the Spansion type reset commands. The other flash chip + * is located behind a FPGA (Xilinx DS617) and needs the Intel type + * reset command. + */ + if (info->start[0] == CONFIG_SYS_FLASH_BASE) + flash_write_cmd(info, 0, 0, AMD_CMD_RESET); + else + flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); +} -- cgit v1.2.1