From 237e3793fbe4227105dee586d95942c0ac3f6b62 Mon Sep 17 00:00:00 2001 From: Heiko Schocher Date: Fri, 31 Oct 2014 08:31:05 +0100 Subject: arm, at91, spl: add spl support for the taurus board MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit replaces the at91bootstrap code with SPL code. make the spl image with: ./tools/mkimage -T atmelimage -d spl/u-boot-spl.bin spl/boot.bin this writes the length of the spl image into the 6th execption vector. This is needed from the ROM bootloader. Signed-off-by: Heiko Schocher Reviewed-by: Bo Shen Signed-off-by: Andreas Bießmann --- board/siemens/taurus/taurus.c | 82 +++++++++++++++++++++++++++++++++++++------ 1 file changed, 72 insertions(+), 10 deletions(-) (limited to 'board/siemens/taurus/taurus.c') diff --git a/board/siemens/taurus/taurus.c b/board/siemens/taurus/taurus.c index 76609c7d04..b8ff478110 100644 --- a/board/siemens/taurus/taurus.c +++ b/board/siemens/taurus/taurus.c @@ -21,6 +21,8 @@ #include #include #include +#include +#include #include #include #include @@ -30,7 +32,6 @@ DECLARE_GLOBAL_DATA_PTR; -#ifdef CONFIG_CMD_NAND static void taurus_nand_hw_init(void) { struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC; @@ -63,15 +64,77 @@ static void taurus_nand_hw_init(void) /* Enable NandFlash */ at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1); } + +#if defined(CONFIG_SPL_BUILD) +#include +#include + +void matrix_init(void) +{ + struct at91_matrix *mat = (struct at91_matrix *)ATMEL_BASE_MATRIX; + + writel((readl(&mat->scfg[3]) & (~AT91_MATRIX_SLOT_CYCLE)) + | AT91_MATRIX_SLOT_CYCLE_(0x40), + &mat->scfg[3]); +} + +void at91_spl_board_init(void) +{ + taurus_nand_hw_init(); + + /* Configure recovery button PINs */ + at91_set_gpio_input(AT91_PIN_PA31, 1); + + /* check if button is pressed */ + if (at91_get_gpio_value(AT91_PIN_PA31) == 0) { + u32 boot_device; + + debug("Recovery button pressed\n"); + boot_device = spl_boot_device(); + switch (boot_device) { +#ifdef CONFIG_SPL_NAND_SUPPORT + case BOOT_DEVICE_NAND: + nand_init(); + spl_nand_erase_one(0, 0); + break; +#endif + } + } +} + +void mem_init(void) +{ + struct at91_matrix *ma = (struct at91_matrix *)ATMEL_BASE_MATRIX; + struct sdramc_reg setting; + + at91_sdram_hw_init(); + setting.cr = (AT91_SDRAMC_NC_9 | + AT91_SDRAMC_NR_13 | + AT91_SDRAMC_CAS_3 | + AT91_SDRAMC_NB_4 | + AT91_SDRAMC_DBW_32 | + AT91_SDRAMC_TWR_VAL(3) | + AT91_SDRAMC_TRC_VAL(9) | + AT91_SDRAMC_TRP_VAL(3) | + AT91_SDRAMC_TRCD_VAL(3) | + AT91_SDRAMC_TRAS_VAL(6) | + AT91_SDRAMC_TXSR_VAL(10)); + setting.mdr = AT91_SDRAMC_MD_SDRAM; + setting.tr = (CONFIG_SYS_MASTER_CLOCK * 7) / 1000000; + + + writel(readl(&ma->ebicsa) | AT91_MATRIX_CS1A_SDRAMC | + AT91_MATRIX_VDDIOMSEL_3_3V | AT91_MATRIX_EBI_IOSR_SEL, + &ma->ebicsa); + sdramc_initialize(ATMEL_BASE_CS1, &setting); +} #endif #ifdef CONFIG_MACB static void taurus_macb_hw_init(void) { - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; - /* Enable EMAC clock */ - writel(1 << ATMEL_ID_EMAC0, &pmc->pcer); + at91_periph_clk_enable(ATMEL_ID_EMAC0); /* * Disable pull-up on: @@ -119,12 +182,12 @@ int board_mmc_init(bd_t *bd) int board_early_init_f(void) { - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; - /* Enable clocks for all PIOs */ - writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) | - (1 << ATMEL_ID_PIOC), - &pmc->pcer); + at91_periph_clk_enable(ATMEL_ID_PIOA); + at91_periph_clk_enable(ATMEL_ID_PIOB); + at91_periph_clk_enable(ATMEL_ID_PIOC); + + at91_seriald_hw_init(); return 0; } @@ -149,7 +212,6 @@ int board_init(void) /* adress of boot parameters */ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; - at91_seriald_hw_init(); #ifdef CONFIG_CMD_NAND taurus_nand_hw_init(); #endif -- cgit v1.2.1