From af2536088e2feae2cf1274f48376e3310e0f709e Mon Sep 17 00:00:00 2001 From: Matthew McClintock Date: Fri, 18 May 2012 06:04:17 +0000 Subject: powerpc/p1022ds: add support for SPI and SD boot Add TLB mappings, board target options, and configuration items need for SPI/SD boot. Since P1022DS RevB board, the NOR flash have been changed to 16 bit/28bit address flash, therefore, when SDHC/ESPI booting and access to eLBC, the PMUXCR[0~1] must be set to 10b, and PMUXCR[9~10] must be set to 00b for them. Configure the PX_BRDCFG0[0~1] to 10b which is connected to SPI devices as SPI_CS(0:3)_B. Signed-off-by: Matthew McClintock Signed-off-by: Jerry Huang Signed-off-by: Jiang Yutang Signed-off-by: Andy Fleming --- board/freescale/p1022ds/p1022ds.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'board/freescale/p1022ds/p1022ds.c') diff --git a/board/freescale/p1022ds/p1022ds.c b/board/freescale/p1022ds/p1022ds.c index 56dfcce410..25fdc2a740 100644 --- a/board/freescale/p1022ds/p1022ds.c +++ b/board/freescale/p1022ds/p1022ds.c @@ -39,6 +39,10 @@ int board_early_init_f(void) /* Set pmuxcr to allow both i2c1 and i2c2 */ setbits_be32(&gur->pmuxcr, 0x1000); +#ifdef CONFIG_SYS_RAMBOOT + setbits_be32(&gur->pmuxcr, + in_be32(&gur->pmuxcr) | MPC85xx_PMUXCR_SD_DATA); +#endif /* Read back the register to synchronize the write. */ in_be32(&gur->pmuxcr); -- cgit v1.2.1