From 568336ecc7083afd0b8b16a6b8b4a796491c142f Mon Sep 17 00:00:00 2001 From: chenhui zhao Date: Thu, 15 Sep 2011 14:52:34 +0800 Subject: powerpc/mpc85xxcds: Fix PCI speed The CDS uses PCICLK as SYSCLK. The PCICLK should be 33333333Hz or 66666666Hz. Signed-off-by: Ebony Zhu Signed-off-by: Zhao Chenhui Signed-off-by: Kumar Gala --- board/freescale/mpc8555cds/mpc8555cds.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'board/freescale/mpc8555cds/mpc8555cds.c') diff --git a/board/freescale/mpc8555cds/mpc8555cds.c b/board/freescale/mpc8555cds/mpc8555cds.c index 60d1758afe..48ede9840f 100644 --- a/board/freescale/mpc8555cds/mpc8555cds.c +++ b/board/freescale/mpc8555cds/mpc8555cds.c @@ -1,5 +1,5 @@ /* - * Copyright 2004 Freescale Semiconductor. + * Copyright 2004, 2011 Freescale Semiconductor. * * See file CREDITS for list of people who contributed to this * project. @@ -198,6 +198,7 @@ const iop_conf_t iop_conf_tab[4][32] = { int checkboard (void) { volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); + char buf[32]; /* PCI slot in USER bits CSR[6:7] by convention. */ uint pci_slot = get_pci_slot (); @@ -220,8 +221,7 @@ int checkboard (void) printf("PCI1: %d bit, %s MHz, %s\n", (pci1_32) ? 32 : 64, - (pci1_speed == 33000000) ? "33" : - (pci1_speed == 66000000) ? "66" : "unknown", + strmhz(buf, pci1_speed), pci1_clk_sel ? "sync" : "async"); if (pci_dual) { -- cgit v1.2.1