From 6d0f6bcf337c5261c08fabe12982178c2c489d76 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Thu, 16 Oct 2008 15:01:15 +0200 Subject: rename CFG_ macros to CONFIG_SYS Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- board/freescale/mpc8266ads/flash.c | 26 +++++++++++++------------- board/freescale/mpc8266ads/mpc8266ads.c | 26 +++++++++++++------------- 2 files changed, 26 insertions(+), 26 deletions(-) (limited to 'board/freescale/mpc8266ads') diff --git a/board/freescale/mpc8266ads/flash.c b/board/freescale/mpc8266ads/flash.c index b4cdcd9104..06dde36e61 100644 --- a/board/freescale/mpc8266ads/flash.c +++ b/board/freescale/mpc8266ads/flash.c @@ -29,11 +29,11 @@ #include -flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ +flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ #if defined(CONFIG_ENV_IS_IN_FLASH) # ifndef CONFIG_ENV_ADDR -# define CONFIG_ENV_ADDR (CFG_FLASH_BASE + CONFIG_ENV_OFFSET) +# define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET) # endif # ifndef CONFIG_ENV_SIZE # define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE @@ -56,7 +56,7 @@ static int clear_block_lock_bit(vu_long * addr); unsigned long flash_init (void) { #ifndef CONFIG_MPC8266ADS - volatile immap_t *immap = (immap_t *)CFG_IMMR; + volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; volatile ip860_bcsr_t *bcsr = (ip860_bcsr_t *)BCSR_BASE; #endif @@ -71,7 +71,7 @@ unsigned long flash_init (void) #endif - for (i=0; imemc_or1 = CFG_OR_TIMING_FLASH | (-size & 0xFFFF8000); - memctl->memc_br1 = (CFG_FLASH_BASE & BR_BA_MSK) | + memctl->memc_or1 = CONFIG_SYS_OR_TIMING_FLASH | (-size & 0xFFFF8000); + memctl->memc_br1 = (CONFIG_SYS_FLASH_BASE & BR_BA_MSK) | (memctl->memc_br1 & ~(BR_BA_MSK)); #endif /* Re-do sizing to get full correct info */ - size = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]); + size = flash_get_size((vu_long *)CONFIG_SYS_FLASH_BASE, &flash_info[0]); flash_info[0].size = size; -#if CFG_MONITOR_BASE >= CFG_FLASH_BASE +#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE /* monitor protection ON by default */ flash_protect(FLAG_PROTECT_SET, - CFG_MONITOR_BASE, - CFG_MONITOR_BASE+monitor_flash_len-1, + CONFIG_SYS_MONITOR_BASE, + CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1, &flash_info[0]); #endif @@ -336,7 +336,7 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) *addr = 0xFFFFFFFF; /* reset bank */ return 1; } - if ((now=get_timer(start)) > CFG_FLASH_ERASE_TOUT) { + if ((now=get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) { printf ("Timeout\n"); *addr = 0xFFFFFFFF; /* reset bank */ return 1; @@ -461,7 +461,7 @@ static int write_word (flash_info_t *info, ulong dest, ulong data) start = get_timer (0); flag = 0; while (((csr = *addr) & 0x80808080) != 0x80808080) { - if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { flag = 1; break; } @@ -499,7 +499,7 @@ static int clear_block_lock_bit(vu_long * addr) start = get_timer (0); while(*addr != 0x80808080){ - if ((now=get_timer(start)) > CFG_FLASH_ERASE_TOUT) { + if ((now=get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) { printf ("Timeout on clearing Block Lock Bit\n"); *addr = 0xFFFFFFFF; /* reset bank */ return 1; diff --git a/board/freescale/mpc8266ads/mpc8266ads.c b/board/freescale/mpc8266ads/mpc8266ads.c index 090a534134..66acc41e97 100644 --- a/board/freescale/mpc8266ads/mpc8266ads.c +++ b/board/freescale/mpc8266ads/mpc8266ads.c @@ -224,7 +224,7 @@ typedef struct pci_ic_s { void reset_phy(void) { - volatile bcsr_t *bcsr = (bcsr_t *)CFG_BCSR; + volatile bcsr_t *bcsr = (bcsr_t *)CONFIG_SYS_BCSR; /* reset the FEC port */ bcsr->bcsr1 &= ~FETH_RST; @@ -234,8 +234,8 @@ void reset_phy(void) int board_early_init_f (void) { - volatile bcsr_t *bcsr = (bcsr_t *)CFG_BCSR; - volatile pci_ic_t *pci_ic = (pci_ic_t *) CFG_PCI_INT; + volatile bcsr_t *bcsr = (bcsr_t *)CONFIG_SYS_BCSR; + volatile pci_ic_t *pci_ic = (pci_ic_t *) CONFIG_SYS_PCI_INT; bcsr->bcsr1 = ~FETHIEN & ~RS232EN_1 & ~RS232EN_2; @@ -254,17 +254,17 @@ int checkboard(void) phys_size_t initdram(int board_type) { /* Autoinit part stolen from board/sacsng/sacsng.c */ - volatile immap_t *immap = (immap_t *)CFG_IMMR; + volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; volatile memctl8260_t *memctl = &immap->im_memctl; volatile uchar c = 0xff; - volatile uchar *ramaddr = (uchar *)(CFG_SDRAM_BASE + 0x8); - uint psdmr = CFG_PSDMR; + volatile uchar *ramaddr = (uchar *)(CONFIG_SYS_SDRAM_BASE + 0x8); + uint psdmr = CONFIG_SYS_PSDMR; int i; uint psrt = 0x21; /* for no SPD */ uint chipselects = 1; /* for no SPD */ - uint sdram_size = CFG_SDRAM_SIZE * 1024 * 1024; /* for no SPD */ - uint or = CFG_OR2_PRELIM; /* for no SPD */ + uint sdram_size = CONFIG_SYS_SDRAM_SIZE * 1024 * 1024; /* for no SPD */ + uint or = CONFIG_SYS_OR2_PRELIM; /* for no SPD */ uint data_width; uint rows; uint banks; @@ -286,7 +286,7 @@ phys_size_t initdram(int board_type) /* * Read the SDRAM SPD EEPROM via I2C. */ - i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE); + i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); i2c_read(SDRAM_SPD_ADDR, 0, 1, &data, 1); spd_size = data; @@ -506,13 +506,13 @@ phys_size_t initdram(int board_type) * accessing the SDRAM with a single-byte transaction." * * The appropriate BRx/ORx registers have already been set when we - * get here. The SDRAM can be accessed at the address CFG_SDRAM_BASE. + * get here. The SDRAM can be accessed at the address CONFIG_SYS_SDRAM_BASE. */ - memctl->memc_mptpr = CFG_MPTPR; + memctl->memc_mptpr = CONFIG_SYS_MPTPR; memctl->memc_psrt = psrt; - memctl->memc_br2 = CFG_BR2_PRELIM; + memctl->memc_br2 = CONFIG_SYS_BR2_PRELIM; memctl->memc_or2 = or; memctl->memc_psdmr = psdmr | PSDMR_OP_PREA; @@ -536,7 +536,7 @@ phys_size_t initdram(int board_type) { ramaddr += sdram_size; - memctl->memc_br3 = CFG_BR3_PRELIM + sdram_size; + memctl->memc_br3 = CONFIG_SYS_BR3_PRELIM + sdram_size; memctl->memc_or3 = or; memctl->memc_psdmr = psdmr | PSDMR_OP_PREA; -- cgit v1.2.1