From 6d0f6bcf337c5261c08fabe12982178c2c489d76 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Thu, 16 Oct 2008 15:01:15 +0200 Subject: rename CFG_ macros to CONFIG_SYS Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- board/freescale/m5253demo/flash.c | 38 +++++++++++++++++------------------ board/freescale/m5253demo/m5253demo.c | 12 +++++------ 2 files changed, 25 insertions(+), 25 deletions(-) (limited to 'board/freescale/m5253demo') diff --git a/board/freescale/m5253demo/flash.c b/board/freescale/m5253demo/flash.c index 1bf1e9759b..08f767d106 100644 --- a/board/freescale/m5253demo/flash.c +++ b/board/freescale/m5253demo/flash.c @@ -28,7 +28,7 @@ #include -#ifndef CFG_FLASH_CFI +#ifndef CONFIG_SYS_FLASH_CFI typedef unsigned short FLASH_PORT_WIDTH; typedef volatile unsigned short FLASH_PORT_WIDTHV; @@ -49,14 +49,14 @@ int flash_get_offsets(ulong base, flash_info_t * info); int write_word(flash_info_t * info, FPWV * dest, u16 data); void inline spin_wheel(void); -flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; +flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; ulong flash_init(void) { ulong size = 0; ulong fbase = 0; - fbase = (ulong) CFG_FLASH_BASE; + fbase = (ulong) CONFIG_SYS_FLASH_BASE; flash_get_size((FPWV *) fbase, &flash_info[0]); flash_get_offsets((ulong) fbase, &flash_info[0]); fbase += flash_info[0].size; @@ -64,8 +64,8 @@ ulong flash_init(void) /* Protect monitor and environment sectors */ flash_protect(FLAG_PROTECT_SET, - CFG_MONITOR_BASE, - CFG_MONITOR_BASE + monitor_flash_len - 1, &flash_info[0]); + CONFIG_SYS_MONITOR_BASE, + CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1, &flash_info[0]); return size; } @@ -77,8 +77,8 @@ int flash_get_offsets(ulong base, flash_info_t * info) if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) { info->start[0] = base; - for (k = 0, j = 0; j < CFG_SST_SECT; j++, k++) { - info->start[k + 1] = info->start[k] + CFG_SST_SECTSZ; + for (k = 0, j = 0; j < CONFIG_SYS_SST_SECT; j++, k++) { + info->start[k + 1] = info->start[k] + CONFIG_SYS_SST_SECTSZ; info->protect[k] = 0; } } @@ -174,16 +174,16 @@ ulong flash_get_size(FPWV * addr, flash_info_t * info) info->sector_count = 0; info->size = 0; - info->sector_count = CFG_SST_SECT; - info->size = CFG_SST_SECT * CFG_SST_SECTSZ; + info->sector_count = CONFIG_SYS_SST_SECT; + info->size = CONFIG_SYS_SST_SECT * CONFIG_SYS_SST_SECTSZ; /* reset ID mode */ *addr = (FPWV) 0x00F000F0; - if (info->sector_count > CFG_MAX_FLASH_SECT) { + if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) { printf("** ERROR: sector count %d > max (%d) **\n", - info->sector_count, CFG_MAX_FLASH_SECT); - info->sector_count = CFG_MAX_FLASH_SECT; + info->sector_count, CONFIG_SYS_MAX_FLASH_SECT); + info->sector_count = CONFIG_SYS_MAX_FLASH_SECT; } return (info->size); @@ -235,7 +235,7 @@ int flash_erase(flash_info_t * info, int s_first, int s_last) start = get_timer(0); last = start; - if ((s_last - s_first) == (CFG_SST_SECT - 1)) { + if ((s_last - s_first) == (CONFIG_SYS_SST_SECT - 1)) { if (prot == 0) { addr = (FPWV *) info->start[0]; @@ -255,7 +255,7 @@ int flash_erase(flash_info_t * info, int s_first, int s_last) count = 0; } - if (get_timer(start) > CFG_FLASH_ERASE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) { printf("Timeout\n"); *addr = 0x00F0; /* reset to read mode */ @@ -271,7 +271,7 @@ int flash_erase(flash_info_t * info, int s_first, int s_last) enable_interrupts(); return 0; - } else if (prot == CFG_SST_SECT) { + } else if (prot == CONFIG_SYS_SST_SECT) { return 1; } } @@ -294,7 +294,7 @@ int flash_erase(flash_info_t * info, int s_first, int s_last) flag = disable_interrupts(); - base = (FPWV *) (CFG_FLASH_BASE); /* First sector */ + base = (FPWV *) (CONFIG_SYS_FLASH_BASE); /* First sector */ base[FLASH_CYCLE1] = 0x00AA; /* unlock */ base[FLASH_CYCLE2] = 0x0055; /* unlock */ @@ -308,7 +308,7 @@ int flash_erase(flash_info_t * info, int s_first, int s_last) while ((*addr & 0x0080) != 0x0080) { if (get_timer(start) > - CFG_FLASH_ERASE_TOUT) { + CONFIG_SYS_FLASH_ERASE_TOUT) { printf("Timeout\n"); *addr = 0x00F0; /* reset to read mode */ @@ -424,7 +424,7 @@ int write_word(flash_info_t * info, FPWV * dest, u16 data) return (2); } - base = (FPWV *) (CFG_FLASH_BASE); + base = (FPWV *) (CONFIG_SYS_FLASH_BASE); /* Disable interrupts which might cause a timeout here */ flag = disable_interrupts(); @@ -444,7 +444,7 @@ int write_word(flash_info_t * info, FPWV * dest, u16 data) /* data polling for D7 */ while (res == 0 && (*dest & (u8) 0x00800080) != (data & (u8) 0x00800080)) { - if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { *dest = (u8) 0x00F000F0; /* reset bank */ res = 1; } diff --git a/board/freescale/m5253demo/m5253demo.c b/board/freescale/m5253demo/m5253demo.c index 2eb6a0444f..b39cd4d7a5 100644 --- a/board/freescale/m5253demo/m5253demo.c +++ b/board/freescale/m5253demo/m5253demo.c @@ -45,7 +45,7 @@ phys_size_t initdram(int board_type) if (!(mbar_readLong(MCFSIM_DCR) & 0x8000)) { u32 RC, temp; - RC = (CFG_CLK / 1000000) >> 1; + RC = (CONFIG_SYS_CLK / 1000000) >> 1; RC = (RC * 15) >> 4; /* Initialize DRAM Control Register: DCR */ @@ -56,7 +56,7 @@ phys_size_t initdram(int board_type) __asm__("nop"); /* Initialize DMR0 */ - dramsize = (CFG_SDRAM_SIZE << 20); + dramsize = (CONFIG_SYS_SDRAM_SIZE << 20); temp = (dramsize - 1) & 0xFFFC0000; mbar_writeLong(MCFSIM_DMR0, temp | 1); __asm__("nop"); @@ -65,7 +65,7 @@ phys_size_t initdram(int board_type) __asm__("nop"); /* Write to this block to initiate precharge */ - *(u32 *) (CFG_SDRAM_BASE) = 0xa5a5a5a5; + *(u32 *) (CONFIG_SYS_SDRAM_BASE) = 0xa5a5a5a5; __asm__("nop"); /* Set RE bit in DACR */ @@ -81,7 +81,7 @@ phys_size_t initdram(int board_type) mbar_readLong(MCFSIM_DACR0) | 0x0040); __asm__("nop"); - *(u32 *) (CFG_SDRAM_BASE + 0x800) = 0xa5a5a5a5; + *(u32 *) (CONFIG_SYS_SDRAM_BASE + 0x800) = 0xa5a5a5a5; } return dramsize; @@ -104,7 +104,7 @@ int ide_preinit(void) void ide_set_reset(int idereset) { - volatile atac_t *ata = (atac_t *) CFG_ATA_BASE_ADDR; + volatile atac_t *ata = (atac_t *) CONFIG_SYS_ATA_BASE_ADDR; long period; /* t1, t2, t3, t4, t5, t6, t9, tRD, tA */ int piotms[5][9] = { {70, 165, 60, 30, 50, 5, 20, 0, 35}, /* PIO 0 */ @@ -121,7 +121,7 @@ void ide_set_reset(int idereset) mbar2_writeLong(CIM_MISCCR, CIM_MISCCR_CPUEND); #define CALC_TIMING(t) (t + period - 1) / period - period = 1000000000 / (CFG_CLK / 2); /* period in ns */ + period = 1000000000 / (CONFIG_SYS_CLK / 2); /* period in ns */ /*ata->ton = CALC_TIMING (180); */ ata->t1 = CALC_TIMING(piotms[2][0]); -- cgit v1.2.1