From 6d0f6bcf337c5261c08fabe12982178c2c489d76 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Thu, 16 Oct 2008 15:01:15 +0200 Subject: rename CFG_ macros to CONFIG_SYS Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- board/eltec/elppc/asm_init.S | 28 ++++++++++++++-------------- board/eltec/elppc/elppc.c | 6 +++--- board/eltec/elppc/flash.c | 12 ++++++------ board/eltec/elppc/misc.c | 16 ++++++++-------- board/eltec/elppc/pci.c | 30 +++++++++++++++--------------- board/eltec/elppc/srom.h | 4 ++-- 6 files changed, 48 insertions(+), 48 deletions(-) (limited to 'board/eltec/elppc') diff --git a/board/eltec/elppc/asm_init.S b/board/eltec/elppc/asm_init.S index 1b8d399ed3..8cbe9d88e5 100644 --- a/board/eltec/elppc/asm_init.S +++ b/board/eltec/elppc/asm_init.S @@ -272,15 +272,15 @@ memStartWait: * set LEDs first time */ li r3, 0x1 - lis r30, CFG_USR_LED_BASE@h + lis r30, CONFIG_SYS_USR_LED_BASE@h stb r3, 2(r30) sync /* * init COM1 for polled output */ - lis r8, CFG_NS16550_COM1@h /* COM1 base address*/ - ori r8, r8, CFG_NS16550_COM1@l + lis r8, CONFIG_SYS_NS16550_COM1@h /* COM1 base address*/ + ori r8, r8, CONFIG_SYS_NS16550_COM1@l li r9, 0x00 stb r9, 1(r8) /* int disabled */ eieio @@ -290,10 +290,10 @@ memStartWait: li r9, 0x80 stb r9, 3(r8) /* link ctrl */ eieio - li r9, (CFG_NS16550_CLK / 16 / CONFIG_BAUDRATE) + li r9, (CONFIG_SYS_NS16550_CLK / 16 / CONFIG_BAUDRATE) stb r9, 0(r8) /* baud rate (LSB)*/ eieio - li r9, ((CFG_NS16550_CLK / 16 / CONFIG_BAUDRATE) >> 8) + li r9, ((CONFIG_SYS_NS16550_CLK / 16 / CONFIG_BAUDRATE) >> 8) stb r9, 1(r8) /* baud rate (MSB) */ eieio li r9, 0x07 @@ -589,7 +589,7 @@ memStartWait_1: * set LEDs end */ li r3, 0xf - lis r30, CFG_USR_LED_BASE@h + lis r30, CONFIG_SYS_USR_LED_BASE@h stb r3, 2(r30) sync @@ -602,8 +602,8 @@ memStartWait_1: */ Printf: - lis r10, CFG_NS16550_COM1@h /* COM1 base address*/ - ori r10, r10, CFG_NS16550_COM1@l + lis r10, CONFIG_SYS_NS16550_COM1@h /* COM1 base address*/ + ori r10, r10, CONFIG_SYS_NS16550_COM1@l WaitChr: lbz r0, 5(r10) /* read link status */ eieio @@ -622,8 +622,8 @@ WaitChr: * print a char to COM1 in polling mode (r10=COM1 port, r3=char) */ OutChr: - lis r10, CFG_NS16550_COM1@h /* COM1 base address*/ - ori r10, r10, CFG_NS16550_COM1@l + lis r10, CONFIG_SYS_NS16550_COM1@h /* COM1 base address*/ + ori r10, r10, CONFIG_SYS_NS16550_COM1@l OutChr1: lbz r0, 5(r10) /* read link status */ eieio @@ -645,8 +645,8 @@ OutHex4: OutHex: li r9, 28 /* shift reg for 8 digits */ OHstart: - lis r10, CFG_NS16550_COM1@h /* COM1 base address*/ - ori r10, r10, CFG_NS16550_COM1@l + lis r10, CONFIG_SYS_NS16550_COM1@h /* COM1 base address*/ + ori r10, r10, CONFIG_SYS_NS16550_COM1@l OutDig: lbz r0, 0(r29) /* slow down dummy read */ lbz r0, 5(r10) /* read link status */ @@ -685,8 +685,8 @@ OutDec: divwu r0, r3, r6 /* r0 = r3 / 10, r7 = r3 mod 10 */ mullw r10, r0, r6 subf r7, r10, r3 - lis r10, CFG_NS16550_COM1@h /* COM1 base address*/ - ori r10, r10, CFG_NS16550_COM1@l + lis r10, CONFIG_SYS_NS16550_COM1@h /* COM1 base address*/ + ori r10, r10, CONFIG_SYS_NS16550_COM1@l or. r7, r7, r7 bne noblank1 li r3, 0x20 diff --git a/board/eltec/elppc/elppc.c b/board/eltec/elppc/elppc.c index d3ac2784ac..e73c712cbb 100644 --- a/board/eltec/elppc/elppc.c +++ b/board/eltec/elppc/elppc.c @@ -68,16 +68,16 @@ long int dram_size (int board_type) register unsigned long i, msar1, mear1, memSize; -#if defined(CFG_MEMTEST) +#if defined(CONFIG_SYS_MEMTEST) register unsigned long reg; printf ("Testing DRAM\n"); /* write each mem addr with it's address */ - for (reg = CFG_MEMTEST_START; reg < CFG_MEMTEST_END; reg += 4) + for (reg = CONFIG_SYS_MEMTEST_START; reg < CONFIG_SYS_MEMTEST_END; reg += 4) *reg = reg; - for (reg = CFG_MEMTEST_START; reg < CFG_MEMTEST_END; reg += 4) { + for (reg = CONFIG_SYS_MEMTEST_START; reg < CONFIG_SYS_MEMTEST_END; reg += 4) { if (*reg != reg) return -1; } diff --git a/board/eltec/elppc/flash.c b/board/eltec/elppc/flash.c index 442dd00519..21ae09892d 100644 --- a/board/eltec/elppc/flash.c +++ b/board/eltec/elppc/flash.c @@ -34,7 +34,7 @@ #include #include -flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ +flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ ulong flash_get_size (vu_long *addr, flash_info_t *info); static int write_word (flash_info_t *info, ulong dest, ulong data); @@ -55,7 +55,7 @@ unsigned long flash_init (void) int i; /* Init: no FLASHes known */ - for (i=0; istart[l_sect]); while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) { - if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) { + if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) { printf ("Timeout\n"); return 1; } @@ -500,7 +500,7 @@ static int write_word (flash_info_t *info, ulong dest, ulong data) start = get_timer (0); while ((dest2[i] & (FLASH_WORD_SIZE)0x00800080) != (data2[i] & (FLASH_WORD_SIZE)0x00800080)) { - if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { return (1); } } diff --git a/board/eltec/elppc/misc.c b/board/eltec/elppc/misc.c index 5e3a81c6e1..cbaf10b7e6 100644 --- a/board/eltec/elppc/misc.c +++ b/board/eltec/elppc/misc.c @@ -29,7 +29,7 @@ #include "srom.h" /* imports */ -extern char console_buffer[CFG_CBSIZE]; +extern char console_buffer[CONFIG_SYS_CBSIZE]; extern int l2_cache_enable (int l2control); extern int eepro100_write_eeprom (struct eth_device *dev, int location, int addr_len, unsigned short data); @@ -95,7 +95,7 @@ int misc_init_r (void) SECOND_DEVICE, FIRST_BLOCK); /* read out current nvram shadow image */ - nvram_read (buf, CFG_NV_SROM_COPY_ADDR, CFG_SROM_SIZE); + nvram_read (buf, CONFIG_SYS_NV_SROM_COPY_ADDR, CONFIG_SYS_SROM_SIZE); if (strcmp (eerev.magic, "ELTEC") != 0) { /* srom is not initialized -> create a default revision info */ @@ -124,8 +124,8 @@ int misc_init_r (void) } if ((copyNv == 0) - && (el_srom_checksum ((u_char *) & eerev, CFG_SROM_SIZE) != - el_srom_checksum ((u_char *) buf, CFG_SROM_SIZE))) { + && (el_srom_checksum ((u_char *) & eerev, CONFIG_SYS_SROM_SIZE) != + el_srom_checksum ((u_char *) buf, CONFIG_SYS_SROM_SIZE))) { printf ("Invalid revision info copy in nvram !\n"); printf ("Press key:\n to copy current revision info to nvram.\n"); printf (" to reenter revision info.\n"); @@ -232,16 +232,16 @@ int misc_init_r (void) printf ("OK\n\n"); /* write new values as shadow image to nvram */ - nvram_write (CFG_NV_SROM_COPY_ADDR, (void *) &eerev, - CFG_SROM_SIZE); + nvram_write (CONFIG_SYS_NV_SROM_COPY_ADDR, (void *) &eerev, + CONFIG_SYS_SROM_SIZE); } /*if (initSrom) */ /* copy current values as shadow image to nvram */ if (initSrom == 0 && copyNv == 1) - nvram_write (CFG_NV_SROM_COPY_ADDR, (void *) &eerev, - CFG_SROM_SIZE); + nvram_write (CONFIG_SYS_NV_SROM_COPY_ADDR, (void *) &eerev, + CONFIG_SYS_SROM_SIZE); /* update environment */ sprintf (buf, "%02x:%02x:%02x:%02x:%02x:%02x", diff --git a/board/eltec/elppc/pci.c b/board/eltec/elppc/pci.c index 5b115ea617..bf133b77de 100644 --- a/board/eltec/elppc/pci.c +++ b/board/eltec/elppc/pci.c @@ -42,37 +42,37 @@ void pci_init_board(void) hose->last_busno = 0xff; pci_set_region(hose->regions + 0, - CFG_PCI_MEMORY_BUS, - CFG_PCI_MEMORY_PHYS, - CFG_PCI_MEMORY_SIZE, + CONFIG_SYS_PCI_MEMORY_BUS, + CONFIG_SYS_PCI_MEMORY_PHYS, + CONFIG_SYS_PCI_MEMORY_SIZE, PCI_REGION_MEM | PCI_REGION_MEMORY); /* PCI memory space */ pci_set_region(hose->regions + 1, - CFG_PCI_MEM_BUS, - CFG_PCI_MEM_PHYS, - CFG_PCI_MEM_SIZE, + CONFIG_SYS_PCI_MEM_BUS, + CONFIG_SYS_PCI_MEM_PHYS, + CONFIG_SYS_PCI_MEM_SIZE, PCI_REGION_MEM); /* ISA/PCI memory space */ pci_set_region(hose->regions + 2, - CFG_ISA_MEM_BUS, - CFG_ISA_MEM_PHYS, - CFG_ISA_MEM_SIZE, + CONFIG_SYS_ISA_MEM_BUS, + CONFIG_SYS_ISA_MEM_PHYS, + CONFIG_SYS_ISA_MEM_SIZE, PCI_REGION_MEM); /* PCI I/O space */ pci_set_region(hose->regions + 3, - CFG_PCI_IO_BUS, - CFG_PCI_IO_PHYS, - CFG_PCI_IO_SIZE, + CONFIG_SYS_PCI_IO_BUS, + CONFIG_SYS_PCI_IO_PHYS, + CONFIG_SYS_PCI_IO_SIZE, PCI_REGION_IO); /* ISA/PCI I/O space */ pci_set_region(hose->regions + 4, - CFG_ISA_IO_BUS, - CFG_ISA_IO_PHYS, - CFG_ISA_IO_SIZE, + CONFIG_SYS_ISA_IO_BUS, + CONFIG_SYS_ISA_IO_PHYS, + CONFIG_SYS_ISA_IO_SIZE, PCI_REGION_IO); hose->region_count = 5; diff --git a/board/eltec/elppc/srom.h b/board/eltec/elppc/srom.h index c18ab91645..504b742a68 100644 --- a/board/eltec/elppc/srom.h +++ b/board/eltec/elppc/srom.h @@ -40,8 +40,8 @@ #define SROM_SHORT(pX) (*(u8 *)(pX) | *((u8 *)(pX)+1) << 8) /* bab7xx ELTEC srom */ -#define I2C_BUS_DAT (CFG_ISA_IO + 0x220) -#define I2C_BUS_DIR (CFG_ISA_IO + 0x221) +#define I2C_BUS_DAT (CONFIG_SYS_ISA_IO + 0x220) +#define I2C_BUS_DIR (CONFIG_SYS_ISA_IO + 0x221) /* srom at mpc107 */ #define MPC107_I2CADDR (mpc107_eumb_addr + 0x3000) /* address */ -- cgit v1.2.1