From ffd06e0231ac3fd0c5810f39f6e23527948df1c7 Mon Sep 17 00:00:00 2001 From: York Sun Date: Mon, 8 Oct 2012 07:44:30 +0000 Subject: powerpc/mpc85xx: Rewrite spin table to comply with ePAPR v1.1 Move spin table to cached memory to comply with ePAPR v1.1. Load R3 with 64-bit value if CONFIG_SYS_PPC64 is defined. 'M' bit is set for DDR TLB to maintain cache coherence. See details in doc/README.mpc85xx-spin-table. Signed-off-by: York Sun Signed-off-by: Andy Fleming --- arch/powerpc/cpu/mpc85xx/fdt.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) (limited to 'arch/powerpc/cpu/mpc85xx/fdt.c') diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c index 8221481359..a364ef216a 100644 --- a/arch/powerpc/cpu/mpc85xx/fdt.c +++ b/arch/powerpc/cpu/mpc85xx/fdt.c @@ -47,7 +47,7 @@ extern void ft_srio_setup(void *blob); void ft_fixup_cpu(void *blob, u64 memory_limit) { int off; - ulong spin_tbl_addr = get_spin_phys_addr(); + phys_addr_t spin_tbl_addr = get_spin_phys_addr(); u32 bootpg = determine_mp_bootpg(NULL); u32 id = get_my_id(); const char *enable_method; @@ -97,7 +97,16 @@ void ft_fixup_cpu(void *blob, u64 memory_limit) if ((u64)bootpg < memory_limit) { off = fdt_add_mem_rsv(blob, bootpg, (u64)4096); if (off < 0) - printf("%s: %s\n", __FUNCTION__, fdt_strerror(off)); + printf("Failed to reserve memory for bootpg: %s\n", + fdt_strerror(off)); + } + /* Reserve spin table page */ + if (spin_tbl_addr < memory_limit) { + off = fdt_add_mem_rsv(blob, + (spin_tbl_addr & ~0xffful), 4096); + if (off < 0) + printf("Failed to reserve memory for spin table: %s\n", + fdt_strerror(off)); } } #endif -- cgit v1.2.1