From f0e8173a381a947e7a7d2078a50f6b5a6fc6d8c8 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Mon, 14 Dec 2015 12:31:48 +0100 Subject: arm: mvebu: Add v7_outer_cache_disable function for AXP & A38x Add functionality to correctly disable the L2 cache on the Armada XP and 38x platforms. Without this, booting into Linux on ClearFog (A38x) results in a hangup without any output on the serial console at all. Even with earlyprintk enabled. Signed-off-by: Stefan Roese Cc: Luka Perkov --- arch/arm/mach-mvebu/cpu.c | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'arch/arm/mach-mvebu') diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c index 74087e2903..fd56c99c92 100644 --- a/arch/arm/mach-mvebu/cpu.c +++ b/arch/arm/mach-mvebu/cpu.c @@ -422,3 +422,11 @@ void v7_outer_cache_enable(void) setbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN); } } + +void v7_outer_cache_disable(void) +{ + struct pl310_regs *const pl310 = + (struct pl310_regs *)CONFIG_SYS_PL310_BASE; + + clrbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN); +} -- cgit v1.2.1