From 74af583e9f7a255443d8f625c8dce6da7b9703be Mon Sep 17 00:00:00 2001
From: Lokesh Vutla <lokeshvutla@ti.com>
Date: Tue, 28 Jul 2015 14:16:45 +0530
Subject: ARM: keystone2: Use common structure for PLLs

Register Base addresses are same for PLLs in all
keystone platforms. If a PLL is not available, the corresponding
register addresses are marked as reserved.
Hence use a common definition.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
 arch/arm/mach-keystone/clock-k2e.c | 6 ------
 1 file changed, 6 deletions(-)

(limited to 'arch/arm/mach-keystone/clock-k2e.c')

diff --git a/arch/arm/mach-keystone/clock-k2e.c b/arch/arm/mach-keystone/clock-k2e.c
index 42092e1060..b23d2a561e 100644
--- a/arch/arm/mach-keystone/clock-k2e.c
+++ b/arch/arm/mach-keystone/clock-k2e.c
@@ -11,12 +11,6 @@
 #include <asm/arch/clock.h>
 #include <asm/arch/clock_defs.h>
 
-const struct keystone_pll_regs keystone_pll_regs[] = {
-	[CORE_PLL] = {KS2_MAINPLLCTL0, KS2_MAINPLLCTL1},
-	[PASS_PLL] = {KS2_PASSPLLCTL0, KS2_PASSPLLCTL1},
-	[DDR3_PLL] = {KS2_DDR3APLLCTL0, KS2_DDR3APLLCTL1},
-};
-
 /**
  * pll_freq_get - get pll frequency
  * Fout = Fref * NF(mult) / NR(prediv) / OD
-- 
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