From 1e0b5984f4d985f66ca06ed877dca91bf442fe4d Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Mon, 19 Jan 2015 11:33:49 +0100 Subject: arm: armada-xp: Change built target to include the SPL binary as bin_hdr Signed-off-by: Stefan Roese Reviewed-by: Luka Perkov --- arch/arm/include/asm/arch-armada-xp/config.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/arm/include') diff --git a/arch/arm/include/asm/arch-armada-xp/config.h b/arch/arm/include/asm/arch-armada-xp/config.h index 00ee775a45..f9fd424609 100644 --- a/arch/arm/include/asm/arch-armada-xp/config.h +++ b/arch/arm/include/asm/arch-armada-xp/config.h @@ -31,7 +31,11 @@ #endif /* CONFIG_SYS_KWD_CONFIG */ /* Add target to build it automatically upon "make" */ +#ifdef CONFIG_SPL +#define CONFIG_BUILD_TARGET "u-boot-spl.kwb" +#else #define CONFIG_BUILD_TARGET "u-boot.kwb" +#endif /* end of 16M scrubbed by training in bootrom */ #define CONFIG_SYS_INIT_SP_ADDR 0x00FF0000 -- cgit v1.2.1 From e7778ec153e279e451bf7c55c05c76e76b095875 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Mon, 19 Jan 2015 11:33:47 +0100 Subject: arm: maxbcm: Enable SPL to include DDR training code into U-Boot This patch adds SPL support to the maxbcm MV78460 based board. Including the fixed DDR configuratrion needed for the DDR training code. And the the serdes PHY init code. Signed-off-by: Stefan Roese Reviewed-by: Luka Perkov --- arch/arm/include/asm/arch-armada-xp/cpu.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/arm/include') diff --git a/arch/arm/include/asm/arch-armada-xp/cpu.h b/arch/arm/include/asm/arch-armada-xp/cpu.h index 6b60c21ceb..43417992b4 100644 --- a/arch/arm/include/asm/arch-armada-xp/cpu.h +++ b/arch/arm/include/asm/arch-armada-xp/cpu.h @@ -96,6 +96,9 @@ struct kwgpio_registers { u32 irq_level; }; +/* Needed for dynamic (board-specific) mbus configuration */ +extern struct mvebu_mbus_state mbus_state; + /* * functions */ -- cgit v1.2.1 From b0f80b913f5a8aec8ba75093328ac17d178c3b95 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Mon, 19 Jan 2015 11:33:42 +0100 Subject: arm: armada-xp: Add SPL support used to include the DDR training code This patch adds SPL support to the Marvell Armada-XP. With this addition the bin_hdr integration is not needed any more. The SPL will first initialize the serdes/PHY and the call the DDR setup and training code now integrated into mainline U-Boot. Signed-off-by: Stefan Roese Reviewed-by: Luka Perkov --- arch/arm/include/asm/arch-armada-xp/cpu.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'arch/arm/include') diff --git a/arch/arm/include/asm/arch-armada-xp/cpu.h b/arch/arm/include/asm/arch-armada-xp/cpu.h index 43417992b4..4f5ff96d84 100644 --- a/arch/arm/include/asm/arch-armada-xp/cpu.h +++ b/arch/arm/include/asm/arch-armada-xp/cpu.h @@ -106,5 +106,18 @@ unsigned int mvebu_sdram_bar(enum memory_bank bank); unsigned int mvebu_sdram_bs(enum memory_bank bank); void mvebu_sdram_size_adjust(enum memory_bank bank); int mvebu_mbus_probe(struct mbus_win windows[], int count); + +/* + * Highspeed SERDES PHY config init, ported from bin_hdr + * to mainline U-Boot + */ +int serdes_phy_config(void); + +/* + * DDR3 init / training code ported from Marvell bin_hdr. Now + * available in mainline U-Boot in: + * drivers/ddr/mvebu/ + */ +int ddr3_init(void); #endif /* __ASSEMBLY__ */ #endif /* _ARMADA_XP_CPU_H */ -- cgit v1.2.1