From d3daba10f159cca7e9d24c6f154926a9b92c75e3 Mon Sep 17 00:00:00 2001 From: Lokesh Vutla Date: Tue, 10 Dec 2013 15:02:22 +0530 Subject: ARM: AM43xx: EPOS_EVM: Add support for LPDDR2 AM4372 EPOS EVM has 1GB LPDDR2(Part no: MT42L256M32D2LG-25 WT:A) Adding LPDDR2 init sequence and register details for the same. Below is the brief description of LPDDR2 init sequence: -> Configure VTP -> Configure DDR IO settings -> Disable initialization and refreshes until EMIF registers are programmed. -> Program Timing registers -> Program PHY control and Temp alert and ZQ config registers. -> Enable initialization and refreshes and configure SDRAM CONFIG register -> Wait till initialization is complete and the configure MR registers. Signed-off-by: Lokesh Vutla --- arch/arm/include/asm/emif.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'arch/arm/include/asm/emif.h') diff --git a/arch/arm/include/asm/emif.h b/arch/arm/include/asm/emif.h index d9d521a515..e68c113e28 100644 --- a/arch/arm/include/asm/emif.h +++ b/arch/arm/include/asm/emif.h @@ -14,11 +14,15 @@ #define _EMIF_H_ #include #include +#include /* Base address */ #define EMIF1_BASE 0x4c000000 #define EMIF2_BASE 0x4d000000 +#define EMIF_4D 0x4 +#define EMIF_4D5 0x5 + /* Registers shifts, masks and values */ /* EMIF_MOD_ID_REV */ @@ -1148,6 +1152,14 @@ struct read_write_regs { u32 write_reg; }; +static inline u32 get_emif_rev(u32 base) +{ + struct emif_reg_struct *emif = (struct emif_reg_struct *)base; + + return (readl(&emif->emif_mod_id_rev) & EMIF_REG_MAJOR_REVISION_MASK) + >> EMIF_REG_MAJOR_REVISION_SHIFT; +} + /* assert macros */ #if defined(DEBUG) #define emif_assert(c) ({ if (!(c)) for (;;); }) -- cgit v1.2.1