From ae79e2d2982afabd43c2121fe1c40460547a5347 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Fri, 7 Nov 2014 13:50:32 +0100 Subject: arm: socfpga: dts: Add spi0/1 dts nodes for the Designware master SPI devices Signed-off-by: Stefan Roese Cc: Chin Liang See Cc: Dinh Nguyen Cc: Vince Bridgers Cc: Marek Vasut Acked-by: Pavel Machek --- arch/arm/dts/socfpga.dtsi | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) (limited to 'arch/arm/dts/socfpga.dtsi') diff --git a/arch/arm/dts/socfpga.dtsi b/arch/arm/dts/socfpga.dtsi index 145e1251bb..969e5ad751 100644 --- a/arch/arm/dts/socfpga.dtsi +++ b/arch/arm/dts/socfpga.dtsi @@ -643,6 +643,34 @@ status = "disabled"; }; + spi0: spi@fff00000 { + compatible = "snps,dw-spi-mmio"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xfff00000 0x1000>; + interrupts = <0 154 4>; + num-chipselect = <4>; + bus-num = <0>; + tx-dma-channel = <&pdma 16>; + rx-dma-channel = <&pdma 17>; + clocks = <&per_base_clk>; + status = "disabled"; + }; + + spi1: spi@fff01000 { + compatible = "snps,dw-spi-mmio"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xfff01000 0x1000>; + interrupts = <0 156 4>; + num-chipselect = <4>; + bus-num = <1>; + tx-dma-channel = <&pdma 20>; + rx-dma-channel = <&pdma 21>; + clocks = <&per_base_clk>; + status = "disabled"; + }; + /* Local timer */ timer@fffec600 { compatible = "arm,cortex-a9-twd-timer"; -- cgit v1.2.1