From dee01e426b39eac974364c0658fca431894987c3 Mon Sep 17 00:00:00 2001 From: Abhimanyu Saini Date: Tue, 14 Jun 2016 13:18:31 +0530 Subject: armv8: dts: fsl: Remove cpu nodes from Layerscape DTSIs Currently layescape SoCs are not using cpu nodes. So removing them in favour of compatibly with similar SoCs that have different cores like LS2080A and LS2088A. This has been tested on LS2080AQDS, LS1043ARDB, LS1012ARDB. Signed-off-by: Prabhakar Kushwaha Signed-off-by: Abhimanyu Saini Reviewed-by: York Sun --- arch/arm/dts/fsl-ls1012a.dtsi | 12 ------------ 1 file changed, 12 deletions(-) (limited to 'arch/arm/dts/fsl-ls1012a.dtsi') diff --git a/arch/arm/dts/fsl-ls1012a.dtsi b/arch/arm/dts/fsl-ls1012a.dtsi index 546a87a0a5..024527e815 100644 --- a/arch/arm/dts/fsl-ls1012a.dtsi +++ b/arch/arm/dts/fsl-ls1012a.dtsi @@ -9,18 +9,6 @@ / { compatible = "fsl,ls1012a"; interrupt-parent = <&gic>; - cpus { - #address-cells = <2>; - #size-cells = <0>; - - cpu0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a53"; - reg = <0x0 0x0>; - clocks = <&clockgen 1 0>; - }; - - }; sysclk: sysclk { compatible = "fixed-clock"; -- cgit v1.2.1